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authorGrant Likely <grant.likely@secretlab.ca>2008-01-25 00:25:31 -0500
committerGrant Likely <grant.likely@secretlab.ca>2008-01-26 17:32:11 -0500
commit24ce6bc4a2b75509b29372f1e5e7e0fe51d98e66 (patch)
treea0dae7f428373307312d2bccac59ec5dc35f4af7 /arch/powerpc/boot/dts/motionpro.dts
parent66ffbe490b6156898364b3f20a571a78f8d77bc8 (diff)
[POWERPC] mpc5200: make dts files conform to generic names recommended practice
Modify mpc5200 dts files to match Open Firmware's Generic Names recommended practice. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/powerpc/boot/dts/motionpro.dts')
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts66
1 files changed, 28 insertions, 38 deletions
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index ee30805e35cd..76951ab038ee 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -10,12 +10,6 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ { 13/ {
20 model = "promess,motionpro"; 14 model = "promess,motionpro";
21 compatible = "promess,motionpro"; 15 compatible = "promess,motionpro";
@@ -47,29 +41,26 @@
47 soc5200@f0000000 { 41 soc5200@f0000000 {
48 #address-cells = <1>; 42 #address-cells = <1>;
49 #size-cells = <1>; 43 #size-cells = <1>;
50 model = "fsl,mpc5200b"; 44 compatible = "fsl,mpc5200b-immr";
51 compatible = "fsl,mpc5200b";
52 revision = ""; // from bootloader
53 device_type = "soc";
54 ranges = <0 f0000000 0000c000>; 45 ranges = <0 f0000000 0000c000>;
55 reg = <f0000000 00000100>; 46 reg = <f0000000 00000100>;
56 bus-frequency = <0>; // from bootloader 47 bus-frequency = <0>; // from bootloader
57 system-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader
58 49
59 cdm@200 { 50 cdm@200 {
60 compatible = "mpc5200b-cdm","mpc5200-cdm"; 51 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
61 reg = <200 38>; 52 reg = <200 38>;
62 }; 53 };
63 54
64 mpc5200_pic: pic@500 { 55 mpc5200_pic: interrupt-controller@500 {
65 // 5200 interrupts are encoded into two levels; 56 // 5200 interrupts are encoded into two levels;
66 interrupt-controller; 57 interrupt-controller;
67 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
68 compatible = "mpc5200b-pic","mpc5200-pic"; 59 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
69 reg = <500 80>; 60 reg = <500 80>;
70 }; 61 };
71 62
72 gpt@600 { // General Purpose Timer 63 timer@600 { // General Purpose Timer
73 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 64 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
74 reg = <600 10>; 65 reg = <600 10>;
75 interrupts = <1 9 0>; 66 interrupts = <1 9 0>;
@@ -77,35 +68,35 @@
77 fsl,has-wdt; 68 fsl,has-wdt;
78 }; 69 };
79 70
80 gpt@610 { // General Purpose Timer 71 timer@610 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 72 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <610 10>; 73 reg = <610 10>;
83 interrupts = <1 a 0>; 74 interrupts = <1 a 0>;
84 interrupt-parent = <&mpc5200_pic>; 75 interrupt-parent = <&mpc5200_pic>;
85 }; 76 };
86 77
87 gpt@620 { // General Purpose Timer 78 timer@620 { // General Purpose Timer
88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
89 reg = <620 10>; 80 reg = <620 10>;
90 interrupts = <1 b 0>; 81 interrupts = <1 b 0>;
91 interrupt-parent = <&mpc5200_pic>; 82 interrupt-parent = <&mpc5200_pic>;
92 }; 83 };
93 84
94 gpt@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
96 reg = <630 10>; 87 reg = <630 10>;
97 interrupts = <1 c 0>; 88 interrupts = <1 c 0>;
98 interrupt-parent = <&mpc5200_pic>; 89 interrupt-parent = <&mpc5200_pic>;
99 }; 90 };
100 91
101 gpt@640 { // General Purpose Timer 92 timer@640 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <640 10>; 94 reg = <640 10>;
104 interrupts = <1 d 0>; 95 interrupts = <1 d 0>;
105 interrupt-parent = <&mpc5200_pic>; 96 interrupt-parent = <&mpc5200_pic>;
106 }; 97 };
107 98
108 gpt@650 { // General Purpose Timer 99 timer@650 { // General Purpose Timer
109 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
110 reg = <650 10>; 101 reg = <650 10>;
111 interrupts = <1 e 0>; 102 interrupts = <1 e 0>;
@@ -130,28 +121,28 @@
130 }; 121 };
131 122
132 rtc@800 { // Real time clock 123 rtc@800 { // Real time clock
133 compatible = "mpc5200b-rtc","mpc5200-rtc"; 124 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
134 reg = <800 100>; 125 reg = <800 100>;
135 interrupts = <1 5 0 1 6 0>; 126 interrupts = <1 5 0 1 6 0>;
136 interrupt-parent = <&mpc5200_pic>; 127 interrupt-parent = <&mpc5200_pic>;
137 }; 128 };
138 129
139 mscan@980 { 130 mscan@980 {
140 compatible = "mpc5200b-mscan","mpc5200-mscan"; 131 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
141 interrupts = <2 12 0>; 132 interrupts = <2 12 0>;
142 interrupt-parent = <&mpc5200_pic>; 133 interrupt-parent = <&mpc5200_pic>;
143 reg = <980 80>; 134 reg = <980 80>;
144 }; 135 };
145 136
146 gpio@b00 { 137 gpio@b00 {
147 compatible = "mpc5200b-gpio","mpc5200-gpio"; 138 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
148 reg = <b00 40>; 139 reg = <b00 40>;
149 interrupts = <1 7 0>; 140 interrupts = <1 7 0>;
150 interrupt-parent = <&mpc5200_pic>; 141 interrupt-parent = <&mpc5200_pic>;
151 }; 142 };
152 143
153 gpio-wkup@c00 { 144 gpio@c00 {
154 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 145 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
155 reg = <c00 40>; 146 reg = <c00 40>;
156 interrupts = <1 8 0 0 3 0>; 147 interrupts = <1 8 0 0 3 0>;
157 interrupt-parent = <&mpc5200_pic>; 148 interrupt-parent = <&mpc5200_pic>;
@@ -159,21 +150,21 @@
159 150
160 151
161 spi@f00 { 152 spi@f00 {
162 compatible = "mpc5200b-spi","mpc5200-spi"; 153 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
163 reg = <f00 20>; 154 reg = <f00 20>;
164 interrupts = <2 d 0 2 e 0>; 155 interrupts = <2 d 0 2 e 0>;
165 interrupt-parent = <&mpc5200_pic>; 156 interrupt-parent = <&mpc5200_pic>;
166 }; 157 };
167 158
168 usb@1000 { 159 usb@1000 {
169 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be"; 160 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
170 reg = <1000 ff>; 161 reg = <1000 ff>;
171 interrupts = <2 6 0>; 162 interrupts = <2 6 0>;
172 interrupt-parent = <&mpc5200_pic>; 163 interrupt-parent = <&mpc5200_pic>;
173 }; 164 };
174 165
175 dma-controller@1200 { 166 dma-controller@1200 {
176 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 167 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
177 reg = <1200 80>; 168 reg = <1200 80>;
178 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 169 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
179 3 4 0 3 5 0 3 6 0 3 7 0 170 3 4 0 3 5 0 3 6 0 3 7 0
@@ -183,13 +174,13 @@
183 }; 174 };
184 175
185 xlb@1f00 { 176 xlb@1f00 {
186 compatible = "mpc5200b-xlb","mpc5200-xlb"; 177 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
187 reg = <1f00 100>; 178 reg = <1f00 100>;
188 }; 179 };
189 180
190 serial@2000 { // PSC1 181 serial@2000 { // PSC1
191 device_type = "serial"; 182 device_type = "serial";
192 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 183 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
193 port-number = <0>; // Logical port assignment 184 port-number = <0>; // Logical port assignment
194 reg = <2000 100>; 185 reg = <2000 100>;
195 interrupts = <2 1 0>; 186 interrupts = <2 1 0>;
@@ -198,7 +189,7 @@
198 189
199 // PSC2 in spi master mode 190 // PSC2 in spi master mode
200 spi@2200 { // PSC2 191 spi@2200 { // PSC2
201 compatible = "mpc5200b-psc-spi","mpc5200-psc-spi"; 192 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
202 cell-index = <1>; 193 cell-index = <1>;
203 reg = <2200 100>; 194 reg = <2200 100>;
204 interrupts = <2 2 0>; 195 interrupts = <2 2 0>;
@@ -208,7 +199,7 @@
208 // PSC5 in uart mode 199 // PSC5 in uart mode
209 serial@2800 { // PSC5 200 serial@2800 { // PSC5
210 device_type = "serial"; 201 device_type = "serial";
211 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 202 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
212 port-number = <4>; // Logical port assignment 203 port-number = <4>; // Logical port assignment
213 reg = <2800 100>; 204 reg = <2800 100>;
214 interrupts = <2 c 0>; 205 interrupts = <2 c 0>;
@@ -217,22 +208,22 @@
217 208
218 ethernet@3000 { 209 ethernet@3000 {
219 device_type = "network"; 210 device_type = "network";
220 compatible = "mpc5200b-fec","mpc5200-fec"; 211 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
221 reg = <3000 800>; 212 reg = <3000 800>;
222 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 213 local-mac-address = [ 00 00 00 00 00 00 ];
223 interrupts = <2 5 0>; 214 interrupts = <2 5 0>;
224 interrupt-parent = <&mpc5200_pic>; 215 interrupt-parent = <&mpc5200_pic>;
225 }; 216 };
226 217
227 ata@3a00 { 218 ata@3a00 {
228 compatible = "mpc5200b-ata","mpc5200-ata"; 219 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
229 reg = <3a00 100>; 220 reg = <3a00 100>;
230 interrupts = <2 7 0>; 221 interrupts = <2 7 0>;
231 interrupt-parent = <&mpc5200_pic>; 222 interrupt-parent = <&mpc5200_pic>;
232 }; 223 };
233 224
234 i2c@3d40 { 225 i2c@3d40 {
235 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 226 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
236 reg = <3d40 40>; 227 reg = <3d40 40>;
237 interrupts = <2 10 0>; 228 interrupts = <2 10 0>;
238 interrupt-parent = <&mpc5200_pic>; 229 interrupt-parent = <&mpc5200_pic>;
@@ -240,13 +231,12 @@
240 }; 231 };
241 232
242 sram@8000 { 233 sram@8000 {
243 compatible = "mpc5200b-sram","mpc5200-sram"; 234 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
244 reg = <8000 4000>; 235 reg = <8000 4000>;
245 }; 236 };
246 }; 237 };
247 238
248 lpb { 239 lpb {
249 model = "fsl,lpb";
250 compatible = "fsl,lpb"; 240 compatible = "fsl,lpb";
251 #address-cells = <2>; 241 #address-cells = <2>;
252 #size-cells = <1>; 242 #size-cells = <1>;
@@ -288,7 +278,7 @@
288 #size-cells = <2>; 278 #size-cells = <2>;
289 #address-cells = <3>; 279 #address-cells = <3>;
290 device_type = "pci"; 280 device_type = "pci";
291 compatible = "mpc5200b-pci","mpc5200-pci"; 281 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
292 reg = <f0000d00 100>; 282 reg = <f0000d00 100>;
293 interrupt-map-mask = <f800 0 0 7>; 283 interrupt-map-mask = <f800 0 0 7>;
294 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 284 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot