diff options
author | David Gibson <david@gibson.dropbear.id.au> | 2008-05-15 02:46:39 -0400 |
---|---|---|
committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2008-05-29 08:06:56 -0400 |
commit | 71f349799b34c8b6ce3df42126b4de6cfa16456d (patch) | |
tree | 995a9385920e7be80ea9a872442caf1d475c935a /arch/powerpc/boot/dts/bamboo.dts | |
parent | b786af117b360843349cf66165c4efa0217ca2a7 (diff) |
[POWERPC] Convert remaining dts-v0 files to v1
At the moment we have a mixture of left-over version 0 and new-format
version 1 files in arch/powerpc/boot/dts. This is potentially
confusing to people new to the dts format attempting to figure it out.
So, this patch converts all the as-yet unconverted dts v0 files and
converts them to v1. They're mechanically-converted, and not hand
tweaked so in some cases they're not 100% in keeping with usual v1
style, but the convertor program does have some heuristics so the
discrepancies aren't too bad.
I have checked that this patch produces no changes to the resulting
dtb binaries.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/dts/bamboo.dts')
-rw-r--r-- | arch/powerpc/boot/dts/bamboo.dts | 142 |
1 files changed, 72 insertions, 70 deletions
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts index ba2521bdaab1..6ce0cc2c0208 100644 --- a/arch/powerpc/boot/dts/bamboo.dts +++ b/arch/powerpc/boot/dts/bamboo.dts | |||
@@ -11,12 +11,14 @@ | |||
11 | * any warranty of any kind, whether express or implied. | 11 | * any warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | /dts-v1/; | ||
15 | |||
14 | / { | 16 | / { |
15 | #address-cells = <2>; | 17 | #address-cells = <2>; |
16 | #size-cells = <1>; | 18 | #size-cells = <1>; |
17 | model = "amcc,bamboo"; | 19 | model = "amcc,bamboo"; |
18 | compatible = "amcc,bamboo"; | 20 | compatible = "amcc,bamboo"; |
19 | dcr-parent = <&/cpus/cpu@0>; | 21 | dcr-parent = <&{/cpus/cpu@0}>; |
20 | 22 | ||
21 | aliases { | 23 | aliases { |
22 | ethernet0 = &EMAC0; | 24 | ethernet0 = &EMAC0; |
@@ -34,13 +36,13 @@ | |||
34 | cpu@0 { | 36 | cpu@0 { |
35 | device_type = "cpu"; | 37 | device_type = "cpu"; |
36 | model = "PowerPC,440EP"; | 38 | model = "PowerPC,440EP"; |
37 | reg = <0>; | 39 | reg = <0x00000000>; |
38 | clock-frequency = <0>; /* Filled in by zImage */ | 40 | clock-frequency = <0>; /* Filled in by zImage */ |
39 | timebase-frequency = <0>; /* Filled in by zImage */ | 41 | timebase-frequency = <0>; /* Filled in by zImage */ |
40 | i-cache-line-size = <20>; | 42 | i-cache-line-size = <32>; |
41 | d-cache-line-size = <20>; | 43 | d-cache-line-size = <32>; |
42 | i-cache-size = <8000>; | 44 | i-cache-size = <32768>; |
43 | d-cache-size = <8000>; | 45 | d-cache-size = <32768>; |
44 | dcr-controller; | 46 | dcr-controller; |
45 | dcr-access-method = "native"; | 47 | dcr-access-method = "native"; |
46 | }; | 48 | }; |
@@ -48,14 +50,14 @@ | |||
48 | 50 | ||
49 | memory { | 51 | memory { |
50 | device_type = "memory"; | 52 | device_type = "memory"; |
51 | reg = <0 0 0>; /* Filled in by zImage */ | 53 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
52 | }; | 54 | }; |
53 | 55 | ||
54 | UIC0: interrupt-controller0 { | 56 | UIC0: interrupt-controller0 { |
55 | compatible = "ibm,uic-440ep","ibm,uic"; | 57 | compatible = "ibm,uic-440ep","ibm,uic"; |
56 | interrupt-controller; | 58 | interrupt-controller; |
57 | cell-index = <0>; | 59 | cell-index = <0>; |
58 | dcr-reg = <0c0 009>; | 60 | dcr-reg = <0x0c0 0x009>; |
59 | #address-cells = <0>; | 61 | #address-cells = <0>; |
60 | #size-cells = <0>; | 62 | #size-cells = <0>; |
61 | #interrupt-cells = <2>; | 63 | #interrupt-cells = <2>; |
@@ -65,22 +67,22 @@ | |||
65 | compatible = "ibm,uic-440ep","ibm,uic"; | 67 | compatible = "ibm,uic-440ep","ibm,uic"; |
66 | interrupt-controller; | 68 | interrupt-controller; |
67 | cell-index = <1>; | 69 | cell-index = <1>; |
68 | dcr-reg = <0d0 009>; | 70 | dcr-reg = <0x0d0 0x009>; |
69 | #address-cells = <0>; | 71 | #address-cells = <0>; |
70 | #size-cells = <0>; | 72 | #size-cells = <0>; |
71 | #interrupt-cells = <2>; | 73 | #interrupt-cells = <2>; |
72 | interrupts = <1e 4 1f 4>; /* cascade */ | 74 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
73 | interrupt-parent = <&UIC0>; | 75 | interrupt-parent = <&UIC0>; |
74 | }; | 76 | }; |
75 | 77 | ||
76 | SDR0: sdr { | 78 | SDR0: sdr { |
77 | compatible = "ibm,sdr-440ep"; | 79 | compatible = "ibm,sdr-440ep"; |
78 | dcr-reg = <00e 002>; | 80 | dcr-reg = <0x00e 0x002>; |
79 | }; | 81 | }; |
80 | 82 | ||
81 | CPR0: cpr { | 83 | CPR0: cpr { |
82 | compatible = "ibm,cpr-440ep"; | 84 | compatible = "ibm,cpr-440ep"; |
83 | dcr-reg = <00c 002>; | 85 | dcr-reg = <0x00c 0x002>; |
84 | }; | 86 | }; |
85 | 87 | ||
86 | plb { | 88 | plb { |
@@ -92,29 +94,29 @@ | |||
92 | 94 | ||
93 | SDRAM0: sdram { | 95 | SDRAM0: sdram { |
94 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 96 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
95 | dcr-reg = <010 2>; | 97 | dcr-reg = <0x010 0x002>; |
96 | }; | 98 | }; |
97 | 99 | ||
98 | DMA0: dma { | 100 | DMA0: dma { |
99 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 101 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
100 | dcr-reg = <100 027>; | 102 | dcr-reg = <0x100 0x027>; |
101 | }; | 103 | }; |
102 | 104 | ||
103 | MAL0: mcmal { | 105 | MAL0: mcmal { |
104 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 106 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
105 | dcr-reg = <180 62>; | 107 | dcr-reg = <0x180 0x062>; |
106 | num-tx-chans = <4>; | 108 | num-tx-chans = <4>; |
107 | num-rx-chans = <2>; | 109 | num-rx-chans = <2>; |
108 | interrupt-parent = <&MAL0>; | 110 | interrupt-parent = <&MAL0>; |
109 | interrupts = <0 1 2 3 4>; | 111 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
110 | #interrupt-cells = <1>; | 112 | #interrupt-cells = <1>; |
111 | #address-cells = <0>; | 113 | #address-cells = <0>; |
112 | #size-cells = <0>; | 114 | #size-cells = <0>; |
113 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 115 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
114 | /*RXEOB*/ 1 &UIC0 b 4 | 116 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
115 | /*SERR*/ 2 &UIC1 0 4 | 117 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
116 | /*TXDE*/ 3 &UIC1 1 4 | 118 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
117 | /*RXDE*/ 4 &UIC1 2 4>; | 119 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
118 | }; | 120 | }; |
119 | 121 | ||
120 | POB0: opb { | 122 | POB0: opb { |
@@ -124,101 +126,101 @@ | |||
124 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | 126 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN |
125 | * bits. | 127 | * bits. |
126 | */ | 128 | */ |
127 | ranges = <00000000 0 00000000 80000000 | 129 | ranges = <0x00000000 0x00000000 0x00000000 0x80000000 |
128 | 80000000 0 80000000 80000000>; | 130 | 0x80000000 0x00000000 0x80000000 0x80000000>; |
129 | interrupt-parent = <&UIC1>; | 131 | interrupt-parent = <&UIC1>; |
130 | interrupts = <7 4>; | 132 | interrupts = <0x7 0x4>; |
131 | clock-frequency = <0>; /* Filled in by zImage */ | 133 | clock-frequency = <0>; /* Filled in by zImage */ |
132 | 134 | ||
133 | EBC0: ebc { | 135 | EBC0: ebc { |
134 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 136 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
135 | dcr-reg = <012 2>; | 137 | dcr-reg = <0x012 0x002>; |
136 | #address-cells = <2>; | 138 | #address-cells = <2>; |
137 | #size-cells = <1>; | 139 | #size-cells = <1>; |
138 | clock-frequency = <0>; /* Filled in by zImage */ | 140 | clock-frequency = <0>; /* Filled in by zImage */ |
139 | interrupts = <5 1>; | 141 | interrupts = <0x5 0x1>; |
140 | interrupt-parent = <&UIC1>; | 142 | interrupt-parent = <&UIC1>; |
141 | }; | 143 | }; |
142 | 144 | ||
143 | UART0: serial@ef600300 { | 145 | UART0: serial@ef600300 { |
144 | device_type = "serial"; | 146 | device_type = "serial"; |
145 | compatible = "ns16550"; | 147 | compatible = "ns16550"; |
146 | reg = <ef600300 8>; | 148 | reg = <0xef600300 0x00000008>; |
147 | virtual-reg = <ef600300>; | 149 | virtual-reg = <0xef600300>; |
148 | clock-frequency = <0>; /* Filled in by zImage */ | 150 | clock-frequency = <0>; /* Filled in by zImage */ |
149 | current-speed = <1c200>; | 151 | current-speed = <115200>; |
150 | interrupt-parent = <&UIC0>; | 152 | interrupt-parent = <&UIC0>; |
151 | interrupts = <0 4>; | 153 | interrupts = <0x0 0x4>; |
152 | }; | 154 | }; |
153 | 155 | ||
154 | UART1: serial@ef600400 { | 156 | UART1: serial@ef600400 { |
155 | device_type = "serial"; | 157 | device_type = "serial"; |
156 | compatible = "ns16550"; | 158 | compatible = "ns16550"; |
157 | reg = <ef600400 8>; | 159 | reg = <0xef600400 0x00000008>; |
158 | virtual-reg = <ef600400>; | 160 | virtual-reg = <0xef600400>; |
159 | clock-frequency = <0>; | 161 | clock-frequency = <0>; |
160 | current-speed = <0>; | 162 | current-speed = <0>; |
161 | interrupt-parent = <&UIC0>; | 163 | interrupt-parent = <&UIC0>; |
162 | interrupts = <1 4>; | 164 | interrupts = <0x1 0x4>; |
163 | }; | 165 | }; |
164 | 166 | ||
165 | UART2: serial@ef600500 { | 167 | UART2: serial@ef600500 { |
166 | device_type = "serial"; | 168 | device_type = "serial"; |
167 | compatible = "ns16550"; | 169 | compatible = "ns16550"; |
168 | reg = <ef600500 8>; | 170 | reg = <0xef600500 0x00000008>; |
169 | virtual-reg = <ef600500>; | 171 | virtual-reg = <0xef600500>; |
170 | clock-frequency = <0>; | 172 | clock-frequency = <0>; |
171 | current-speed = <0>; | 173 | current-speed = <0>; |
172 | interrupt-parent = <&UIC0>; | 174 | interrupt-parent = <&UIC0>; |
173 | interrupts = <3 4>; | 175 | interrupts = <0x3 0x4>; |
174 | }; | 176 | }; |
175 | 177 | ||
176 | UART3: serial@ef600600 { | 178 | UART3: serial@ef600600 { |
177 | device_type = "serial"; | 179 | device_type = "serial"; |
178 | compatible = "ns16550"; | 180 | compatible = "ns16550"; |
179 | reg = <ef600600 8>; | 181 | reg = <0xef600600 0x00000008>; |
180 | virtual-reg = <ef600600>; | 182 | virtual-reg = <0xef600600>; |
181 | clock-frequency = <0>; | 183 | clock-frequency = <0>; |
182 | current-speed = <0>; | 184 | current-speed = <0>; |
183 | interrupt-parent = <&UIC0>; | 185 | interrupt-parent = <&UIC0>; |
184 | interrupts = <4 4>; | 186 | interrupts = <0x4 0x4>; |
185 | }; | 187 | }; |
186 | 188 | ||
187 | IIC0: i2c@ef600700 { | 189 | IIC0: i2c@ef600700 { |
188 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 190 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
189 | reg = <ef600700 14>; | 191 | reg = <0xef600700 0x00000014>; |
190 | interrupt-parent = <&UIC0>; | 192 | interrupt-parent = <&UIC0>; |
191 | interrupts = <2 4>; | 193 | interrupts = <0x2 0x4>; |
192 | }; | 194 | }; |
193 | 195 | ||
194 | IIC1: i2c@ef600800 { | 196 | IIC1: i2c@ef600800 { |
195 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 197 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
196 | reg = <ef600800 14>; | 198 | reg = <0xef600800 0x00000014>; |
197 | interrupt-parent = <&UIC0>; | 199 | interrupt-parent = <&UIC0>; |
198 | interrupts = <7 4>; | 200 | interrupts = <0x7 0x4>; |
199 | }; | 201 | }; |
200 | 202 | ||
201 | ZMII0: emac-zmii@ef600d00 { | 203 | ZMII0: emac-zmii@ef600d00 { |
202 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 204 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
203 | reg = <ef600d00 c>; | 205 | reg = <0xef600d00 0x0000000c>; |
204 | }; | 206 | }; |
205 | 207 | ||
206 | EMAC0: ethernet@ef600e00 { | 208 | EMAC0: ethernet@ef600e00 { |
207 | device_type = "network"; | 209 | device_type = "network"; |
208 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 210 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
209 | interrupt-parent = <&UIC1>; | 211 | interrupt-parent = <&UIC1>; |
210 | interrupts = <1c 4 1d 4>; | 212 | interrupts = <0x1c 0x4 0x1d 0x4>; |
211 | reg = <ef600e00 70>; | 213 | reg = <0xef600e00 0x00000070>; |
212 | local-mac-address = [000000000000]; | 214 | local-mac-address = [000000000000]; |
213 | mal-device = <&MAL0>; | 215 | mal-device = <&MAL0>; |
214 | mal-tx-channel = <0 1>; | 216 | mal-tx-channel = <0 1>; |
215 | mal-rx-channel = <0>; | 217 | mal-rx-channel = <0>; |
216 | cell-index = <0>; | 218 | cell-index = <0>; |
217 | max-frame-size = <5dc>; | 219 | max-frame-size = <1500>; |
218 | rx-fifo-size = <1000>; | 220 | rx-fifo-size = <4096>; |
219 | tx-fifo-size = <800>; | 221 | tx-fifo-size = <2048>; |
220 | phy-mode = "rmii"; | 222 | phy-mode = "rmii"; |
221 | phy-map = <00000000>; | 223 | phy-map = <0x00000000>; |
222 | zmii-device = <&ZMII0>; | 224 | zmii-device = <&ZMII0>; |
223 | zmii-channel = <0>; | 225 | zmii-channel = <0>; |
224 | }; | 226 | }; |
@@ -227,26 +229,26 @@ | |||
227 | device_type = "network"; | 229 | device_type = "network"; |
228 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 230 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
229 | interrupt-parent = <&UIC1>; | 231 | interrupt-parent = <&UIC1>; |
230 | interrupts = <1e 4 1f 4>; | 232 | interrupts = <0x1e 0x4 0x1f 0x4>; |
231 | reg = <ef600f00 70>; | 233 | reg = <0xef600f00 0x00000070>; |
232 | local-mac-address = [000000000000]; | 234 | local-mac-address = [000000000000]; |
233 | mal-device = <&MAL0>; | 235 | mal-device = <&MAL0>; |
234 | mal-tx-channel = <2 3>; | 236 | mal-tx-channel = <2 3>; |
235 | mal-rx-channel = <1>; | 237 | mal-rx-channel = <1>; |
236 | cell-index = <1>; | 238 | cell-index = <1>; |
237 | max-frame-size = <5dc>; | 239 | max-frame-size = <1500>; |
238 | rx-fifo-size = <1000>; | 240 | rx-fifo-size = <4096>; |
239 | tx-fifo-size = <800>; | 241 | tx-fifo-size = <2048>; |
240 | phy-mode = "rmii"; | 242 | phy-mode = "rmii"; |
241 | phy-map = <00000000>; | 243 | phy-map = <0x00000000>; |
242 | zmii-device = <&ZMII0>; | 244 | zmii-device = <&ZMII0>; |
243 | zmii-channel = <1>; | 245 | zmii-channel = <1>; |
244 | }; | 246 | }; |
245 | 247 | ||
246 | usb@ef601000 { | 248 | usb@ef601000 { |
247 | compatible = "ohci-be"; | 249 | compatible = "ohci-be"; |
248 | reg = <ef601000 80>; | 250 | reg = <0xef601000 0x00000080>; |
249 | interrupts = <8 1 9 1>; | 251 | interrupts = <0x8 0x1 0x9 0x1>; |
250 | interrupt-parent = < &UIC1 >; | 252 | interrupt-parent = < &UIC1 >; |
251 | }; | 253 | }; |
252 | }; | 254 | }; |
@@ -258,35 +260,35 @@ | |||
258 | #address-cells = <3>; | 260 | #address-cells = <3>; |
259 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | 261 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; |
260 | primary; | 262 | primary; |
261 | reg = <0 eec00000 8 /* Config space access */ | 263 | reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ |
262 | 0 eed00000 4 /* IACK */ | 264 | 0x00000000 0xeed00000 0x00000004 /* IACK */ |
263 | 0 eed00000 4 /* Special cycle */ | 265 | 0x00000000 0xeed00000 0x00000004 /* Special cycle */ |
264 | 0 ef400000 40>; /* Internal registers */ | 266 | 0x00000000 0xef400000 0x00000040>; /* Internal registers */ |
265 | 267 | ||
266 | /* Outbound ranges, one memory and one IO, | 268 | /* Outbound ranges, one memory and one IO, |
267 | * later cannot be changed. Chip supports a second | 269 | * later cannot be changed. Chip supports a second |
268 | * IO range but we don't use it for now | 270 | * IO range but we don't use it for now |
269 | */ | 271 | */ |
270 | ranges = <02000000 0 a0000000 0 a0000000 0 20000000 | 272 | ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 |
271 | 01000000 0 00000000 0 e8000000 0 00010000>; | 273 | 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
272 | 274 | ||
273 | /* Inbound 2GB range starting at 0 */ | 275 | /* Inbound 2GB range starting at 0 */ |
274 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 276 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
275 | 277 | ||
276 | /* Bamboo has all 4 IRQ pins tied together per slot */ | 278 | /* Bamboo has all 4 IRQ pins tied together per slot */ |
277 | interrupt-map-mask = <f800 0 0 0>; | 279 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
278 | interrupt-map = < | 280 | interrupt-map = < |
279 | /* IDSEL 1 */ | 281 | /* IDSEL 1 */ |
280 | 0800 0 0 0 &UIC0 1c 8 | 282 | 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
281 | 283 | ||
282 | /* IDSEL 2 */ | 284 | /* IDSEL 2 */ |
283 | 1000 0 0 0 &UIC0 1b 8 | 285 | 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 |
284 | 286 | ||
285 | /* IDSEL 3 */ | 287 | /* IDSEL 3 */ |
286 | 1800 0 0 0 &UIC0 1a 8 | 288 | 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
287 | 289 | ||
288 | /* IDSEL 4 */ | 290 | /* IDSEL 4 */ |
289 | 2000 0 0 0 &UIC0 19 8 | 291 | 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 |
290 | >; | 292 | >; |
291 | }; | 293 | }; |
292 | }; | 294 | }; |