[PARISC] Make sure use of RFI conforms to PA 2.0 and 1.1 arch docs

2.6.12-rc4-pa3 : first pass at making sure use of RFI conforms to
PA 2.0 arch pages F-4 and F-5, PA 1.1 Arch page 3-19 and 3-20.

The discussion revolves around all the rules for clearing PSW Q-bit.
The hard part is meeting all the rules for "relied upon translation".

.align directive is used to guarantee the critical sequence ends more than
8 instructions (32 bytes) from the end of page.

Signed-off-by: Grant Grundler <grundler@parisc-linux.org>

Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>

1 files changed, 6 insertions, 12 deletions

diff --git a/arch/parisc/kernel/real2.S b/arch/parisc/kernel/real2.S
index 8dd5defb7316..2310fc1b06a9 100644
--- a/arch/parisc/kernel/real2.S
+++ b/arch/parisc/kernel/real2.S
@@ -7,8 +7,8 @@
  * Copyright (C) 2000 Hewlett Packard (Paul Bame bame@puffin.external.hp.com)
  *
  */
-#include <asm/assembly.h>
 #include <asm/psw.h>
+#include <asm/assembly.h>
 
         .section        .bss
         .export real_stack
@@ -147,20 +147,17 @@ restore_control_regs:
         .text
 rfi_virt2real:
         /* switch to real mode... */
-        ssm             0,0             /* See "relied upon translation" */
-        nop                             /* PA 2.0 Arch. F-5 */
-        nop
-        nop
+        rsm             PSW_SM_I,%r0
+        load32          PA(rfi_v2r_1), %r1
         nop
         nop
         nop
         nop
         nop
         
-        rsm             (PSW_SM_Q|PSW_SM_I),%r0  /* disable Q & I bits to load iia queue */
+        rsm             PSW_SM_Q,%r0  /* disable Q & I bits to load iia queue */
         mtctl           %r0, %cr17      /* Clear IIASQ tail */
         mtctl           %r0, %cr17      /* Clear IIASQ head */
-        load32          PA(rfi_v2r_1), %r1
         mtctl           %r1, %cr18      /* IIAOQ head */
         ldo             4(%r1), %r1
         mtctl           %r1, %cr18      /* IIAOQ tail */
@@ -184,10 +181,8 @@ rfi_v2r_1:
         .text
         .align 128
 rfi_real2virt:
-        ssm             0,0             /* See "relied upon translation" */
-        nop                             /* PA 2.0 Arch. F-5 */
-        nop
-        nop
+        rsm             PSW_SM_I,%r0
+        load32          (rfi_r2v_1), %r1
         nop
         nop
         nop
@@ -197,7 +192,6 @@ rfi_real2virt:
         rsm             PSW_SM_Q,%r0    /* disable Q bit to load iia queue */
         mtctl           %r0, %cr17      /* Clear IIASQ tail */
         mtctl           %r0, %cr17      /* Clear IIASQ head */
-        load32          (rfi_r2v_1), %r1
         mtctl           %r1, %cr18      /* IIAOQ head */
         ldo             4(%r1), %r1
         mtctl           %r1, %cr18      /* IIAOQ tail */