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author | Stephen Boyd <sboyd@codeaurora.org> | 2013-04-10 21:00:11 -0400 |
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committer | David Brown <davidb@codeaurora.org> | 2013-04-11 12:40:35 -0400 |
commit | 73a8c28f167c9e7bc42eafc0bcbd298031709430 (patch) | |
tree | 5b6a152c302c531d57a54cdb66405865c529b0ca /arch/parisc/kernel/perf_asm.S | |
parent | 4080d2d11a2d572228c2b8d02406e997b87ba6a5 (diff) |
ARM: msm: Fix uncompess.h tx underrun check
Bit 3 of the SR register is set if there is a tx underrun. If
this bit isn't set, we should loop on the tx ready bit until we
can transmit again. Otherwise we should skip the loop and
transmit immediately. The code is doing the opposite though,
checking for an underrun and then looping on the tx ready bit
causing us to never loop on the tx read bit when the tx buffer
may not be ready.
This doesn't seem to affect my 8960 device too often, but in some
cases I see a lost character or two from the decompressor prints.
This also matches what we do in the assembly in debug-macro.S.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/parisc/kernel/perf_asm.S')
0 files changed, 0 insertions, 0 deletions