parisc: optimize mtsp(0,sr) inline assembly

If the value which should be moved into a space register is zero, we can
optimize the inline assembly to become "mtsp %r0,%srX".

Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # 3.10

1 files changed, 6 insertions, 3 deletions

diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h
index d306b75bc77f..e1509308899f 100644
--- a/arch/parisc/include/asm/special_insns.h
+++ b/arch/parisc/include/asm/special_insns.h
@@ -32,9 +32,12 @@ static inline void set_eiem(unsigned long val)
         cr;                             \
 })
 
-#define mtsp(gr, cr) \
-        __asm__ __volatile__("mtsp %0,%1" \
+#define mtsp(val, cr) \
+        { if (__builtin_constant_p(val) && ((val) == 0)) \
+         __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \
+        else \
+         __asm__ __volatile__("mtsp %0,%1" \
                 : /* no outputs */ \
-                : "r" (gr), "i" (cr) : "memory")
+                : "r" (val), "i" (cr) : "memory"); }
 
 #endif /* __PARISC_SPECIAL_INSNS_H */