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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-21 13:04:53 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-21 13:04:53 -0400
commit4e76ae4406449811c0b743ccf0612ef6ffcf2acb (patch)
treef1a32dca8e9156301d2a1f6b0eff76d6fc747f49 /arch/parisc/include
parentf19ade4dfbfefbb44b412fc33a2db26eafd63f0e (diff)
parent1c0f647690f1b9471d63af48dec960bc59492e61 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6: [PARISC] Convert to new irq_chip functions [PARISC] fix per-cpu flag problem in the cpu affinity checkers [PARISC] fix vmap flush/invalidate eliminate special FLUSH flag from page table parisc: flush pages through tmpalias space
Diffstat (limited to 'arch/parisc/include')
-rw-r--r--arch/parisc/include/asm/cacheflush.h31
-rw-r--r--arch/parisc/include/asm/irq.h13
-rw-r--r--arch/parisc/include/asm/pgtable.h14
3 files changed, 29 insertions, 29 deletions
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index f388a85bba11..d18328b3f938 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -26,8 +26,6 @@ void flush_user_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_range_asm(unsigned long, unsigned long); 26void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
27void flush_kernel_dcache_page_asm(void *); 27void flush_kernel_dcache_page_asm(void *);
28void flush_kernel_icache_page(void *); 28void flush_kernel_icache_page(void *);
29void flush_user_dcache_page(unsigned long);
30void flush_user_icache_page(unsigned long);
31void flush_user_dcache_range(unsigned long, unsigned long); 29void flush_user_dcache_range(unsigned long, unsigned long);
32void flush_user_icache_range(unsigned long, unsigned long); 30void flush_user_icache_range(unsigned long, unsigned long);
33 31
@@ -37,6 +35,13 @@ void flush_cache_all_local(void);
37void flush_cache_all(void); 35void flush_cache_all(void);
38void flush_cache_mm(struct mm_struct *mm); 36void flush_cache_mm(struct mm_struct *mm);
39 37
38#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
39void flush_kernel_dcache_page_addr(void *addr);
40static inline void flush_kernel_dcache_page(struct page *page)
41{
42 flush_kernel_dcache_page_addr(page_address(page));
43}
44
40#define flush_kernel_dcache_range(start,size) \ 45#define flush_kernel_dcache_range(start,size) \
41 flush_kernel_dcache_range_asm((start), (start)+(size)); 46 flush_kernel_dcache_range_asm((start), (start)+(size));
42/* vmap range flushes and invalidates. Architecturally, we don't need 47/* vmap range flushes and invalidates. Architecturally, we don't need
@@ -50,6 +55,16 @@ static inline void flush_kernel_vmap_range(void *vaddr, int size)
50} 55}
51static inline void invalidate_kernel_vmap_range(void *vaddr, int size) 56static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
52{ 57{
58 unsigned long start = (unsigned long)vaddr;
59 void *cursor = vaddr;
60
61 for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) {
62 struct page *page = vmalloc_to_page(cursor);
63
64 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
65 flush_kernel_dcache_page(page);
66 }
67 flush_kernel_dcache_range_asm(start, start + size);
53} 68}
54 69
55#define flush_cache_vmap(start, end) flush_cache_all() 70#define flush_cache_vmap(start, end) flush_cache_all()
@@ -90,19 +105,15 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned
90void flush_cache_range(struct vm_area_struct *vma, 105void flush_cache_range(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end); 106 unsigned long start, unsigned long end);
92 107
108/* defined in pacache.S exported in cache.c used by flush_anon_page */
109void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);
110
93#define ARCH_HAS_FLUSH_ANON_PAGE 111#define ARCH_HAS_FLUSH_ANON_PAGE
94static inline void 112static inline void
95flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) 113flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
96{ 114{
97 if (PageAnon(page)) 115 if (PageAnon(page))
98 flush_user_dcache_page(vmaddr); 116 flush_dcache_page_asm(page_to_phys(page), vmaddr);
99}
100
101#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
102void flush_kernel_dcache_page_addr(void *addr);
103static inline void flush_kernel_dcache_page(struct page *page)
104{
105 flush_kernel_dcache_page_addr(page_address(page));
106} 117}
107 118
108#ifdef CONFIG_DEBUG_RODATA 119#ifdef CONFIG_DEBUG_RODATA
diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h
index c67dccf2e31f..1073599a7be9 100644
--- a/arch/parisc/include/asm/irq.h
+++ b/arch/parisc/include/asm/irq.h
@@ -32,15 +32,10 @@ static __inline__ int irq_canonicalize(int irq)
32} 32}
33 33
34struct irq_chip; 34struct irq_chip;
35struct irq_data;
35 36
36/* 37void cpu_ack_irq(struct irq_data *d);
37 * Some useful "we don't have to do anything here" handlers. Should 38void cpu_eoi_irq(struct irq_data *d);
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42void cpu_ack_irq(unsigned int irq);
43void cpu_eoi_irq(unsigned int irq);
44 39
45extern int txn_alloc_irq(unsigned int nbits); 40extern int txn_alloc_irq(unsigned int nbits);
46extern int txn_claim_irq(int); 41extern int txn_claim_irq(int);
@@ -49,7 +44,7 @@ extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); 44extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50 45
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *); 46extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest); 47extern int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest);
53 48
54/* soft power switch support (power.c) */ 49/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet; 50extern struct tasklet_struct power_tasklet;
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 6f1f65d3c0ef..5d7b8ce9fdf3 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -138,8 +138,7 @@ struct vm_area_struct;
138#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ 138#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
139#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ 139#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
140#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ 140#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
141#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */ 141/* bit 21 was formerly the FLUSH bit but is now unused */
142 /* for cache flushing only */
143#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ 142#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
144 143
145/* N.B. The bits are defined in terms of a 32 bit word above, so the */ 144/* N.B. The bits are defined in terms of a 32 bit word above, so the */
@@ -173,7 +172,6 @@ struct vm_area_struct;
173#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) 172#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
174#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) 173#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
175#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) 174#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
176#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
177#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) 175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
178#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) 176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
179 177
@@ -213,7 +211,6 @@ struct vm_area_struct;
213#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 211#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
214#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) 212#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
215#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) 213#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
216#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
217 214
218 215
219/* 216/*
@@ -261,7 +258,7 @@ extern unsigned long *empty_zero_page;
261 258
262#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 259#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
263 260
264#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH)) 261#define pte_none(x) (pte_val(x) == 0)
265#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) 262#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
266#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) 263#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
267 264
@@ -444,13 +441,10 @@ struct mm_struct;
444static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 441static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
445{ 442{
446 pte_t old_pte; 443 pte_t old_pte;
447 pte_t pte;
448 444
449 spin_lock(&pa_dbit_lock); 445 spin_lock(&pa_dbit_lock);
450 pte = old_pte = *ptep; 446 old_pte = *ptep;
451 pte_val(pte) &= ~_PAGE_PRESENT; 447 pte_clear(mm,addr,ptep);
452 pte_val(pte) |= _PAGE_FLUSH;
453 set_pte_at(mm,addr,ptep,pte);
454 spin_unlock(&pa_dbit_lock); 448 spin_unlock(&pa_dbit_lock);
455 449
456 return old_pte; 450 return old_pte;