aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mn10300
diff options
context:
space:
mode:
authorDavid Howells <dhowells@redhat.com>2008-11-12 10:35:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2008-11-12 13:41:17 -0500
commit852c15b7362cf34e0d7949abefbfeeb0845d93b4 (patch)
tree98dade6ff2f502d65c29f6e7df8bd4032c1578bf /arch/mn10300
parent6d615c78fb92fbd80e52ba7acb2d4c4d503006c3 (diff)
MN10300: Fix misaligned index-register addressing handling
Fix misalignment handling for an address calculated from the sum of two registers. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/mn10300')
-rw-r--r--arch/mn10300/mm/misalignment.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mn10300/mm/misalignment.c b/arch/mn10300/mm/misalignment.c
index 61e65ec47db8..a59836804bc6 100644
--- a/arch/mn10300/mm/misalignment.c
+++ b/arch/mn10300/mm/misalignment.c
@@ -570,11 +570,11 @@ static int misalignment_addr(unsigned long *registers, unsigned params,
570 address += *postinc; 570 address += *postinc;
571 break; 571 break;
572 case DM1: 572 case DM1:
573 postinc = &registers[Dreg_index[opcode >> 2 & 0x0c]]; 573 postinc = &registers[Dreg_index[opcode >> 2 & 0x03]];
574 address += *postinc; 574 address += *postinc;
575 break; 575 break;
576 case DM2: 576 case DM2:
577 postinc = &registers[Dreg_index[opcode >> 4 & 0x30]]; 577 postinc = &registers[Dreg_index[opcode >> 4 & 0x03]];
578 address += *postinc; 578 address += *postinc;
579 break; 579 break;
580 case AM0: 580 case AM0:
@@ -582,11 +582,11 @@ static int misalignment_addr(unsigned long *registers, unsigned params,
582 address += *postinc; 582 address += *postinc;
583 break; 583 break;
584 case AM1: 584 case AM1:
585 postinc = &registers[Areg_index[opcode >> 2 & 0x0c]]; 585 postinc = &registers[Areg_index[opcode >> 2 & 0x03]];
586 address += *postinc; 586 address += *postinc;
587 break; 587 break;
588 case AM2: 588 case AM2:
589 postinc = &registers[Areg_index[opcode >> 4 & 0x30]]; 589 postinc = &registers[Areg_index[opcode >> 4 & 0x03]];
590 address += *postinc; 590 address += *postinc;
591 break; 591 break;
592 case RM0: 592 case RM0: