aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-15 19:44:45 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-15 19:44:45 -0500
commitff0ff78068dd8a962358dbbdafa9d6f24540d3e5 (patch)
tree32cfd97cf0b7909d6c1327859abbfcd30afe0c02 /arch/mips
parentb1914cb2f35c3995b778e55fdb1d569b9c6a92af (diff)
parent4af92e7a68af7b515d274f9d33b14b8a0804a0f6 (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: lantiq: use export.h in favour of module.h MAINTAINERS: The MIPS git tree has moved. MIPS: Fix build error due to missing inclusion of <linux/export.h>. MIPS: ASID conflict after CPU hotplug MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/flash_setup.c MIPS: errloongson2_clock: Fix build error by including linux/module.h STAGING: octeon-ethernet: Fix compile error caused by skb_frag_struct change MIPS: Hook up process_vm_readv and process_vm_writev system calls. MIPS: Kernel hangs occasionally during boot. MIPS: Octeon: Mark SMP-IPI interrupt as IRQF_NO_THREAD MIPS: BCM47xx: fix build with GENERIC_GPIO configuration MIPS: NXP: Remove unused source files. MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/cavium-octeon/flash_setup.c9
-rw-r--r--arch/mips/cavium-octeon/smp.c5
-rw-r--r--arch/mips/emma/common/prom.c2
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h18
-rw-r--r--arch/mips/include/asm/unistd.h18
-rw-r--r--arch/mips/kernel/cevt-r4k.c38
-rw-r--r--arch/mips/kernel/cpufreq/loongson2_clock.c1
-rw-r--r--arch/mips/kernel/scall32-o32.S2
-rw-r--r--arch/mips/kernel/scall64-64.S2
-rw-r--r--arch/mips/kernel/scall64-n32.S2
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/traps.c3
-rw-r--r--arch/mips/lantiq/clk.c2
-rw-r--r--arch/mips/lantiq/devices.c2
-rw-r--r--arch/mips/lantiq/prom.c2
-rw-r--r--arch/mips/lantiq/setup.c2
-rw-r--r--arch/mips/lantiq/xway/clk-ase.c2
-rw-r--r--arch/mips/lantiq/xway/clk-xway.c2
-rw-r--r--arch/mips/lantiq/xway/devices.c2
-rw-r--r--arch/mips/lantiq/xway/dma.c1
-rw-r--r--arch/mips/lantiq/xway/gpio.c2
-rw-r--r--arch/mips/lantiq/xway/gpio_ebu.c2
-rw-r--r--arch/mips/lantiq/xway/gpio_stp.c2
-rw-r--r--arch/mips/lantiq/xway/prom-ase.c2
-rw-r--r--arch/mips/lantiq/xway/prom-xway.c2
-rw-r--r--arch/mips/lantiq/xway/reset.c2
-rw-r--r--arch/mips/nxp/pnx8550/common/pci.c134
-rw-r--r--arch/mips/nxp/pnx8550/common/setup.c143
-rw-r--r--arch/mips/pci/pci-alchemy.c1
-rw-r--r--arch/mips/pci/pci-lantiq.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/prom.c2
31 files changed, 80 insertions, 330 deletions
diff --git a/arch/mips/cavium-octeon/flash_setup.c b/arch/mips/cavium-octeon/flash_setup.c
index 975c20327bb1..0a430e06f5e5 100644
--- a/arch/mips/cavium-octeon/flash_setup.c
+++ b/arch/mips/cavium-octeon/flash_setup.c
@@ -17,8 +17,6 @@
17 17
18static struct map_info flash_map; 18static struct map_info flash_map;
19static struct mtd_info *mymtd; 19static struct mtd_info *mymtd;
20static int nr_parts;
21static struct mtd_partition *parts;
22static const char *part_probe_types[] = { 20static const char *part_probe_types[] = {
23 "cmdlinepart", 21 "cmdlinepart",
24#ifdef CONFIG_MTD_REDBOOT_PARTS 22#ifdef CONFIG_MTD_REDBOOT_PARTS
@@ -61,11 +59,8 @@ static int __init flash_init(void)
61 mymtd = do_map_probe("cfi_probe", &flash_map); 59 mymtd = do_map_probe("cfi_probe", &flash_map);
62 if (mymtd) { 60 if (mymtd) {
63 mymtd->owner = THIS_MODULE; 61 mymtd->owner = THIS_MODULE;
64 62 mtd_device_parse_register(mymtd, part_probe_types,
65 nr_parts = parse_mtd_partitions(mymtd, 63 0, NULL, 0);
66 part_probe_types,
67 &parts, 0);
68 mtd_device_register(mymtd, parts, nr_parts);
69 } else { 64 } else {
70 pr_err("Failed to register MTD device for flash\n"); 65 pr_err("Failed to register MTD device for flash\n");
71 } 66 }
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 8b606423bbd7..efcfff4d4627 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -207,8 +207,9 @@ void octeon_prepare_cpus(unsigned int max_cpus)
207 * the other bits alone. 207 * the other bits alone.
208 */ 208 */
209 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff); 209 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff);
210 if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED, 210 if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt,
211 "SMP-IPI", mailbox_interrupt)) { 211 IRQF_PERCPU | IRQF_NO_THREAD, "SMP-IPI",
212 mailbox_interrupt)) {
212 panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n"); 213 panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
213 } 214 }
214} 215}
diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c
index 708f08761406..cae42259d6da 100644
--- a/arch/mips/emma/common/prom.c
+++ b/arch/mips/emma/common/prom.c
@@ -50,7 +50,7 @@ void __init prom_init(void)
50 50
51 /* arg[0] is "g", the rest is boot parameters */ 51 /* arg[0] is "g", the rest is boot parameters */
52 for (i = 1; i < argc; i++) { 52 for (i = 1; i < argc; i++) {
53 if (strlen(arcs_cmdline) + strlen(arg[i] + 1) 53 if (strlen(arcs_cmdline) + strlen(arg[i]) + 1
54 >= sizeof(arcs_cmdline)) 54 >= sizeof(arcs_cmdline))
55 break; 55 break;
56 strcat(arcs_cmdline, arg[i]); 56 strcat(arcs_cmdline, arg[i]);
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index 76961cabeedf..2ef17e8df403 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -36,6 +36,8 @@ static inline int gpio_get_value(unsigned gpio)
36 return -EINVAL; 36 return -EINVAL;
37} 37}
38 38
39#define gpio_get_value_cansleep gpio_get_value
40
39static inline void gpio_set_value(unsigned gpio, int value) 41static inline void gpio_set_value(unsigned gpio, int value)
40{ 42{
41 switch (bcm47xx_bus_type) { 43 switch (bcm47xx_bus_type) {
@@ -54,6 +56,19 @@ static inline void gpio_set_value(unsigned gpio, int value)
54 } 56 }
55} 57}
56 58
59#define gpio_set_value_cansleep gpio_set_value
60
61static inline int gpio_cansleep(unsigned gpio)
62{
63 return 0;
64}
65
66static inline int gpio_is_valid(unsigned gpio)
67{
68 return gpio < (BCM47XX_EXTIF_GPIO_LINES + BCM47XX_CHIPCO_GPIO_LINES);
69}
70
71
57static inline int gpio_direction_input(unsigned gpio) 72static inline int gpio_direction_input(unsigned gpio)
58{ 73{
59 switch (bcm47xx_bus_type) { 74 switch (bcm47xx_bus_type) {
@@ -137,7 +152,4 @@ static inline int gpio_polarity(unsigned gpio, int value)
137} 152}
138 153
139 154
140/* cansleep wrappers */
141#include <asm-generic/gpio.h>
142
143#endif /* __BCM47XX_GPIO_H */ 155#endif /* __BCM47XX_GPIO_H */
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index ecea7871dec2..d8dad5340ea3 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -365,16 +365,18 @@
365#define __NR_syncfs (__NR_Linux + 342) 365#define __NR_syncfs (__NR_Linux + 342)
366#define __NR_sendmmsg (__NR_Linux + 343) 366#define __NR_sendmmsg (__NR_Linux + 343)
367#define __NR_setns (__NR_Linux + 344) 367#define __NR_setns (__NR_Linux + 344)
368#define __NR_process_vm_readv (__NR_Linux + 345)
369#define __NR_process_vm_writev (__NR_Linux + 346)
368 370
369/* 371/*
370 * Offset of the last Linux o32 flavoured syscall 372 * Offset of the last Linux o32 flavoured syscall
371 */ 373 */
372#define __NR_Linux_syscalls 344 374#define __NR_Linux_syscalls 346
373 375
374#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 376#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
375 377
376#define __NR_O32_Linux 4000 378#define __NR_O32_Linux 4000
377#define __NR_O32_Linux_syscalls 344 379#define __NR_O32_Linux_syscalls 346
378 380
379#if _MIPS_SIM == _MIPS_SIM_ABI64 381#if _MIPS_SIM == _MIPS_SIM_ABI64
380 382
@@ -686,16 +688,18 @@
686#define __NR_syncfs (__NR_Linux + 301) 688#define __NR_syncfs (__NR_Linux + 301)
687#define __NR_sendmmsg (__NR_Linux + 302) 689#define __NR_sendmmsg (__NR_Linux + 302)
688#define __NR_setns (__NR_Linux + 303) 690#define __NR_setns (__NR_Linux + 303)
691#define __NR_process_vm_readv (__NR_Linux + 304)
692#define __NR_process_vm_writev (__NR_Linux + 305)
689 693
690/* 694/*
691 * Offset of the last Linux 64-bit flavoured syscall 695 * Offset of the last Linux 64-bit flavoured syscall
692 */ 696 */
693#define __NR_Linux_syscalls 303 697#define __NR_Linux_syscalls 305
694 698
695#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 699#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
696 700
697#define __NR_64_Linux 5000 701#define __NR_64_Linux 5000
698#define __NR_64_Linux_syscalls 303 702#define __NR_64_Linux_syscalls 305
699 703
700#if _MIPS_SIM == _MIPS_SIM_NABI32 704#if _MIPS_SIM == _MIPS_SIM_NABI32
701 705
@@ -1012,16 +1016,18 @@
1012#define __NR_syncfs (__NR_Linux + 306) 1016#define __NR_syncfs (__NR_Linux + 306)
1013#define __NR_sendmmsg (__NR_Linux + 307) 1017#define __NR_sendmmsg (__NR_Linux + 307)
1014#define __NR_setns (__NR_Linux + 308) 1018#define __NR_setns (__NR_Linux + 308)
1019#define __NR_process_vm_readv (__NR_Linux + 309)
1020#define __NR_process_vm_writev (__NR_Linux + 310)
1015 1021
1016/* 1022/*
1017 * Offset of the last N32 flavoured syscall 1023 * Offset of the last N32 flavoured syscall
1018 */ 1024 */
1019#define __NR_Linux_syscalls 308 1025#define __NR_Linux_syscalls 310
1020 1026
1021#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1027#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1022 1028
1023#define __NR_N32_Linux 6000 1029#define __NR_N32_Linux 6000
1024#define __NR_N32_Linux_syscalls 308 1030#define __NR_N32_Linux_syscalls 310
1025 1031
1026#ifdef __KERNEL__ 1032#ifdef __KERNEL__
1027 1033
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 98c5a9737c14..e2d8e199be32 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -103,19 +103,10 @@ static int c0_compare_int_pending(void)
103 103
104/* 104/*
105 * Compare interrupt can be routed and latched outside the core, 105 * Compare interrupt can be routed and latched outside the core,
106 * so a single execution hazard barrier may not be enough to give 106 * so wait up to worst case number of cycle counter ticks for timer interrupt
107 * it time to clear as seen in the Cause register. 4 time the 107 * changes to propagate to the cause register.
108 * pipeline depth seems reasonably conservative, and empirically
109 * works better in configurations with high CPU/bus clock ratios.
110 */ 108 */
111 109#define COMPARE_INT_SEEN_TICKS 50
112#define compare_change_hazard() \
113 do { \
114 irq_disable_hazard(); \
115 irq_disable_hazard(); \
116 irq_disable_hazard(); \
117 irq_disable_hazard(); \
118 } while (0)
119 110
120int c0_compare_int_usable(void) 111int c0_compare_int_usable(void)
121{ 112{
@@ -126,8 +117,12 @@ int c0_compare_int_usable(void)
126 * IP7 already pending? Try to clear it by acking the timer. 117 * IP7 already pending? Try to clear it by acking the timer.
127 */ 118 */
128 if (c0_compare_int_pending()) { 119 if (c0_compare_int_pending()) {
129 write_c0_compare(read_c0_count()); 120 cnt = read_c0_count();
130 compare_change_hazard(); 121 write_c0_compare(cnt);
122 back_to_back_c0_hazard();
123 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
124 if (!c0_compare_int_pending())
125 break;
131 if (c0_compare_int_pending()) 126 if (c0_compare_int_pending())
132 return 0; 127 return 0;
133 } 128 }
@@ -136,7 +131,7 @@ int c0_compare_int_usable(void)
136 cnt = read_c0_count(); 131 cnt = read_c0_count();
137 cnt += delta; 132 cnt += delta;
138 write_c0_compare(cnt); 133 write_c0_compare(cnt);
139 compare_change_hazard(); 134 back_to_back_c0_hazard();
140 if ((int)(read_c0_count() - cnt) < 0) 135 if ((int)(read_c0_count() - cnt) < 0)
141 break; 136 break;
142 /* increase delta if the timer was already expired */ 137 /* increase delta if the timer was already expired */
@@ -145,12 +140,17 @@ int c0_compare_int_usable(void)
145 while ((int)(read_c0_count() - cnt) <= 0) 140 while ((int)(read_c0_count() - cnt) <= 0)
146 ; /* Wait for expiry */ 141 ; /* Wait for expiry */
147 142
148 compare_change_hazard(); 143 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
144 if (c0_compare_int_pending())
145 break;
149 if (!c0_compare_int_pending()) 146 if (!c0_compare_int_pending())
150 return 0; 147 return 0;
151 148 cnt = read_c0_count();
152 write_c0_compare(read_c0_count()); 149 write_c0_compare(cnt);
153 compare_change_hazard(); 150 back_to_back_c0_hazard();
151 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
152 if (!c0_compare_int_pending())
153 break;
154 if (c0_compare_int_pending()) 154 if (c0_compare_int_pending())
155 return 0; 155 return 0;
156 156
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c
index cefc6e259baf..5426779d9fdb 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/kernel/cpufreq/loongson2_clock.c
@@ -7,6 +7,7 @@
7 * for more details. 7 * for more details.
8 */ 8 */
9 9
10#include <linux/module.h>
10#include <linux/cpufreq.h> 11#include <linux/cpufreq.h>
11#include <linux/platform_device.h> 12#include <linux/platform_device.h>
12 13
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 47920657968d..a632bc144efa 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -591,6 +591,8 @@ einval: li v0, -ENOSYS
591 sys sys_syncfs 1 591 sys sys_syncfs 1
592 sys sys_sendmmsg 4 592 sys sys_sendmmsg 4
593 sys sys_setns 2 593 sys sys_setns 2
594 sys sys_process_vm_readv 6 /* 4345 */
595 sys sys_process_vm_writev 6
594 .endm 596 .endm
595 597
596 /* We pre-compute the number of _instruction_ bytes needed to 598 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index fb7334bea731..3b5a5e9ae49c 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -430,4 +430,6 @@ sys_call_table:
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR sys_sendmmsg 431 PTR sys_sendmmsg
432 PTR sys_setns 432 PTR sys_setns
433 PTR sys_process_vm_readv
434 PTR sys_process_vm_writev /* 5305 */
433 .size sys_call_table,.-sys_call_table 435 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 6de1f598346e..6be6f7020923 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -430,4 +430,6 @@ EXPORT(sysn32_call_table)
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR compat_sys_sendmmsg 431 PTR compat_sys_sendmmsg
432 PTR sys_setns 432 PTR sys_setns
433 PTR compat_sys_process_vm_readv
434 PTR compat_sys_process_vm_writev /* 6310 */
433 .size sysn32_call_table,.-sysn32_call_table 435 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 1d813169e453..54228553691d 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -548,4 +548,6 @@ sys_call_table:
548 PTR sys_syncfs 548 PTR sys_syncfs
549 PTR compat_sys_sendmmsg 549 PTR compat_sys_sendmmsg
550 PTR sys_setns 550 PTR sys_setns
551 PTR compat_sys_process_vm_readv /* 4345 */
552 PTR compat_sys_process_vm_writev
551 .size sys_call_table,.-sys_call_table 553 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 261ccbc07740..5c8a49d55054 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1596,7 +1596,8 @@ void __cpuinit per_cpu_trap_init(void)
1596 } 1596 }
1597#endif /* CONFIG_MIPS_MT_SMTC */ 1597#endif /* CONFIG_MIPS_MT_SMTC */
1598 1598
1599 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; 1599 if (!cpu_data[cpu].asid_cache)
1600 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
1600 1601
1601 atomic_inc(&init_mm.mm_count); 1602 atomic_inc(&init_mm.mm_count);
1602 current->active_mm = &init_mm; 1603 current->active_mm = &init_mm;
diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c
index 7e9c0ffc11a5..77ed70fc2fe5 100644
--- a/arch/mips/lantiq/clk.c
+++ b/arch/mips/lantiq/clk.c
@@ -7,7 +7,7 @@
7 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 7 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
8 */ 8 */
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/types.h> 13#include <linux/types.h>
diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c
index 44a36771c819..de1cb2bcd79a 100644
--- a/arch/mips/lantiq/devices.c
+++ b/arch/mips/lantiq/devices.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index 56ba007bf1e5..e34fcfd0d5ca 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <asm/bootinfo.h> 11#include <asm/bootinfo.h>
12#include <asm/time.h> 12#include <asm/time.h>
diff --git a/arch/mips/lantiq/setup.c b/arch/mips/lantiq/setup.c
index 9b8af77ed0f9..1ff6c9d6cb93 100644
--- a/arch/mips/lantiq/setup.c
+++ b/arch/mips/lantiq/setup.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/ioport.h> 12#include <linux/ioport.h>
13#include <asm/bootinfo.h> 13#include <asm/bootinfo.h>
diff --git a/arch/mips/lantiq/xway/clk-ase.c b/arch/mips/lantiq/xway/clk-ase.c
index 22d823acd536..652258309c9c 100644
--- a/arch/mips/lantiq/xway/clk-ase.c
+++ b/arch/mips/lantiq/xway/clk-ase.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/clk.h> 12#include <linux/clk.h>
13 13
diff --git a/arch/mips/lantiq/xway/clk-xway.c b/arch/mips/lantiq/xway/clk-xway.c
index ddd39593c581..696b1a3e0642 100644
--- a/arch/mips/lantiq/xway/clk-xway.c
+++ b/arch/mips/lantiq/xway/clk-xway.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/clk.h> 12#include <linux/clk.h>
13 13
diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c
index d0e32ab2ea07..d614aa7ff07f 100644
--- a/arch/mips/lantiq/xway/devices.c
+++ b/arch/mips/lantiq/xway/devices.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/mtd/physmap.h> 13#include <linux/mtd/physmap.h>
diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index 4278a459d6c4..cbb6ae5747b9 100644
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -19,6 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/dma-mapping.h> 21#include <linux/dma-mapping.h>
22#include <linux/export.h>
22 23
23#include <lantiq_soc.h> 24#include <lantiq_soc.h>
24#include <xway_dma.h> 25#include <xway_dma.h>
diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
index a321451a5455..d2fa98f3c78d 100644
--- a/arch/mips/lantiq/xway/gpio.c
+++ b/arch/mips/lantiq/xway/gpio.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/slab.h> 9#include <linux/slab.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/ioport.h> 13#include <linux/ioport.h>
diff --git a/arch/mips/lantiq/xway/gpio_ebu.c b/arch/mips/lantiq/xway/gpio_ebu.c
index a479355abdb9..b91c7f17f10f 100644
--- a/arch/mips/lantiq/xway/gpio_ebu.c
+++ b/arch/mips/lantiq/xway/gpio_ebu.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/mutex.h> 13#include <linux/mutex.h>
diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c
index 67d59d690340..ff9991cddeaa 100644
--- a/arch/mips/lantiq/xway/gpio_stp.c
+++ b/arch/mips/lantiq/xway/gpio_stp.c
@@ -9,7 +9,7 @@
9 9
10#include <linux/slab.h> 10#include <linux/slab.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/module.h> 12#include <linux/export.h>
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/mutex.h> 15#include <linux/mutex.h>
diff --git a/arch/mips/lantiq/xway/prom-ase.c b/arch/mips/lantiq/xway/prom-ase.c
index abe49f4db57f..ae4959ae865c 100644
--- a/arch/mips/lantiq/xway/prom-ase.c
+++ b/arch/mips/lantiq/xway/prom-ase.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <asm/bootinfo.h> 11#include <asm/bootinfo.h>
12#include <asm/time.h> 12#include <asm/time.h>
diff --git a/arch/mips/lantiq/xway/prom-xway.c b/arch/mips/lantiq/xway/prom-xway.c
index 1686692ac24d..2228133ca356 100644
--- a/arch/mips/lantiq/xway/prom-xway.c
+++ b/arch/mips/lantiq/xway/prom-xway.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <asm/bootinfo.h> 11#include <asm/bootinfo.h>
12#include <asm/time.h> 12#include <asm/time.h>
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index a1be36d0e490..3d41f0bb5bf7 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -10,7 +10,7 @@
10#include <linux/io.h> 10#include <linux/io.h>
11#include <linux/ioport.h> 11#include <linux/ioport.h>
12#include <linux/pm.h> 12#include <linux/pm.h>
13#include <linux/module.h> 13#include <linux/export.h>
14#include <asm/reboot.h> 14#include <asm/reboot.h>
15 15
16#include <lantiq_soc.h> 16#include <lantiq_soc.h>
diff --git a/arch/mips/nxp/pnx8550/common/pci.c b/arch/mips/nxp/pnx8550/common/pci.c
deleted file mode 100644
index 98e86ddb86cc..000000000000
--- a/arch/mips/nxp/pnx8550/common/pci.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 *
5 * Author: source@mvista.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20#include <linux/types.h>
21#include <linux/pci.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24
25#include <pci.h>
26#include <glb.h>
27#include <nand.h>
28
29static struct resource pci_io_resource = {
30 .start = PNX8550_PCIIO + 0x1000, /* reserve regacy I/O space */
31 .end = PNX8550_PCIIO + PNX8550_PCIIO_SIZE,
32 .name = "pci IO space",
33 .flags = IORESOURCE_IO
34};
35
36static struct resource pci_mem_resource = {
37 .start = PNX8550_PCIMEM,
38 .end = PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1,
39 .name = "pci memory space",
40 .flags = IORESOURCE_MEM
41};
42
43extern struct pci_ops pnx8550_pci_ops;
44
45static struct pci_controller pnx8550_controller = {
46 .pci_ops = &pnx8550_pci_ops,
47 .io_map_base = PNX8550_PORT_BASE,
48 .io_resource = &pci_io_resource,
49 .mem_resource = &pci_mem_resource,
50};
51
52/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
53static inline unsigned long get_system_mem_size(void)
54{
55 /* Read IP2031_RANK0_ADDR_LO */
56 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
57 /* Read IP2031_RANK1_ADDR_HI */
58 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
59
60 return dram_r1_hi - dram_r0_lo + 1;
61}
62
63static int __init pnx8550_pci_setup(void)
64{
65 int pci_mem_code;
66 int mem_size = get_system_mem_size() >> 20;
67
68 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
69 Bit 1:Enable DAC Powerdown
70 -> 0:DACs are enabled and are working normally
71 1:DACs are powerdown
72 Bit 0:Enable of PCI inta output
73 -> 0 = Disable PCI inta output
74 1 = Enable PCI inta output
75 */
76 PNX8550_GLB2_ENAB_INTA_O = 0;
77
78 /* Calc the PCI mem size code */
79 if (mem_size >= 128)
80 pci_mem_code = SIZE_128M;
81 else if (mem_size >= 64)
82 pci_mem_code = SIZE_64M;
83 else if (mem_size >= 32)
84 pci_mem_code = SIZE_32M;
85 else
86 pci_mem_code = SIZE_16M;
87
88 /* Set PCI_XIO registers */
89 outl(pci_mem_resource.start, PCI_BASE | PCI_BASE1_LO);
90 outl(pci_mem_resource.end + 1, PCI_BASE | PCI_BASE1_HI);
91 outl(pci_io_resource.start, PCI_BASE | PCI_BASE2_LO);
92 outl(pci_io_resource.end, PCI_BASE | PCI_BASE2_HI);
93
94 /* Send memory transaction via PCI_BASE2 */
95 outl(0x00000001, PCI_BASE | PCI_IO);
96
97 /* Unlock the setup register */
98 outl(0xca, PCI_BASE | PCI_UNLOCKREG);
99
100 /*
101 * BAR0 of PNX8550 (pci base 10) must be zero in order for ide
102 * to work, and in order for bus_to_baddr to work without any
103 * hacks.
104 */
105 outl(0x00000000, PCI_BASE | PCI_BASE10);
106
107 /*
108 *These two bars are set by default or the boot code.
109 * However, it's safer to set them here so we're not boot
110 * code dependent.
111 */
112 outl(0x1be00000, PCI_BASE | PCI_BASE14); /* PNX MMIO */
113 outl(PNX8550_NAND_BASE_ADDR, PCI_BASE | PCI_BASE18); /* XIO */
114
115 outl(PCI_EN_TA |
116 PCI_EN_PCI2MMI |
117 PCI_EN_XIO |
118 PCI_SETUP_BASE18_SIZE(SIZE_32M) |
119 PCI_SETUP_BASE18_EN |
120 PCI_SETUP_BASE14_EN |
121 PCI_SETUP_BASE10_PREF |
122 PCI_SETUP_BASE10_SIZE(pci_mem_code) |
123 PCI_SETUP_CFGMANAGE_EN |
124 PCI_SETUP_PCIARB_EN,
125 PCI_BASE |
126 PCI_SETUP); /* PCI_SETUP */
127 outl(0x00000000, PCI_BASE | PCI_CTRL); /* PCI_CONTROL */
128
129 register_pci_controller(&pnx8550_controller);
130
131 return 0;
132}
133
134arch_initcall(pnx8550_pci_setup);
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c
deleted file mode 100644
index 71adac323323..000000000000
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 *
3 * 2.6 port, Embedded Alley Solutions, Inc
4 *
5 * Based on Per Hallsmark, per.hallsmark@mvista.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20#include <linux/init.h>
21#include <linux/sched.h>
22#include <linux/ioport.h>
23#include <linux/irq.h>
24#include <linux/mm.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/serial_pnx8xxx.h>
28#include <linux/pm.h>
29
30#include <asm/cpu.h>
31#include <asm/bootinfo.h>
32#include <asm/irq.h>
33#include <asm/mipsregs.h>
34#include <asm/reboot.h>
35#include <asm/pgtable.h>
36#include <asm/time.h>
37
38#include <glb.h>
39#include <int.h>
40#include <pci.h>
41#include <uart.h>
42#include <nand.h>
43
44extern void __init board_setup(void);
45extern void pnx8550_machine_restart(char *);
46extern void pnx8550_machine_halt(void);
47extern void pnx8550_machine_power_off(void);
48extern struct resource ioport_resource;
49extern struct resource iomem_resource;
50extern char *prom_getcmdline(void);
51
52struct resource standard_io_resources[] = {
53 {
54 .start = 0x00,
55 .end = 0x1f,
56 .name = "dma1",
57 .flags = IORESOURCE_BUSY
58 }, {
59 .start = 0x40,
60 .end = 0x5f,
61 .name = "timer",
62 .flags = IORESOURCE_BUSY
63 }, {
64 .start = 0x80,
65 .end = 0x8f,
66 .name = "dma page reg",
67 .flags = IORESOURCE_BUSY
68 }, {
69 .start = 0xc0,
70 .end = 0xdf,
71 .name = "dma2",
72 .flags = IORESOURCE_BUSY
73 },
74};
75
76#define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources)
77
78extern struct resource pci_io_resource;
79extern struct resource pci_mem_resource;
80
81/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
82unsigned long get_system_mem_size(void)
83{
84 /* Read IP2031_RANK0_ADDR_LO */
85 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
86 /* Read IP2031_RANK1_ADDR_HI */
87 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
88
89 return dram_r1_hi - dram_r0_lo + 1;
90}
91
92int pnx8550_console_port = -1;
93
94void __init plat_mem_setup(void)
95{
96 int i;
97 char* argptr;
98
99 board_setup(); /* board specific setup */
100
101 _machine_restart = pnx8550_machine_restart;
102 _machine_halt = pnx8550_machine_halt;
103 pm_power_off = pnx8550_machine_power_off;
104
105 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
106 Bit 1:Enable DAC Powerdown
107 -> 0:DACs are enabled and are working normally
108 1:DACs are powerdown
109 Bit 0:Enable of PCI inta output
110 -> 0 = Disable PCI inta output
111 1 = Enable PCI inta output
112 */
113 PNX8550_GLB2_ENAB_INTA_O = 0;
114
115 /* IO/MEM resources. */
116 set_io_port_base(PNX8550_PORT_BASE);
117 ioport_resource.start = 0;
118 ioport_resource.end = ~0;
119 iomem_resource.start = 0;
120 iomem_resource.end = ~0;
121
122 /* Request I/O space for devices on this board */
123 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
124 request_resource(&ioport_resource, standard_io_resources + i);
125
126 /* Place the Mode Control bit for GPIO pin 16 in primary function */
127 /* Pin 16 is used by UART1, UA1_TX */
128 outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |
129 (PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),
130 PNX8550_GPIO_MC1);
131
132 argptr = prom_getcmdline();
133 if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {
134 argptr += strlen("console=ttyS");
135 pnx8550_console_port = *argptr == '0' ? 0 : 1;
136
137 /* We must initialize the UART (console) before early printk */
138 /* Set LCR to 8-bit and BAUD to 38400 (no 5) */
139 ip3106_lcr(UART_BASE, pnx8550_console_port) =
140 PNX8XXX_UART_LCR_8BIT;
141 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
142 }
143}
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 4ee57104e47b..b5ce041cdafb 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -7,6 +7,7 @@
7 * Support for all devices (greater than 16) added by David Gathright. 7 * Support for all devices (greater than 16) added by David Gathright.
8 */ 8 */
9 9
10#include <linux/export.h>
10#include <linux/types.h> 11#include <linux/types.h>
11#include <linux/pci.h> 12#include <linux/pci.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index 8656388b34bd..be1e1afe12c3 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -13,6 +13,7 @@
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/vmalloc.h> 15#include <linux/vmalloc.h>
16#include <linux/export.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
17 18
18#include <asm/pci.h> 19#include <asm/pci.h>
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index cf4c868715ac..dcc926e06fce 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -102,7 +102,7 @@ void __init prom_init(void)
102 102
103 /* Get the boot parameters */ 103 /* Get the boot parameters */
104 for (i = 1; i < argc; i++) { 104 for (i = 1; i < argc; i++) {
105 if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >= 105 if (strlen(arcs_cmdline) + strlen(arg[i]) + 1 >=
106 sizeof(arcs_cmdline)) 106 sizeof(arcs_cmdline))
107 break; 107 break;
108 108