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authorPaul Bolle <pebolle@tiscali.nl>2014-02-09 08:32:25 -0500
committerRalf Baechle <ralf@linux-mips.org>2014-03-14 12:49:16 -0400
commitf5868f05dc976ecd849d2a8115fab80301c127cd (patch)
tree45399eb1d5b31953bf20f5cb53017cc64081465d /arch/mips
parent51061b8876a3906aa5bf173582f180596f9d6455 (diff)
MIPS: Replace CONFIG_MIPS64 and CONFIG_MIPS32_R2
Commit 597ce1723e0f ("MIPS: Support for 64-bit FP with O32 binaries") introduced references to two undefined Kconfig macros. CONFIG_MIPS32_R2 should clearly be replaced with CONFIG_CPU_MIPS32_R2. And CONFIG_MIPS64 should be replaced with CONFIG_64BIT. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6522/ Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/asmmacro.h4
-rw-r--r--arch/mips/include/asm/fpu.h2
-rw-r--r--arch/mips/kernel/r4k_fpu.S8
3 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 3220c93ea981..69a9a22d014a 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -106,7 +106,7 @@
106 .endm 106 .endm
107 107
108 .macro fpu_save_double thread status tmp 108 .macro fpu_save_double thread status tmp
109#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) 109#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
110 sll \tmp, \status, 5 110 sll \tmp, \status, 5
111 bgez \tmp, 10f 111 bgez \tmp, 10f
112 fpu_save_16odd \thread 112 fpu_save_16odd \thread
@@ -159,7 +159,7 @@
159 .endm 159 .endm
160 160
161 .macro fpu_restore_double thread status tmp 161 .macro fpu_restore_double thread status tmp
162#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) 162#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
163 sll \tmp, \status, 5 163 sll \tmp, \status, 5
164 bgez \tmp, 10f # 16 register mode? 164 bgez \tmp, 10f # 16 register mode?
165 165
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 6b9749540edf..58e50cbdb1a6 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -57,7 +57,7 @@ static inline int __enable_fpu(enum fpu_mode mode)
57 return 0; 57 return 0;
58 58
59 case FPU_64BIT: 59 case FPU_64BIT:
60#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_MIPS64)) 60#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT))
61 /* we only have a 32-bit FPU */ 61 /* we only have a 32-bit FPU */
62 return SIGFPE; 62 return SIGFPE;
63#endif 63#endif
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 253b2fb52026..841ffc234464 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -35,9 +35,9 @@
35LEAF(_save_fp_context) 35LEAF(_save_fp_context)
36 cfc1 t1, fcr31 36 cfc1 t1, fcr31
37 37
38#if defined(CONFIG_64BIT) || defined(CONFIG_MIPS32_R2) 38#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
39 .set push 39 .set push
40#ifdef CONFIG_MIPS32_R2 40#ifdef CONFIG_CPU_MIPS32_R2
41 .set mips64r2 41 .set mips64r2
42 mfc0 t0, CP0_STATUS 42 mfc0 t0, CP0_STATUS
43 sll t0, t0, 5 43 sll t0, t0, 5
@@ -148,9 +148,9 @@ LEAF(_save_fp_context32)
148LEAF(_restore_fp_context) 148LEAF(_restore_fp_context)
149 EX lw t0, SC_FPC_CSR(a0) 149 EX lw t0, SC_FPC_CSR(a0)
150 150
151#if defined(CONFIG_64BIT) || defined(CONFIG_MIPS32_R2) 151#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
152 .set push 152 .set push
153#ifdef CONFIG_MIPS32_R2 153#ifdef CONFIG_CPU_MIPS32_R2
154 .set mips64r2 154 .set mips64r2
155 mfc0 t0, CP0_STATUS 155 mfc0 t0, CP0_STATUS
156 sll t0, t0, 5 156 sll t0, t0, 5