diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-10 18:25:41 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-10 18:25:41 -0400 |
commit | f0d5e12bd42b7173ebbbf59279c867605f859814 (patch) | |
tree | f4018a726ecd2cf520afdf27210bfec1f3181718 /arch/mips | |
parent | 0fea615e526b4b7eff0363ee02d5753e5f924089 (diff) | |
parent | 103428e57be323c3c5545db8ad12667099bc6005 (diff) |
Merge branch 'irq-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'irq-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (76 commits)
x86, apic: Fix dummy apic read operation together with broken MP handling
x86, apic: Restore irqs on fail paths
x86: Print real IOAPIC version for x86-64
x86: enable_update_mptable should be a macro
sparseirq: Allow early irq_desc allocation
x86, io-apic: Don't mark pin_programmed early
x86, irq: don't call mp_config_acpi_gsi() if update_mptable is not enabled
x86, irq: update_mptable needs pci_routeirq
x86: don't call read_apic_id if !cpu_has_apic
x86, apic: introduce io_apic_irq_attr
x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector(), fix
x86: read apic ID in the !acpi_lapic case
x86: apic: Fixmap apic address even if apic disabled
x86: display extended apic registers with print_local_APIC and cpu_debug code
x86: read apic ID in the !acpi_lapic case
x86: clean up and fix setup_clear/force_cpu_cap handling
x86: apic: Check rev 3 fadt correctly for physical_apic bit
x86/pci: update pirq_enable_irq() to setup io apic routing
x86/acpi: move setup io apic routing out of CONFIG_ACPI scope
x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector()
...
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/cavium-octeon/octeon-irq.c | 8 | ||||
-rw-r--r-- | arch/mips/include/asm/irq.h | 2 | ||||
-rw-r--r-- | arch/mips/kernel/irq-gic.c | 5 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-smtc.c | 4 | ||||
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 8 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 8 |
6 files changed, 23 insertions, 12 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 1c19af8daa62..d3a0c8154bec 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c | |||
@@ -177,7 +177,7 @@ static void octeon_irq_ciu0_disable(unsigned int irq) | |||
177 | } | 177 | } |
178 | 178 | ||
179 | #ifdef CONFIG_SMP | 179 | #ifdef CONFIG_SMP |
180 | static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) | 180 | static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) |
181 | { | 181 | { |
182 | int cpu; | 182 | int cpu; |
183 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ | 183 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ |
@@ -199,6 +199,8 @@ static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask | |||
199 | */ | 199 | */ |
200 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); | 200 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); |
201 | write_unlock(&octeon_irq_ciu0_rwlock); | 201 | write_unlock(&octeon_irq_ciu0_rwlock); |
202 | |||
203 | return 0; | ||
202 | } | 204 | } |
203 | #endif | 205 | #endif |
204 | 206 | ||
@@ -292,7 +294,7 @@ static void octeon_irq_ciu1_disable(unsigned int irq) | |||
292 | } | 294 | } |
293 | 295 | ||
294 | #ifdef CONFIG_SMP | 296 | #ifdef CONFIG_SMP |
295 | static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest) | 297 | static int octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest) |
296 | { | 298 | { |
297 | int cpu; | 299 | int cpu; |
298 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ | 300 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ |
@@ -315,6 +317,8 @@ static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask | |||
315 | */ | 317 | */ |
316 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); | 318 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); |
317 | write_unlock(&octeon_irq_ciu1_rwlock); | 319 | write_unlock(&octeon_irq_ciu1_rwlock); |
320 | |||
321 | return 0; | ||
318 | } | 322 | } |
319 | #endif | 323 | #endif |
320 | 324 | ||
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 3214ade02d10..4f1eed107b08 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h | |||
@@ -49,7 +49,7 @@ static inline void smtc_im_ack_irq(unsigned int irq) | |||
49 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF | 49 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF |
50 | #include <linux/cpumask.h> | 50 | #include <linux/cpumask.h> |
51 | 51 | ||
52 | extern void plat_set_irq_affinity(unsigned int irq, | 52 | extern int plat_set_irq_affinity(unsigned int irq, |
53 | const struct cpumask *affinity); | 53 | const struct cpumask *affinity); |
54 | extern void smtc_forward_irq(unsigned int irq); | 54 | extern void smtc_forward_irq(unsigned int irq); |
55 | 55 | ||
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 87deb8f6c458..3f43c2e3aa5a 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c | |||
@@ -155,7 +155,7 @@ static void gic_unmask_irq(unsigned int irq) | |||
155 | 155 | ||
156 | static DEFINE_SPINLOCK(gic_lock); | 156 | static DEFINE_SPINLOCK(gic_lock); |
157 | 157 | ||
158 | static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | 158 | static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
159 | { | 159 | { |
160 | cpumask_t tmp = CPU_MASK_NONE; | 160 | cpumask_t tmp = CPU_MASK_NONE; |
161 | unsigned long flags; | 161 | unsigned long flags; |
@@ -166,7 +166,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
166 | 166 | ||
167 | cpumask_and(&tmp, cpumask, cpu_online_mask); | 167 | cpumask_and(&tmp, cpumask, cpu_online_mask); |
168 | if (cpus_empty(tmp)) | 168 | if (cpus_empty(tmp)) |
169 | return; | 169 | return -1; |
170 | 170 | ||
171 | /* Assumption : cpumask refers to a single CPU */ | 171 | /* Assumption : cpumask refers to a single CPU */ |
172 | spin_lock_irqsave(&gic_lock, flags); | 172 | spin_lock_irqsave(&gic_lock, flags); |
@@ -190,6 +190,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
190 | cpumask_copy(irq_desc[irq].affinity, cpumask); | 190 | cpumask_copy(irq_desc[irq].affinity, cpumask); |
191 | spin_unlock_irqrestore(&gic_lock, flags); | 191 | spin_unlock_irqrestore(&gic_lock, flags); |
192 | 192 | ||
193 | return 0; | ||
193 | } | 194 | } |
194 | #endif | 195 | #endif |
195 | 196 | ||
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c index 5ba31888fefb..499ffe5475df 100644 --- a/arch/mips/mti-malta/malta-smtc.c +++ b/arch/mips/mti-malta/malta-smtc.c | |||
@@ -114,7 +114,7 @@ struct plat_smp_ops msmtc_smp_ops = { | |||
114 | */ | 114 | */ |
115 | 115 | ||
116 | 116 | ||
117 | void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | 117 | int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) |
118 | { | 118 | { |
119 | cpumask_t tmask; | 119 | cpumask_t tmask; |
120 | int cpu = 0; | 120 | int cpu = 0; |
@@ -156,5 +156,7 @@ void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | |||
156 | 156 | ||
157 | /* Do any generic SMTC IRQ affinity setup */ | 157 | /* Do any generic SMTC IRQ affinity setup */ |
158 | smtc_set_irq_affinity(irq, tmask); | 158 | smtc_set_irq_affinity(irq, tmask); |
159 | |||
160 | return 0; | ||
159 | } | 161 | } |
160 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ | 162 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index c147c4b35d3f..690de06bde90 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq); | |||
50 | static void disable_bcm1480_irq(unsigned int irq); | 50 | static void disable_bcm1480_irq(unsigned int irq); |
51 | static void ack_bcm1480_irq(unsigned int irq); | 51 | static void ack_bcm1480_irq(unsigned int irq); |
52 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
53 | static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); | 53 | static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #ifdef CONFIG_PCI | 56 | #ifdef CONFIG_PCI |
@@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq) | |||
109 | } | 109 | } |
110 | 110 | ||
111 | #ifdef CONFIG_SMP | 111 | #ifdef CONFIG_SMP |
112 | static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | 112 | static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) |
113 | { | 113 | { |
114 | int i = 0, old_cpu, cpu, int_on, k; | 114 | int i = 0, old_cpu, cpu, int_on, k; |
115 | u64 cur_ints; | 115 | u64 cur_ints; |
@@ -118,7 +118,7 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
118 | 118 | ||
119 | if (cpumask_weight(mask) != 1) { | 119 | if (cpumask_weight(mask) != 1) { |
120 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); | 120 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); |
121 | return; | 121 | return -1; |
122 | } | 122 | } |
123 | i = cpumask_first(mask); | 123 | i = cpumask_first(mask); |
124 | 124 | ||
@@ -152,6 +152,8 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
152 | } | 152 | } |
153 | } | 153 | } |
154 | spin_unlock_irqrestore(&bcm1480_imr_lock, flags); | 154 | spin_unlock_irqrestore(&bcm1480_imr_lock, flags); |
155 | |||
156 | return 0; | ||
155 | } | 157 | } |
156 | #endif | 158 | #endif |
157 | 159 | ||
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 38cb998ade22..409dec798863 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq); | |||
50 | static void disable_sb1250_irq(unsigned int irq); | 50 | static void disable_sb1250_irq(unsigned int irq); |
51 | static void ack_sb1250_irq(unsigned int irq); | 51 | static void ack_sb1250_irq(unsigned int irq); |
52 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
53 | static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); | 53 | static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #ifdef CONFIG_SIBYTE_HAS_LDT | 56 | #ifdef CONFIG_SIBYTE_HAS_LDT |
@@ -103,7 +103,7 @@ void sb1250_unmask_irq(int cpu, int irq) | |||
103 | } | 103 | } |
104 | 104 | ||
105 | #ifdef CONFIG_SMP | 105 | #ifdef CONFIG_SMP |
106 | static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | 106 | static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) |
107 | { | 107 | { |
108 | int i = 0, old_cpu, cpu, int_on; | 108 | int i = 0, old_cpu, cpu, int_on; |
109 | u64 cur_ints; | 109 | u64 cur_ints; |
@@ -113,7 +113,7 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
113 | 113 | ||
114 | if (cpumask_weight(mask) > 1) { | 114 | if (cpumask_weight(mask) > 1) { |
115 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); | 115 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); |
116 | return; | 116 | return -1; |
117 | } | 117 | } |
118 | 118 | ||
119 | /* Convert logical CPU to physical CPU */ | 119 | /* Convert logical CPU to physical CPU */ |
@@ -143,6 +143,8 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
143 | R_IMR_INTERRUPT_MASK)); | 143 | R_IMR_INTERRUPT_MASK)); |
144 | } | 144 | } |
145 | spin_unlock_irqrestore(&sb1250_imr_lock, flags); | 145 | spin_unlock_irqrestore(&sb1250_imr_lock, flags); |
146 | |||
147 | return 0; | ||
146 | } | 148 | } |
147 | #endif | 149 | #endif |
148 | 150 | ||