diff options
author | Zhang Le <r0bertz@gentoo.org> | 2009-04-02 03:41:45 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-05-14 08:50:25 -0400 |
commit | a575b8453944c5911a2a6f51d0096fffba82dd48 (patch) | |
tree | d484624f66c354281003966767468483ff1b9102 /arch/mips | |
parent | 7fc7316aa82fb3874f69689bd36134afea9c8bfd (diff) |
MIPS: Add Loongson cpu-feature-overrides.h
I have taken Wu Zhangjin's and Philippe Vachon's version as references,
did a little modification and tested on 16K page size kernel. It works
well.
Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k
page size still not working. More work needed here.
Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h new file mode 100644 index 000000000000..550a10dc9dba --- /dev/null +++ b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h | |||
@@ -0,0 +1,59 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com> | ||
7 | * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca> | ||
8 | * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org> | ||
9 | * | ||
10 | * reference: /proc/cpuinfo, | ||
11 | * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy), | ||
12 | * arch/mips/kernel/proc.c(show_cpuinfo), | ||
13 | * loongson2f user manual. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H | ||
17 | #define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H | ||
18 | |||
19 | #define cpu_dcache_line_size() 32 | ||
20 | #define cpu_icache_line_size() 32 | ||
21 | #define cpu_scache_line_size() 32 | ||
22 | |||
23 | |||
24 | #define cpu_has_32fpr 1 | ||
25 | #define cpu_has_3k_cache 0 | ||
26 | #define cpu_has_4k_cache 1 | ||
27 | #define cpu_has_4kex 1 | ||
28 | #define cpu_has_64bits 1 | ||
29 | #define cpu_has_cache_cdex_p 0 | ||
30 | #define cpu_has_cache_cdex_s 0 | ||
31 | #define cpu_has_counter 1 | ||
32 | #define cpu_has_dc_aliases 1 | ||
33 | #define cpu_has_divec 0 | ||
34 | #define cpu_has_dsp 0 | ||
35 | #define cpu_has_ejtag 0 | ||
36 | #define cpu_has_fpu 1 | ||
37 | #define cpu_has_ic_fills_f_dc 0 | ||
38 | #define cpu_has_inclusive_pcaches 1 | ||
39 | #define cpu_has_llsc 1 | ||
40 | #define cpu_has_mcheck 0 | ||
41 | #define cpu_has_mdmx 0 | ||
42 | #define cpu_has_mips16 0 | ||
43 | #define cpu_has_mips32r1 0 | ||
44 | #define cpu_has_mips32r2 0 | ||
45 | #define cpu_has_mips3d 0 | ||
46 | #define cpu_has_mips64r1 0 | ||
47 | #define cpu_has_mips64r2 0 | ||
48 | #define cpu_has_mipsmt 0 | ||
49 | #define cpu_has_prefetch 0 | ||
50 | #define cpu_has_smartmips 0 | ||
51 | #define cpu_has_tlb 1 | ||
52 | #define cpu_has_tx39_cache 0 | ||
53 | #define cpu_has_userlocal 0 | ||
54 | #define cpu_has_vce 0 | ||
55 | #define cpu_has_vtag_icache 0 | ||
56 | #define cpu_has_watch 1 | ||
57 | #define cpu_icache_snoops_remote_store 1 | ||
58 | |||
59 | #endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */ | ||