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authorDavid VomLehn <dvomlehn@cisco.com>2009-08-30 20:15:11 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-12-16 20:57:17 -0500
commita3a0f8c8ed2e2470f4dcd6da95020d41fed84747 (patch)
treef91ffa7ce5752c6debb79981f206865057413e9c /arch/mips
parent13e79b462212ac46a046932af06117eaf7a9f77b (diff)
MIPS: PowerTV: Base files for Cisco PowerTV platform
Add the Cisco Powertv cable settop box to the MIPS tree. This platform is based on a MIPS 24Kc processor with various devices integrated on the same ASIC. There are multiple models of this box, with differing configuration but the same kernel runs across the product line. Signed-off-by: David VomLehn <dvomlehn@cisco.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig22
-rw-r--r--arch/mips/Makefile7
-rw-r--r--arch/mips/configs/powertv_defconfig1549
-rw-r--r--arch/mips/include/asm/mach-powertv/asic.h107
-rw-r--r--arch/mips/include/asm/mach-powertv/asic_regs.h155
-rw-r--r--arch/mips/include/asm/mach-powertv/dma-coherence.h119
-rw-r--r--arch/mips/include/asm/mach-powertv/interrupts.h254
-rw-r--r--arch/mips/include/asm/mach-powertv/ioremap.h90
-rw-r--r--arch/mips/include/asm/mach-powertv/irq.h25
-rw-r--r--arch/mips/include/asm/mach-powertv/powertv-clock.h29
-rw-r--r--arch/mips/include/asm/mach-powertv/war.h28
-rw-r--r--arch/mips/kernel/Makefile1
-rw-r--r--arch/mips/kernel/csrc-powertv.c180
-rw-r--r--arch/mips/powertv/Kconfig21
-rw-r--r--arch/mips/powertv/Makefile28
-rw-r--r--arch/mips/powertv/asic/Kconfig28
-rw-r--r--arch/mips/powertv/asic/Makefile23
-rw-r--r--arch/mips/powertv/asic/asic-calliope.c98
-rw-r--r--arch/mips/powertv/asic/asic-cronus.c98
-rw-r--r--arch/mips/powertv/asic/asic-zeus.c98
-rw-r--r--arch/mips/powertv/asic/asic_devices.c787
-rw-r--r--arch/mips/powertv/asic/asic_int.c125
-rw-r--r--arch/mips/powertv/asic/irq_asic.c116
-rw-r--r--arch/mips/powertv/asic/prealloc-calliope.c620
-rw-r--r--arch/mips/powertv/asic/prealloc-cronus.c608
-rw-r--r--arch/mips/powertv/asic/prealloc-cronuslite.c290
-rw-r--r--arch/mips/powertv/asic/prealloc-zeus.c459
-rw-r--r--arch/mips/powertv/cmdline.c52
-rw-r--r--arch/mips/powertv/init.c128
-rw-r--r--arch/mips/powertv/init.h28
-rw-r--r--arch/mips/powertv/memory.c186
-rw-r--r--arch/mips/powertv/pci/Makefile21
-rw-r--r--arch/mips/powertv/pci/fixup-powertv.c36
-rw-r--r--arch/mips/powertv/pci/powertv-pci.h31
-rw-r--r--arch/mips/powertv/powertv-clock.h26
-rw-r--r--arch/mips/powertv/powertv_setup.c351
-rw-r--r--arch/mips/powertv/reset.c65
-rw-r--r--arch/mips/powertv/reset.h26
-rw-r--r--arch/mips/powertv/time.c37
39 files changed, 6952 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e2116b1f968e..e7f385444d41 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -338,6 +338,24 @@ config PMC_YOSEMITE
338 Yosemite is an evaluation board for the RM9000x2 processor 338 Yosemite is an evaluation board for the RM9000x2 processor
339 manufactured by PMC-Sierra. 339 manufactured by PMC-Sierra.
340 340
341config POWERTV
342 bool "Cisco PowerTV"
343 select BOOT_ELF32
344 select CEVT_R4K
345 select CPU_MIPSR2_IRQ_VI
346 select CPU_MIPSR2_IRQ_EI
347 select CSRC_POWERTV
348 select DMA_NONCOHERENT
349 select HW_HAS_PCI
350 select SYS_HAS_EARLY_PRINTK
351 select SYS_HAS_CPU_MIPS32_R2
352 select SYS_SUPPORTS_32BIT_KERNEL
353 select SYS_SUPPORTS_BIG_ENDIAN
354 select SYS_SUPPORTS_HIGHMEM
355 select USB_OHCI_LITTLE_ENDIAN
356 help
357 This enables support for the Cisco PowerTV Platform.
358
341config SGI_IP22 359config SGI_IP22
342 bool "SGI IP22 (Indy/Indigo2)" 360 bool "SGI IP22 (Indy/Indigo2)"
343 select ARC 361 select ARC
@@ -683,6 +701,7 @@ source "arch/mips/bcm63xx/Kconfig"
683source "arch/mips/jazz/Kconfig" 701source "arch/mips/jazz/Kconfig"
684source "arch/mips/lasat/Kconfig" 702source "arch/mips/lasat/Kconfig"
685source "arch/mips/pmc-sierra/Kconfig" 703source "arch/mips/pmc-sierra/Kconfig"
704source "arch/mips/powertv/Kconfig"
686source "arch/mips/sgi-ip27/Kconfig" 705source "arch/mips/sgi-ip27/Kconfig"
687source "arch/mips/sibyte/Kconfig" 706source "arch/mips/sibyte/Kconfig"
688source "arch/mips/txx9/Kconfig" 707source "arch/mips/txx9/Kconfig"
@@ -782,6 +801,9 @@ config CSRC_BCM1480
782config CSRC_IOASIC 801config CSRC_IOASIC
783 bool 802 bool
784 803
804config CSRC_POWERTV
805 bool
806
785config CSRC_R4K_LIB 807config CSRC_R4K_LIB
786 bool 808 bool
787 809
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 184d5beb278d..0a7e6146bb4b 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -445,6 +445,13 @@ core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/
445load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000 445load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
446 446
447# 447#
448# Cisco PowerTV Platform
449#
450core-$(CONFIG_POWERTV) += arch/mips/powertv/
451cflags-$(CONFIG_POWERTV) += -I$(srctree)/arch/mips/include/asm/mach-powertv
452load-$(CONFIG_POWERTV) += 0xffffffff90800000
453
454#
448# SGI IP22 (Indy/Indigo2) 455# SGI IP22 (Indy/Indigo2)
449# 456#
450# Set the load address to >= 0xffffffff88069000 if you want to leave space for 457# Set the load address to >= 0xffffffff88069000 if you want to leave space for
diff --git a/arch/mips/configs/powertv_defconfig b/arch/mips/configs/powertv_defconfig
new file mode 100644
index 000000000000..3aff69ab6c32
--- /dev/null
+++ b/arch/mips/configs/powertv_defconfig
@@ -0,0 +1,1549 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc5
4# Fri Aug 28 14:49:33 2009
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_AR7 is not set
13# CONFIG_BASLER_EXCITE is not set
14# CONFIG_BCM47XX is not set
15# CONFIG_MIPS_COBALT is not set
16# CONFIG_MACH_DECSTATION is not set
17# CONFIG_MACH_JAZZ is not set
18# CONFIG_LASAT is not set
19# CONFIG_LEMOTE_FULONG is not set
20# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SIM is not set
22# CONFIG_NEC_MARKEINS is not set
23# CONFIG_MACH_VR41XX is not set
24# CONFIG_NXP_STB220 is not set
25# CONFIG_NXP_STB225 is not set
26# CONFIG_PNX8550_JBS is not set
27# CONFIG_PNX8550_STB810 is not set
28# CONFIG_PMC_MSP is not set
29# CONFIG_PMC_YOSEMITE is not set
30CONFIG_POWERTV=y
31# CONFIG_SGI_IP22 is not set
32# CONFIG_SGI_IP27 is not set
33# CONFIG_SGI_IP28 is not set
34# CONFIG_SGI_IP32 is not set
35# CONFIG_SIBYTE_CRHINE is not set
36# CONFIG_SIBYTE_CARMEL is not set
37# CONFIG_SIBYTE_CRHONE is not set
38# CONFIG_SIBYTE_RHONE is not set
39# CONFIG_SIBYTE_SWARM is not set
40# CONFIG_SIBYTE_LITTLESUR is not set
41# CONFIG_SIBYTE_SENTOSA is not set
42# CONFIG_SIBYTE_BIGSUR is not set
43# CONFIG_SNI_RM is not set
44# CONFIG_MACH_TX39XX is not set
45# CONFIG_MACH_TX49XX is not set
46# CONFIG_MIKROTIK_RB532 is not set
47# CONFIG_WR_PPMC is not set
48# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
49# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
50# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
51# CONFIG_MIN_RUNTIME_RESOURCES is not set
52# CONFIG_BOOTLOADER_DRIVER is not set
53CONFIG_BOOTLOADER_FAMILY="R2"
54CONFIG_CSRC_POWERTV=y
55CONFIG_RWSEM_GENERIC_SPINLOCK=y
56# CONFIG_ARCH_HAS_ILOG2_U32 is not set
57# CONFIG_ARCH_HAS_ILOG2_U64 is not set
58CONFIG_ARCH_SUPPORTS_OPROFILE=y
59CONFIG_GENERIC_FIND_NEXT_BIT=y
60CONFIG_GENERIC_HWEIGHT=y
61CONFIG_GENERIC_CALIBRATE_DELAY=y
62CONFIG_GENERIC_CLOCKEVENTS=y
63CONFIG_GENERIC_TIME=y
64CONFIG_GENERIC_CMOS_UPDATE=y
65CONFIG_SCHED_OMIT_FRAME_POINTER=y
66CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
67CONFIG_CEVT_R4K_LIB=y
68CONFIG_CEVT_R4K=y
69CONFIG_DMA_NONCOHERENT=y
70CONFIG_DMA_NEED_PCI_MAP_STATE=y
71# CONFIG_EARLY_PRINTK is not set
72CONFIG_SYS_HAS_EARLY_PRINTK=y
73# CONFIG_NO_IOPORT is not set
74CONFIG_CPU_BIG_ENDIAN=y
75# CONFIG_CPU_LITTLE_ENDIAN is not set
76CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
77CONFIG_BOOT_ELF32=y
78CONFIG_MIPS_L1_CACHE_SHIFT=5
79
80#
81# CPU selection
82#
83# CONFIG_CPU_LOONGSON2 is not set
84# CONFIG_CPU_MIPS32_R1 is not set
85CONFIG_CPU_MIPS32_R2=y
86# CONFIG_CPU_MIPS64_R1 is not set
87# CONFIG_CPU_MIPS64_R2 is not set
88# CONFIG_CPU_R3000 is not set
89# CONFIG_CPU_TX39XX is not set
90# CONFIG_CPU_VR41XX is not set
91# CONFIG_CPU_R4300 is not set
92# CONFIG_CPU_R4X00 is not set
93# CONFIG_CPU_TX49XX is not set
94# CONFIG_CPU_R5000 is not set
95# CONFIG_CPU_R5432 is not set
96# CONFIG_CPU_R5500 is not set
97# CONFIG_CPU_R6000 is not set
98# CONFIG_CPU_NEVADA is not set
99# CONFIG_CPU_R8000 is not set
100# CONFIG_CPU_R10000 is not set
101# CONFIG_CPU_RM7000 is not set
102# CONFIG_CPU_RM9000 is not set
103# CONFIG_CPU_SB1 is not set
104# CONFIG_CPU_CAVIUM_OCTEON is not set
105CONFIG_SYS_HAS_CPU_MIPS32_R2=y
106CONFIG_CPU_MIPS32=y
107CONFIG_CPU_MIPSR2=y
108CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
109CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
110CONFIG_HARDWARE_WATCHPOINTS=y
111
112#
113# Kernel type
114#
115CONFIG_32BIT=y
116# CONFIG_64BIT is not set
117CONFIG_PAGE_SIZE_4KB=y
118# CONFIG_PAGE_SIZE_8KB is not set
119# CONFIG_PAGE_SIZE_16KB is not set
120# CONFIG_PAGE_SIZE_32KB is not set
121# CONFIG_PAGE_SIZE_64KB is not set
122CONFIG_CPU_HAS_PREFETCH=y
123CONFIG_MIPS_MT_DISABLED=y
124# CONFIG_MIPS_MT_SMP is not set
125# CONFIG_MIPS_MT_SMTC is not set
126CONFIG_CPU_HAS_LLSC=y
127CONFIG_CPU_MIPSR2_IRQ_VI=y
128CONFIG_CPU_MIPSR2_IRQ_EI=y
129CONFIG_CPU_HAS_SYNC=y
130CONFIG_GENERIC_HARDIRQS=y
131CONFIG_GENERIC_IRQ_PROBE=y
132# CONFIG_HIGHMEM is not set
133CONFIG_CPU_SUPPORTS_HIGHMEM=y
134CONFIG_SYS_SUPPORTS_HIGHMEM=y
135CONFIG_ARCH_FLATMEM_ENABLE=y
136CONFIG_ARCH_POPULATES_NODE_MAP=y
137CONFIG_SELECT_MEMORY_MODEL=y
138CONFIG_FLATMEM_MANUAL=y
139# CONFIG_DISCONTIGMEM_MANUAL is not set
140# CONFIG_SPARSEMEM_MANUAL is not set
141CONFIG_FLATMEM=y
142CONFIG_FLAT_NODE_MEM_MAP=y
143CONFIG_PAGEFLAGS_EXTENDED=y
144CONFIG_SPLIT_PTLOCK_CPUS=4
145# CONFIG_PHYS_ADDR_T_64BIT is not set
146CONFIG_ZONE_DMA_FLAG=0
147CONFIG_VIRT_TO_BUS=y
148CONFIG_HAVE_MLOCK=y
149CONFIG_HAVE_MLOCKED_PAGE_BIT=y
150CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
151CONFIG_TICK_ONESHOT=y
152CONFIG_NO_HZ=y
153CONFIG_HIGH_RES_TIMERS=y
154CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
155# CONFIG_HZ_48 is not set
156# CONFIG_HZ_100 is not set
157# CONFIG_HZ_128 is not set
158# CONFIG_HZ_250 is not set
159# CONFIG_HZ_256 is not set
160CONFIG_HZ_1000=y
161# CONFIG_HZ_1024 is not set
162CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
163CONFIG_HZ=1000
164# CONFIG_PREEMPT_NONE is not set
165# CONFIG_PREEMPT_VOLUNTARY is not set
166CONFIG_PREEMPT=y
167# CONFIG_KEXEC is not set
168# CONFIG_SECCOMP is not set
169CONFIG_LOCKDEP_SUPPORT=y
170CONFIG_STACKTRACE_SUPPORT=y
171CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
172CONFIG_CONSTRUCTORS=y
173
174#
175# General setup
176#
177CONFIG_EXPERIMENTAL=y
178CONFIG_BROKEN_ON_SMP=y
179CONFIG_LOCK_KERNEL=y
180CONFIG_INIT_ENV_ARG_LIMIT=32
181CONFIG_LOCALVERSION=""
182CONFIG_LOCALVERSION_AUTO=y
183# CONFIG_SWAP is not set
184CONFIG_SYSVIPC=y
185CONFIG_SYSVIPC_SYSCTL=y
186# CONFIG_POSIX_MQUEUE is not set
187# CONFIG_BSD_PROCESS_ACCT is not set
188# CONFIG_TASKSTATS is not set
189# CONFIG_AUDIT is not set
190
191#
192# RCU Subsystem
193#
194CONFIG_CLASSIC_RCU=y
195# CONFIG_TREE_RCU is not set
196# CONFIG_PREEMPT_RCU is not set
197# CONFIG_TREE_RCU_TRACE is not set
198# CONFIG_PREEMPT_RCU_TRACE is not set
199# CONFIG_IKCONFIG is not set
200CONFIG_LOG_BUF_SHIFT=16
201CONFIG_GROUP_SCHED=y
202CONFIG_FAIR_GROUP_SCHED=y
203# CONFIG_RT_GROUP_SCHED is not set
204CONFIG_USER_SCHED=y
205# CONFIG_CGROUP_SCHED is not set
206# CONFIG_CGROUPS is not set
207# CONFIG_SYSFS_DEPRECATED_V2 is not set
208CONFIG_RELAY=y
209# CONFIG_NAMESPACES is not set
210CONFIG_BLK_DEV_INITRD=y
211CONFIG_INITRAMFS_SOURCE=""
212# CONFIG_RD_GZIP is not set
213# CONFIG_RD_BZIP2 is not set
214# CONFIG_RD_LZMA is not set
215# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
216CONFIG_SYSCTL=y
217CONFIG_ANON_INODES=y
218CONFIG_EMBEDDED=y
219# CONFIG_SYSCTL_SYSCALL is not set
220CONFIG_KALLSYMS=y
221CONFIG_KALLSYMS_ALL=y
222# CONFIG_KALLSYMS_EXTRA_PASS is not set
223CONFIG_HOTPLUG=y
224CONFIG_PRINTK=y
225CONFIG_BUG=y
226CONFIG_ELF_CORE=y
227# CONFIG_PCSPKR_PLATFORM is not set
228CONFIG_BASE_FULL=y
229CONFIG_FUTEX=y
230# CONFIG_EPOLL is not set
231# CONFIG_SIGNALFD is not set
232CONFIG_TIMERFD=y
233# CONFIG_EVENTFD is not set
234CONFIG_SHMEM=y
235CONFIG_AIO=y
236
237#
238# Performance Counters
239#
240# CONFIG_VM_EVENT_COUNTERS is not set
241CONFIG_PCI_QUIRKS=y
242# CONFIG_SLUB_DEBUG is not set
243# CONFIG_STRIP_ASM_SYMS is not set
244CONFIG_COMPAT_BRK=y
245# CONFIG_SLAB is not set
246CONFIG_SLUB=y
247# CONFIG_SLOB is not set
248# CONFIG_PROFILING is not set
249# CONFIG_MARKERS is not set
250CONFIG_HAVE_OPROFILE=y
251
252#
253# GCOV-based kernel profiling
254#
255# CONFIG_GCOV_KERNEL is not set
256# CONFIG_SLOW_WORK is not set
257# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
258CONFIG_RT_MUTEXES=y
259CONFIG_BASE_SMALL=0
260CONFIG_MODULES=y
261# CONFIG_MODULE_FORCE_LOAD is not set
262CONFIG_MODULE_UNLOAD=y
263# CONFIG_MODULE_FORCE_UNLOAD is not set
264CONFIG_MODVERSIONS=y
265CONFIG_MODULE_SRCVERSION_ALL=y
266CONFIG_BLOCK=y
267CONFIG_LBDAF=y
268# CONFIG_BLK_DEV_BSG is not set
269# CONFIG_BLK_DEV_INTEGRITY is not set
270
271#
272# IO Schedulers
273#
274CONFIG_IOSCHED_NOOP=y
275# CONFIG_IOSCHED_AS is not set
276# CONFIG_IOSCHED_DEADLINE is not set
277# CONFIG_IOSCHED_CFQ is not set
278# CONFIG_DEFAULT_AS is not set
279# CONFIG_DEFAULT_DEADLINE is not set
280# CONFIG_DEFAULT_CFQ is not set
281CONFIG_DEFAULT_NOOP=y
282CONFIG_DEFAULT_IOSCHED="noop"
283# CONFIG_PROBE_INITRD_HEADER is not set
284# CONFIG_FREEZER is not set
285
286#
287# Bus options (PCI, PCMCIA, EISA, ISA, TC)
288#
289CONFIG_HW_HAS_PCI=y
290CONFIG_PCI=y
291CONFIG_PCI_DOMAINS=y
292# CONFIG_ARCH_SUPPORTS_MSI is not set
293# CONFIG_PCI_LEGACY is not set
294# CONFIG_PCI_DEBUG is not set
295# CONFIG_PCI_STUB is not set
296# CONFIG_PCI_IOV is not set
297CONFIG_MMU=y
298# CONFIG_PCCARD is not set
299# CONFIG_HOTPLUG_PCI is not set
300
301#
302# Executable file formats
303#
304CONFIG_BINFMT_ELF=y
305# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
306# CONFIG_HAVE_AOUT is not set
307# CONFIG_BINFMT_MISC is not set
308CONFIG_TRAD_SIGNALS=y
309
310#
311# Power management options
312#
313CONFIG_ARCH_HIBERNATION_POSSIBLE=y
314CONFIG_ARCH_SUSPEND_POSSIBLE=y
315# CONFIG_PM is not set
316CONFIG_NET=y
317
318#
319# Networking options
320#
321CONFIG_PACKET=y
322CONFIG_PACKET_MMAP=y
323CONFIG_UNIX=y
324CONFIG_XFRM=y
325# CONFIG_XFRM_USER is not set
326# CONFIG_XFRM_SUB_POLICY is not set
327# CONFIG_XFRM_MIGRATE is not set
328# CONFIG_XFRM_STATISTICS is not set
329CONFIG_XFRM_IPCOMP=y
330# CONFIG_NET_KEY is not set
331CONFIG_INET=y
332CONFIG_IP_MULTICAST=y
333CONFIG_IP_ADVANCED_ROUTER=y
334CONFIG_ASK_IP_FIB_HASH=y
335# CONFIG_IP_FIB_TRIE is not set
336CONFIG_IP_FIB_HASH=y
337# CONFIG_IP_MULTIPLE_TABLES is not set
338# CONFIG_IP_ROUTE_MULTIPATH is not set
339# CONFIG_IP_ROUTE_VERBOSE is not set
340CONFIG_IP_PNP=y
341# CONFIG_IP_PNP_DHCP is not set
342# CONFIG_IP_PNP_BOOTP is not set
343# CONFIG_IP_PNP_RARP is not set
344# CONFIG_NET_IPIP is not set
345# CONFIG_NET_IPGRE is not set
346# CONFIG_IP_MROUTE is not set
347# CONFIG_ARPD is not set
348CONFIG_SYN_COOKIES=y
349# CONFIG_INET_AH is not set
350# CONFIG_INET_ESP is not set
351# CONFIG_INET_IPCOMP is not set
352# CONFIG_INET_XFRM_TUNNEL is not set
353# CONFIG_INET_TUNNEL is not set
354# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
355# CONFIG_INET_XFRM_MODE_TUNNEL is not set
356# CONFIG_INET_XFRM_MODE_BEET is not set
357# CONFIG_INET_LRO is not set
358# CONFIG_INET_DIAG is not set
359# CONFIG_TCP_CONG_ADVANCED is not set
360CONFIG_TCP_CONG_CUBIC=y
361CONFIG_DEFAULT_TCP_CONG="cubic"
362# CONFIG_TCP_MD5SIG is not set
363CONFIG_IPV6=y
364CONFIG_IPV6_PRIVACY=y
365# CONFIG_IPV6_ROUTER_PREF is not set
366# CONFIG_IPV6_OPTIMISTIC_DAD is not set
367CONFIG_INET6_AH=y
368CONFIG_INET6_ESP=y
369CONFIG_INET6_IPCOMP=y
370# CONFIG_IPV6_MIP6 is not set
371CONFIG_INET6_XFRM_TUNNEL=y
372CONFIG_INET6_TUNNEL=y
373# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
374# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
375# CONFIG_INET6_XFRM_MODE_BEET is not set
376# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
377# CONFIG_IPV6_SIT is not set
378CONFIG_IPV6_TUNNEL=y
379# CONFIG_IPV6_MULTIPLE_TABLES is not set
380# CONFIG_IPV6_MROUTE is not set
381# CONFIG_NETWORK_SECMARK is not set
382CONFIG_NETFILTER=y
383# CONFIG_NETFILTER_DEBUG is not set
384CONFIG_NETFILTER_ADVANCED=y
385# CONFIG_BRIDGE_NETFILTER is not set
386
387#
388# Core Netfilter Configuration
389#
390# CONFIG_NETFILTER_NETLINK_QUEUE is not set
391# CONFIG_NETFILTER_NETLINK_LOG is not set
392# CONFIG_NF_CONNTRACK is not set
393CONFIG_NETFILTER_XTABLES=y
394# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
395# CONFIG_NETFILTER_XT_TARGET_MARK is not set
396# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
397# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
398# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
399# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
400# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
401# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
402# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
403# CONFIG_NETFILTER_XT_MATCH_ESP is not set
404# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
405# CONFIG_NETFILTER_XT_MATCH_HL is not set
406# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
407# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
408# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
409# CONFIG_NETFILTER_XT_MATCH_MAC is not set
410# CONFIG_NETFILTER_XT_MATCH_MARK is not set
411CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
412# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
413# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
414# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
415# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
416# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
417# CONFIG_NETFILTER_XT_MATCH_REALM is not set
418# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
419# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
420# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
421# CONFIG_NETFILTER_XT_MATCH_STRING is not set
422# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
423# CONFIG_NETFILTER_XT_MATCH_TIME is not set
424# CONFIG_NETFILTER_XT_MATCH_U32 is not set
425# CONFIG_IP_VS is not set
426
427#
428# IP: Netfilter Configuration
429#
430# CONFIG_NF_DEFRAG_IPV4 is not set
431# CONFIG_IP_NF_QUEUE is not set
432CONFIG_IP_NF_IPTABLES=y
433# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
434# CONFIG_IP_NF_MATCH_AH is not set
435# CONFIG_IP_NF_MATCH_ECN is not set
436# CONFIG_IP_NF_MATCH_TTL is not set
437CONFIG_IP_NF_FILTER=y
438# CONFIG_IP_NF_TARGET_REJECT is not set
439# CONFIG_IP_NF_TARGET_LOG is not set
440# CONFIG_IP_NF_TARGET_ULOG is not set
441# CONFIG_IP_NF_MANGLE is not set
442# CONFIG_IP_NF_TARGET_TTL is not set
443# CONFIG_IP_NF_RAW is not set
444CONFIG_IP_NF_ARPTABLES=y
445CONFIG_IP_NF_ARPFILTER=y
446# CONFIG_IP_NF_ARP_MANGLE is not set
447
448#
449# IPv6: Netfilter Configuration
450#
451# CONFIG_IP6_NF_QUEUE is not set
452CONFIG_IP6_NF_IPTABLES=y
453# CONFIG_IP6_NF_MATCH_AH is not set
454# CONFIG_IP6_NF_MATCH_EUI64 is not set
455# CONFIG_IP6_NF_MATCH_FRAG is not set
456# CONFIG_IP6_NF_MATCH_OPTS is not set
457# CONFIG_IP6_NF_MATCH_HL is not set
458# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
459# CONFIG_IP6_NF_MATCH_MH is not set
460# CONFIG_IP6_NF_MATCH_RT is not set
461# CONFIG_IP6_NF_TARGET_HL is not set
462# CONFIG_IP6_NF_TARGET_LOG is not set
463CONFIG_IP6_NF_FILTER=y
464# CONFIG_IP6_NF_TARGET_REJECT is not set
465# CONFIG_IP6_NF_MANGLE is not set
466# CONFIG_IP6_NF_RAW is not set
467# CONFIG_IP_DCCP is not set
468# CONFIG_IP_SCTP is not set
469# CONFIG_TIPC is not set
470# CONFIG_ATM is not set
471CONFIG_STP=y
472CONFIG_BRIDGE=y
473# CONFIG_NET_DSA is not set
474# CONFIG_VLAN_8021Q is not set
475# CONFIG_DECNET is not set
476CONFIG_LLC=y
477# CONFIG_LLC2 is not set
478# CONFIG_IPX is not set
479# CONFIG_ATALK is not set
480# CONFIG_X25 is not set
481# CONFIG_LAPB is not set
482# CONFIG_ECONET is not set
483# CONFIG_WAN_ROUTER is not set
484# CONFIG_PHONET is not set
485# CONFIG_IEEE802154 is not set
486CONFIG_NET_SCHED=y
487
488#
489# Queueing/Scheduling
490#
491# CONFIG_NET_SCH_CBQ is not set
492# CONFIG_NET_SCH_HTB is not set
493# CONFIG_NET_SCH_HFSC is not set
494# CONFIG_NET_SCH_PRIO is not set
495# CONFIG_NET_SCH_MULTIQ is not set
496# CONFIG_NET_SCH_RED is not set
497# CONFIG_NET_SCH_SFQ is not set
498# CONFIG_NET_SCH_TEQL is not set
499CONFIG_NET_SCH_TBF=y
500# CONFIG_NET_SCH_GRED is not set
501# CONFIG_NET_SCH_DSMARK is not set
502# CONFIG_NET_SCH_NETEM is not set
503# CONFIG_NET_SCH_DRR is not set
504
505#
506# Classification
507#
508# CONFIG_NET_CLS_BASIC is not set
509# CONFIG_NET_CLS_TCINDEX is not set
510# CONFIG_NET_CLS_ROUTE4 is not set
511# CONFIG_NET_CLS_FW is not set
512# CONFIG_NET_CLS_U32 is not set
513# CONFIG_NET_CLS_RSVP is not set
514# CONFIG_NET_CLS_RSVP6 is not set
515# CONFIG_NET_CLS_FLOW is not set
516# CONFIG_NET_EMATCH is not set
517# CONFIG_NET_CLS_ACT is not set
518CONFIG_NET_SCH_FIFO=y
519# CONFIG_DCB is not set
520
521#
522# Network testing
523#
524# CONFIG_NET_PKTGEN is not set
525# CONFIG_HAMRADIO is not set
526# CONFIG_CAN is not set
527# CONFIG_IRDA is not set
528# CONFIG_BT is not set
529# CONFIG_AF_RXRPC is not set
530# CONFIG_WIRELESS is not set
531# CONFIG_WIMAX is not set
532# CONFIG_RFKILL is not set
533# CONFIG_NET_9P is not set
534
535#
536# Device Drivers
537#
538
539#
540# Generic Driver Options
541#
542CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
543CONFIG_STANDALONE=y
544CONFIG_PREVENT_FIRMWARE_BUILD=y
545CONFIG_FW_LOADER=y
546CONFIG_FIRMWARE_IN_KERNEL=y
547CONFIG_EXTRA_FIRMWARE=""
548# CONFIG_DEBUG_DRIVER is not set
549# CONFIG_DEBUG_DEVRES is not set
550# CONFIG_SYS_HYPERVISOR is not set
551# CONFIG_CONNECTOR is not set
552CONFIG_MTD=y
553# CONFIG_MTD_DEBUG is not set
554# CONFIG_MTD_CONCAT is not set
555CONFIG_MTD_PARTITIONS=y
556# CONFIG_MTD_TESTS is not set
557# CONFIG_MTD_REDBOOT_PARTS is not set
558CONFIG_MTD_CMDLINE_PARTS=y
559# CONFIG_MTD_AR7_PARTS is not set
560
561#
562# User Modules And Translation Layers
563#
564CONFIG_MTD_CHAR=y
565CONFIG_MTD_BLKDEVS=y
566CONFIG_MTD_BLOCK=y
567# CONFIG_FTL is not set
568# CONFIG_NFTL is not set
569# CONFIG_INFTL is not set
570# CONFIG_RFD_FTL is not set
571# CONFIG_SSFDC is not set
572# CONFIG_MTD_OOPS is not set
573
574#
575# RAM/ROM/Flash chip drivers
576#
577# CONFIG_MTD_CFI is not set
578# CONFIG_MTD_JEDECPROBE is not set
579CONFIG_MTD_MAP_BANK_WIDTH_1=y
580CONFIG_MTD_MAP_BANK_WIDTH_2=y
581CONFIG_MTD_MAP_BANK_WIDTH_4=y
582# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
583# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
584# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
585CONFIG_MTD_CFI_I1=y
586CONFIG_MTD_CFI_I2=y
587# CONFIG_MTD_CFI_I4 is not set
588# CONFIG_MTD_CFI_I8 is not set
589# CONFIG_MTD_RAM is not set
590# CONFIG_MTD_ROM is not set
591# CONFIG_MTD_ABSENT is not set
592
593#
594# Mapping drivers for chip access
595#
596# CONFIG_MTD_COMPLEX_MAPPINGS is not set
597# CONFIG_MTD_INTEL_VR_NOR is not set
598# CONFIG_MTD_PLATRAM is not set
599
600#
601# Self-contained MTD device drivers
602#
603# CONFIG_MTD_PMC551 is not set
604# CONFIG_MTD_SLRAM is not set
605# CONFIG_MTD_PHRAM is not set
606# CONFIG_MTD_MTDRAM is not set
607# CONFIG_MTD_BLOCK2MTD is not set
608
609#
610# Disk-On-Chip Device Drivers
611#
612# CONFIG_MTD_DOC2000 is not set
613# CONFIG_MTD_DOC2001 is not set
614# CONFIG_MTD_DOC2001PLUS is not set
615CONFIG_MTD_NAND=y
616# CONFIG_MTD_NAND_VERIFY_WRITE is not set
617# CONFIG_MTD_NAND_ECC_SMC is not set
618# CONFIG_MTD_NAND_MUSEUM_IDS is not set
619CONFIG_MTD_NAND_IDS=y
620# CONFIG_MTD_NAND_DISKONCHIP is not set
621# CONFIG_MTD_NAND_CAFE is not set
622# CONFIG_MTD_NAND_NANDSIM is not set
623# CONFIG_MTD_NAND_PLATFORM is not set
624# CONFIG_MTD_ALAUDA is not set
625# CONFIG_MTD_ONENAND is not set
626
627#
628# LPDDR flash memory drivers
629#
630# CONFIG_MTD_LPDDR is not set
631
632#
633# UBI - Unsorted block images
634#
635# CONFIG_MTD_UBI is not set
636# CONFIG_PARPORT is not set
637CONFIG_BLK_DEV=y
638# CONFIG_BLK_CPQ_DA is not set
639# CONFIG_BLK_CPQ_CISS_DA is not set
640# CONFIG_BLK_DEV_DAC960 is not set
641# CONFIG_BLK_DEV_UMEM is not set
642# CONFIG_BLK_DEV_COW_COMMON is not set
643CONFIG_BLK_DEV_LOOP=y
644# CONFIG_BLK_DEV_CRYPTOLOOP is not set
645# CONFIG_BLK_DEV_NBD is not set
646# CONFIG_BLK_DEV_SX8 is not set
647# CONFIG_BLK_DEV_UB is not set
648CONFIG_BLK_DEV_RAM=y
649CONFIG_BLK_DEV_RAM_COUNT=16
650CONFIG_BLK_DEV_RAM_SIZE=32768
651# CONFIG_BLK_DEV_XIP is not set
652# CONFIG_CDROM_PKTCDVD is not set
653# CONFIG_ATA_OVER_ETH is not set
654# CONFIG_BLK_DEV_HD is not set
655# CONFIG_MISC_DEVICES is not set
656CONFIG_HAVE_IDE=y
657# CONFIG_IDE is not set
658
659#
660# SCSI device support
661#
662# CONFIG_RAID_ATTRS is not set
663CONFIG_SCSI=y
664CONFIG_SCSI_DMA=y
665# CONFIG_SCSI_TGT is not set
666# CONFIG_SCSI_NETLINK is not set
667# CONFIG_SCSI_PROC_FS is not set
668
669#
670# SCSI support type (disk, tape, CD-ROM)
671#
672CONFIG_BLK_DEV_SD=y
673# CONFIG_CHR_DEV_ST is not set
674# CONFIG_CHR_DEV_OSST is not set
675# CONFIG_BLK_DEV_SR is not set
676# CONFIG_CHR_DEV_SG is not set
677# CONFIG_CHR_DEV_SCH is not set
678# CONFIG_SCSI_MULTI_LUN is not set
679# CONFIG_SCSI_CONSTANTS is not set
680# CONFIG_SCSI_LOGGING is not set
681# CONFIG_SCSI_SCAN_ASYNC is not set
682CONFIG_SCSI_WAIT_SCAN=m
683
684#
685# SCSI Transports
686#
687# CONFIG_SCSI_SPI_ATTRS is not set
688# CONFIG_SCSI_FC_ATTRS is not set
689# CONFIG_SCSI_ISCSI_ATTRS is not set
690# CONFIG_SCSI_SAS_LIBSAS is not set
691# CONFIG_SCSI_SRP_ATTRS is not set
692# CONFIG_SCSI_LOWLEVEL is not set
693# CONFIG_SCSI_DH is not set
694# CONFIG_SCSI_OSD_INITIATOR is not set
695CONFIG_ATA=y
696# CONFIG_ATA_NONSTANDARD is not set
697CONFIG_SATA_PMP=y
698# CONFIG_SATA_AHCI is not set
699# CONFIG_SATA_SIL24 is not set
700CONFIG_ATA_SFF=y
701# CONFIG_SATA_SVW is not set
702# CONFIG_ATA_PIIX is not set
703# CONFIG_SATA_MV is not set
704# CONFIG_SATA_NV is not set
705# CONFIG_PDC_ADMA is not set
706# CONFIG_SATA_QSTOR is not set
707# CONFIG_SATA_PROMISE is not set
708# CONFIG_SATA_SX4 is not set
709# CONFIG_SATA_SIL is not set
710# CONFIG_SATA_SIS is not set
711# CONFIG_SATA_ULI is not set
712# CONFIG_SATA_VIA is not set
713# CONFIG_SATA_VITESSE is not set
714# CONFIG_SATA_INIC162X is not set
715# CONFIG_PATA_ALI is not set
716# CONFIG_PATA_AMD is not set
717# CONFIG_PATA_ARTOP is not set
718# CONFIG_PATA_ATIIXP is not set
719# CONFIG_PATA_CMD640_PCI is not set
720# CONFIG_PATA_CMD64X is not set
721# CONFIG_PATA_CS5520 is not set
722# CONFIG_PATA_CS5530 is not set
723# CONFIG_PATA_CYPRESS is not set
724# CONFIG_PATA_EFAR is not set
725# CONFIG_ATA_GENERIC is not set
726# CONFIG_PATA_HPT366 is not set
727# CONFIG_PATA_HPT37X is not set
728# CONFIG_PATA_HPT3X2N is not set
729# CONFIG_PATA_HPT3X3 is not set
730# CONFIG_PATA_IT821X is not set
731# CONFIG_PATA_IT8213 is not set
732# CONFIG_PATA_JMICRON is not set
733# CONFIG_PATA_TRIFLEX is not set
734# CONFIG_PATA_MARVELL is not set
735# CONFIG_PATA_MPIIX is not set
736# CONFIG_PATA_OLDPIIX is not set
737# CONFIG_PATA_NETCELL is not set
738# CONFIG_PATA_NINJA32 is not set
739# CONFIG_PATA_NS87410 is not set
740# CONFIG_PATA_NS87415 is not set
741# CONFIG_PATA_OPTI is not set
742# CONFIG_PATA_OPTIDMA is not set
743# CONFIG_PATA_PDC_OLD is not set
744# CONFIG_PATA_RADISYS is not set
745# CONFIG_PATA_RZ1000 is not set
746# CONFIG_PATA_SC1200 is not set
747# CONFIG_PATA_SERVERWORKS is not set
748# CONFIG_PATA_PDC2027X is not set
749# CONFIG_PATA_SIL680 is not set
750# CONFIG_PATA_SIS is not set
751# CONFIG_PATA_VIA is not set
752# CONFIG_PATA_WINBOND is not set
753# CONFIG_PATA_PLATFORM is not set
754# CONFIG_PATA_SCH is not set
755# CONFIG_MD is not set
756# CONFIG_FUSION is not set
757
758#
759# IEEE 1394 (FireWire) support
760#
761
762#
763# You can enable one or both FireWire driver stacks.
764#
765
766#
767# See the help texts for more information.
768#
769# CONFIG_FIREWIRE is not set
770# CONFIG_IEEE1394 is not set
771# CONFIG_I2O is not set
772CONFIG_NETDEVICES=y
773# CONFIG_DUMMY is not set
774# CONFIG_BONDING is not set
775# CONFIG_MACVLAN is not set
776# CONFIG_EQUALIZER is not set
777# CONFIG_TUN is not set
778# CONFIG_VETH is not set
779# CONFIG_ARCNET is not set
780# CONFIG_PHYLIB is not set
781CONFIG_NET_ETHERNET=y
782CONFIG_MII=y
783# CONFIG_AX88796 is not set
784# CONFIG_HAPPYMEAL is not set
785# CONFIG_SUNGEM is not set
786# CONFIG_CASSINI is not set
787# CONFIG_NET_VENDOR_3COM is not set
788# CONFIG_SMC91X is not set
789# CONFIG_DM9000 is not set
790# CONFIG_ETHOC is not set
791# CONFIG_DNET is not set
792# CONFIG_NET_TULIP is not set
793# CONFIG_HP100 is not set
794# CONFIG_IBM_NEW_EMAC_ZMII is not set
795# CONFIG_IBM_NEW_EMAC_RGMII is not set
796# CONFIG_IBM_NEW_EMAC_TAH is not set
797# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
798# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
799# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
800# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
801# CONFIG_NET_PCI is not set
802# CONFIG_B44 is not set
803# CONFIG_KS8842 is not set
804# CONFIG_ATL2 is not set
805CONFIG_NETDEV_1000=y
806# CONFIG_ACENIC is not set
807# CONFIG_DL2K is not set
808# CONFIG_E1000 is not set
809# CONFIG_E1000E is not set
810# CONFIG_IP1000 is not set
811# CONFIG_IGB is not set
812# CONFIG_IGBVF is not set
813# CONFIG_NS83820 is not set
814# CONFIG_HAMACHI is not set
815# CONFIG_YELLOWFIN is not set
816# CONFIG_R8169 is not set
817# CONFIG_SIS190 is not set
818# CONFIG_SKGE is not set
819# CONFIG_SKY2 is not set
820# CONFIG_VIA_VELOCITY is not set
821# CONFIG_TIGON3 is not set
822# CONFIG_BNX2 is not set
823# CONFIG_CNIC is not set
824# CONFIG_QLA3XXX is not set
825# CONFIG_ATL1 is not set
826# CONFIG_ATL1E is not set
827# CONFIG_ATL1C is not set
828# CONFIG_JME is not set
829CONFIG_NETDEV_10000=y
830# CONFIG_CHELSIO_T1 is not set
831CONFIG_CHELSIO_T3_DEPENDS=y
832# CONFIG_CHELSIO_T3 is not set
833# CONFIG_ENIC is not set
834# CONFIG_IXGBE is not set
835# CONFIG_IXGB is not set
836# CONFIG_S2IO is not set
837# CONFIG_VXGE is not set
838# CONFIG_MYRI10GE is not set
839# CONFIG_NETXEN_NIC is not set
840# CONFIG_NIU is not set
841# CONFIG_MLX4_EN is not set
842# CONFIG_MLX4_CORE is not set
843# CONFIG_TEHUTI is not set
844# CONFIG_BNX2X is not set
845# CONFIG_QLGE is not set
846# CONFIG_SFC is not set
847# CONFIG_BE2NET is not set
848# CONFIG_TR is not set
849
850#
851# Wireless LAN
852#
853# CONFIG_WLAN_PRE80211 is not set
854# CONFIG_WLAN_80211 is not set
855
856#
857# Enable WiMAX (Networking options) to see the WiMAX drivers
858#
859
860#
861# USB Network Adapters
862#
863# CONFIG_USB_CATC is not set
864# CONFIG_USB_KAWETH is not set
865# CONFIG_USB_PEGASUS is not set
866CONFIG_USB_RTL8150=y
867# CONFIG_USB_USBNET is not set
868# CONFIG_WAN is not set
869# CONFIG_FDDI is not set
870# CONFIG_HIPPI is not set
871# CONFIG_PPP is not set
872# CONFIG_SLIP is not set
873# CONFIG_NET_FC is not set
874# CONFIG_NETCONSOLE is not set
875# CONFIG_NETPOLL is not set
876# CONFIG_NET_POLL_CONTROLLER is not set
877# CONFIG_ISDN is not set
878# CONFIG_PHONE is not set
879
880#
881# Input device support
882#
883CONFIG_INPUT=y
884# CONFIG_INPUT_FF_MEMLESS is not set
885# CONFIG_INPUT_POLLDEV is not set
886
887#
888# Userland interfaces
889#
890# CONFIG_INPUT_MOUSEDEV is not set
891# CONFIG_INPUT_JOYDEV is not set
892CONFIG_INPUT_EVDEV=y
893# CONFIG_INPUT_EVBUG is not set
894
895#
896# Input Device Drivers
897#
898# CONFIG_INPUT_KEYBOARD is not set
899# CONFIG_INPUT_MOUSE is not set
900# CONFIG_INPUT_JOYSTICK is not set
901# CONFIG_INPUT_TABLET is not set
902# CONFIG_INPUT_TOUCHSCREEN is not set
903# CONFIG_INPUT_MISC is not set
904
905#
906# Hardware I/O ports
907#
908# CONFIG_SERIO is not set
909# CONFIG_GAMEPORT is not set
910
911#
912# Character devices
913#
914# CONFIG_VT is not set
915# CONFIG_DEVKMEM is not set
916# CONFIG_SERIAL_NONSTANDARD is not set
917# CONFIG_NOZOMI is not set
918
919#
920# Serial drivers
921#
922# CONFIG_SERIAL_8250 is not set
923
924#
925# Non-8250 serial port support
926#
927# CONFIG_SERIAL_JSM is not set
928CONFIG_UNIX98_PTYS=y
929# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
930# CONFIG_LEGACY_PTYS is not set
931# CONFIG_IPMI_HANDLER is not set
932# CONFIG_HW_RANDOM is not set
933# CONFIG_R3964 is not set
934# CONFIG_APPLICOM is not set
935# CONFIG_RAW_DRIVER is not set
936# CONFIG_TCG_TPM is not set
937CONFIG_DEVPORT=y
938# CONFIG_I2C is not set
939# CONFIG_SPI is not set
940
941#
942# PPS support
943#
944# CONFIG_PPS is not set
945# CONFIG_W1 is not set
946# CONFIG_POWER_SUPPLY is not set
947# CONFIG_HWMON is not set
948# CONFIG_THERMAL is not set
949# CONFIG_THERMAL_HWMON is not set
950# CONFIG_WATCHDOG is not set
951CONFIG_SSB_POSSIBLE=y
952
953#
954# Sonics Silicon Backplane
955#
956# CONFIG_SSB is not set
957
958#
959# Multifunction device drivers
960#
961# CONFIG_MFD_CORE is not set
962# CONFIG_MFD_SM501 is not set
963# CONFIG_HTC_PASIC3 is not set
964# CONFIG_MFD_TMIO is not set
965# CONFIG_REGULATOR is not set
966# CONFIG_MEDIA_SUPPORT is not set
967
968#
969# Graphics support
970#
971# CONFIG_DRM is not set
972# CONFIG_VGASTATE is not set
973# CONFIG_VIDEO_OUTPUT_CONTROL is not set
974# CONFIG_FB is not set
975# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
976
977#
978# Display device support
979#
980# CONFIG_DISPLAY_SUPPORT is not set
981# CONFIG_SOUND is not set
982CONFIG_HID_SUPPORT=y
983CONFIG_HID=y
984# CONFIG_HID_DEBUG is not set
985# CONFIG_HIDRAW is not set
986
987#
988# USB Input Devices
989#
990CONFIG_USB_HID=y
991# CONFIG_HID_PID is not set
992CONFIG_USB_HIDDEV=y
993
994#
995# Special HID drivers
996#
997# CONFIG_HID_A4TECH is not set
998# CONFIG_HID_APPLE is not set
999# CONFIG_HID_BELKIN is not set
1000# CONFIG_HID_CHERRY is not set
1001# CONFIG_HID_CHICONY is not set
1002# CONFIG_HID_CYPRESS is not set
1003# CONFIG_HID_DRAGONRISE is not set
1004# CONFIG_HID_EZKEY is not set
1005# CONFIG_HID_KYE is not set
1006# CONFIG_HID_GYRATION is not set
1007# CONFIG_HID_KENSINGTON is not set
1008# CONFIG_HID_LOGITECH is not set
1009# CONFIG_HID_MICROSOFT is not set
1010# CONFIG_HID_MONTEREY is not set
1011# CONFIG_HID_NTRIG is not set
1012# CONFIG_HID_PANTHERLORD is not set
1013# CONFIG_HID_PETALYNX is not set
1014# CONFIG_HID_SAMSUNG is not set
1015# CONFIG_HID_SONY is not set
1016# CONFIG_HID_SUNPLUS is not set
1017# CONFIG_HID_GREENASIA is not set
1018# CONFIG_HID_SMARTJOYPLUS is not set
1019# CONFIG_HID_TOPSEED is not set
1020# CONFIG_HID_THRUSTMASTER is not set
1021# CONFIG_HID_ZEROPLUS is not set
1022CONFIG_USB_SUPPORT=y
1023CONFIG_USB_ARCH_HAS_HCD=y
1024CONFIG_USB_ARCH_HAS_OHCI=y
1025CONFIG_USB_ARCH_HAS_EHCI=y
1026CONFIG_USB=y
1027# CONFIG_USB_DEBUG is not set
1028CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
1029
1030#
1031# Miscellaneous USB options
1032#
1033CONFIG_USB_DEVICEFS=y
1034# CONFIG_USB_DEVICE_CLASS is not set
1035# CONFIG_USB_DYNAMIC_MINORS is not set
1036# CONFIG_USB_OTG is not set
1037# CONFIG_USB_OTG_WHITELIST is not set
1038# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1039# CONFIG_USB_MON is not set
1040# CONFIG_USB_WUSB is not set
1041# CONFIG_USB_WUSB_CBAF is not set
1042
1043#
1044# USB Host Controller Drivers
1045#
1046# CONFIG_USB_C67X00_HCD is not set
1047# CONFIG_USB_XHCI_HCD is not set
1048CONFIG_USB_EHCI_HCD=y
1049# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1050# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1051# CONFIG_USB_OXU210HP_HCD is not set
1052# CONFIG_USB_ISP116X_HCD is not set
1053# CONFIG_USB_ISP1760_HCD is not set
1054CONFIG_USB_OHCI_HCD=y
1055# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1056# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1057CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1058# CONFIG_USB_UHCI_HCD is not set
1059# CONFIG_USB_SL811_HCD is not set
1060# CONFIG_USB_R8A66597_HCD is not set
1061# CONFIG_USB_WHCI_HCD is not set
1062# CONFIG_USB_HWA_HCD is not set
1063
1064#
1065# USB Device Class drivers
1066#
1067# CONFIG_USB_ACM is not set
1068# CONFIG_USB_PRINTER is not set
1069# CONFIG_USB_WDM is not set
1070# CONFIG_USB_TMC is not set
1071
1072#
1073# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1074#
1075
1076#
1077# also be needed; see USB_STORAGE Help for more info
1078#
1079CONFIG_USB_STORAGE=y
1080# CONFIG_USB_STORAGE_DEBUG is not set
1081# CONFIG_USB_STORAGE_DATAFAB is not set
1082# CONFIG_USB_STORAGE_FREECOM is not set
1083# CONFIG_USB_STORAGE_ISD200 is not set
1084# CONFIG_USB_STORAGE_USBAT is not set
1085# CONFIG_USB_STORAGE_SDDR09 is not set
1086# CONFIG_USB_STORAGE_SDDR55 is not set
1087# CONFIG_USB_STORAGE_JUMPSHOT is not set
1088# CONFIG_USB_STORAGE_ALAUDA is not set
1089# CONFIG_USB_STORAGE_ONETOUCH is not set
1090# CONFIG_USB_STORAGE_KARMA is not set
1091# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1092# CONFIG_USB_LIBUSUAL is not set
1093
1094#
1095# USB Imaging devices
1096#
1097# CONFIG_USB_MDC800 is not set
1098# CONFIG_USB_MICROTEK is not set
1099
1100#
1101# USB port drivers
1102#
1103CONFIG_USB_SERIAL=y
1104CONFIG_USB_SERIAL_CONSOLE=y
1105# CONFIG_USB_EZUSB is not set
1106# CONFIG_USB_SERIAL_GENERIC is not set
1107# CONFIG_USB_SERIAL_AIRCABLE is not set
1108# CONFIG_USB_SERIAL_ARK3116 is not set
1109# CONFIG_USB_SERIAL_BELKIN is not set
1110# CONFIG_USB_SERIAL_CH341 is not set
1111# CONFIG_USB_SERIAL_WHITEHEAT is not set
1112# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1113CONFIG_USB_SERIAL_CP210X=y
1114# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1115# CONFIG_USB_SERIAL_EMPEG is not set
1116# CONFIG_USB_SERIAL_FTDI_SIO is not set
1117# CONFIG_USB_SERIAL_FUNSOFT is not set
1118# CONFIG_USB_SERIAL_VISOR is not set
1119# CONFIG_USB_SERIAL_IPAQ is not set
1120# CONFIG_USB_SERIAL_IR is not set
1121# CONFIG_USB_SERIAL_EDGEPORT is not set
1122# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1123# CONFIG_USB_SERIAL_GARMIN is not set
1124# CONFIG_USB_SERIAL_IPW is not set
1125# CONFIG_USB_SERIAL_IUU is not set
1126# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1127# CONFIG_USB_SERIAL_KEYSPAN is not set
1128# CONFIG_USB_SERIAL_KLSI is not set
1129# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1130# CONFIG_USB_SERIAL_MCT_U232 is not set
1131# CONFIG_USB_SERIAL_MOS7720 is not set
1132# CONFIG_USB_SERIAL_MOS7840 is not set
1133# CONFIG_USB_SERIAL_MOTOROLA is not set
1134# CONFIG_USB_SERIAL_NAVMAN is not set
1135# CONFIG_USB_SERIAL_PL2303 is not set
1136# CONFIG_USB_SERIAL_OTI6858 is not set
1137# CONFIG_USB_SERIAL_QUALCOMM is not set
1138# CONFIG_USB_SERIAL_SPCP8X5 is not set
1139# CONFIG_USB_SERIAL_HP4X is not set
1140# CONFIG_USB_SERIAL_SAFE is not set
1141# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
1142# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1143# CONFIG_USB_SERIAL_SYMBOL is not set
1144# CONFIG_USB_SERIAL_TI is not set
1145# CONFIG_USB_SERIAL_CYBERJACK is not set
1146# CONFIG_USB_SERIAL_XIRCOM is not set
1147# CONFIG_USB_SERIAL_OPTION is not set
1148# CONFIG_USB_SERIAL_OMNINET is not set
1149# CONFIG_USB_SERIAL_OPTICON is not set
1150# CONFIG_USB_SERIAL_DEBUG is not set
1151
1152#
1153# USB Miscellaneous drivers
1154#
1155# CONFIG_USB_EMI62 is not set
1156# CONFIG_USB_EMI26 is not set
1157# CONFIG_USB_ADUTUX is not set
1158# CONFIG_USB_SEVSEG is not set
1159# CONFIG_USB_RIO500 is not set
1160# CONFIG_USB_LEGOTOWER is not set
1161# CONFIG_USB_LCD is not set
1162# CONFIG_USB_BERRY_CHARGE is not set
1163# CONFIG_USB_LED is not set
1164# CONFIG_USB_CYPRESS_CY7C63 is not set
1165# CONFIG_USB_CYTHERM is not set
1166# CONFIG_USB_IDMOUSE is not set
1167# CONFIG_USB_FTDI_ELAN is not set
1168# CONFIG_USB_APPLEDISPLAY is not set
1169# CONFIG_USB_SISUSBVGA is not set
1170# CONFIG_USB_LD is not set
1171# CONFIG_USB_TRANCEVIBRATOR is not set
1172# CONFIG_USB_IOWARRIOR is not set
1173# CONFIG_USB_TEST is not set
1174# CONFIG_USB_ISIGHTFW is not set
1175# CONFIG_USB_VST is not set
1176# CONFIG_USB_GADGET is not set
1177
1178#
1179# OTG and related infrastructure
1180#
1181# CONFIG_NOP_USB_XCEIV is not set
1182# CONFIG_UWB is not set
1183# CONFIG_MMC is not set
1184# CONFIG_MEMSTICK is not set
1185# CONFIG_NEW_LEDS is not set
1186# CONFIG_ACCESSIBILITY is not set
1187# CONFIG_INFINIBAND is not set
1188CONFIG_RTC_LIB=y
1189# CONFIG_RTC_CLASS is not set
1190# CONFIG_DMADEVICES is not set
1191# CONFIG_AUXDISPLAY is not set
1192# CONFIG_UIO is not set
1193
1194#
1195# TI VLYNQ
1196#
1197# CONFIG_STAGING is not set
1198
1199#
1200# File systems
1201#
1202CONFIG_EXT2_FS=y
1203# CONFIG_EXT2_FS_XATTR is not set
1204# CONFIG_EXT2_FS_XIP is not set
1205CONFIG_EXT3_FS=y
1206# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1207# CONFIG_EXT3_FS_XATTR is not set
1208# CONFIG_EXT4_FS is not set
1209CONFIG_JBD=y
1210# CONFIG_JBD_DEBUG is not set
1211# CONFIG_REISERFS_FS is not set
1212# CONFIG_JFS_FS is not set
1213# CONFIG_FS_POSIX_ACL is not set
1214# CONFIG_XFS_FS is not set
1215# CONFIG_GFS2_FS is not set
1216# CONFIG_OCFS2_FS is not set
1217# CONFIG_BTRFS_FS is not set
1218CONFIG_FILE_LOCKING=y
1219CONFIG_FSNOTIFY=y
1220# CONFIG_DNOTIFY is not set
1221CONFIG_INOTIFY=y
1222CONFIG_INOTIFY_USER=y
1223# CONFIG_QUOTA is not set
1224# CONFIG_AUTOFS_FS is not set
1225# CONFIG_AUTOFS4_FS is not set
1226CONFIG_FUSE_FS=y
1227# CONFIG_CUSE is not set
1228
1229#
1230# Caches
1231#
1232# CONFIG_FSCACHE is not set
1233
1234#
1235# CD-ROM/DVD Filesystems
1236#
1237# CONFIG_ISO9660_FS is not set
1238# CONFIG_UDF_FS is not set
1239
1240#
1241# DOS/FAT/NT Filesystems
1242#
1243# CONFIG_MSDOS_FS is not set
1244# CONFIG_VFAT_FS is not set
1245# CONFIG_NTFS_FS is not set
1246
1247#
1248# Pseudo filesystems
1249#
1250CONFIG_PROC_FS=y
1251CONFIG_PROC_KCORE=y
1252CONFIG_PROC_SYSCTL=y
1253CONFIG_PROC_PAGE_MONITOR=y
1254CONFIG_SYSFS=y
1255CONFIG_TMPFS=y
1256# CONFIG_TMPFS_POSIX_ACL is not set
1257# CONFIG_HUGETLB_PAGE is not set
1258# CONFIG_CONFIGFS_FS is not set
1259CONFIG_MISC_FILESYSTEMS=y
1260# CONFIG_ADFS_FS is not set
1261# CONFIG_AFFS_FS is not set
1262# CONFIG_HFS_FS is not set
1263# CONFIG_HFSPLUS_FS is not set
1264# CONFIG_BEFS_FS is not set
1265# CONFIG_BFS_FS is not set
1266# CONFIG_EFS_FS is not set
1267CONFIG_JFFS2_FS=y
1268CONFIG_JFFS2_FS_DEBUG=0
1269CONFIG_JFFS2_FS_WRITEBUFFER=y
1270# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1271# CONFIG_JFFS2_SUMMARY is not set
1272# CONFIG_JFFS2_FS_XATTR is not set
1273# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1274CONFIG_JFFS2_ZLIB=y
1275# CONFIG_JFFS2_LZO is not set
1276CONFIG_JFFS2_RTIME=y
1277# CONFIG_JFFS2_RUBIN is not set
1278CONFIG_CRAMFS=y
1279# CONFIG_SQUASHFS is not set
1280# CONFIG_VXFS_FS is not set
1281# CONFIG_MINIX_FS is not set
1282# CONFIG_OMFS_FS is not set
1283# CONFIG_HPFS_FS is not set
1284# CONFIG_QNX4FS_FS is not set
1285# CONFIG_ROMFS_FS is not set
1286# CONFIG_SYSV_FS is not set
1287# CONFIG_UFS_FS is not set
1288# CONFIG_NILFS2_FS is not set
1289CONFIG_NETWORK_FILESYSTEMS=y
1290CONFIG_NFS_FS=y
1291CONFIG_NFS_V3=y
1292# CONFIG_NFS_V3_ACL is not set
1293# CONFIG_NFS_V4 is not set
1294CONFIG_ROOT_NFS=y
1295# CONFIG_NFSD is not set
1296CONFIG_LOCKD=y
1297CONFIG_LOCKD_V4=y
1298CONFIG_NFS_COMMON=y
1299CONFIG_SUNRPC=y
1300# CONFIG_RPCSEC_GSS_KRB5 is not set
1301# CONFIG_RPCSEC_GSS_SPKM3 is not set
1302# CONFIG_SMB_FS is not set
1303# CONFIG_CIFS is not set
1304# CONFIG_NCP_FS is not set
1305# CONFIG_CODA_FS is not set
1306# CONFIG_AFS_FS is not set
1307
1308#
1309# Partition Types
1310#
1311# CONFIG_PARTITION_ADVANCED is not set
1312CONFIG_MSDOS_PARTITION=y
1313CONFIG_NLS=y
1314CONFIG_NLS_DEFAULT="iso8859-1"
1315# CONFIG_NLS_CODEPAGE_437 is not set
1316# CONFIG_NLS_CODEPAGE_737 is not set
1317# CONFIG_NLS_CODEPAGE_775 is not set
1318# CONFIG_NLS_CODEPAGE_850 is not set
1319# CONFIG_NLS_CODEPAGE_852 is not set
1320# CONFIG_NLS_CODEPAGE_855 is not set
1321# CONFIG_NLS_CODEPAGE_857 is not set
1322# CONFIG_NLS_CODEPAGE_860 is not set
1323# CONFIG_NLS_CODEPAGE_861 is not set
1324# CONFIG_NLS_CODEPAGE_862 is not set
1325# CONFIG_NLS_CODEPAGE_863 is not set
1326# CONFIG_NLS_CODEPAGE_864 is not set
1327# CONFIG_NLS_CODEPAGE_865 is not set
1328# CONFIG_NLS_CODEPAGE_866 is not set
1329# CONFIG_NLS_CODEPAGE_869 is not set
1330# CONFIG_NLS_CODEPAGE_936 is not set
1331# CONFIG_NLS_CODEPAGE_950 is not set
1332# CONFIG_NLS_CODEPAGE_932 is not set
1333# CONFIG_NLS_CODEPAGE_949 is not set
1334# CONFIG_NLS_CODEPAGE_874 is not set
1335# CONFIG_NLS_ISO8859_8 is not set
1336# CONFIG_NLS_CODEPAGE_1250 is not set
1337# CONFIG_NLS_CODEPAGE_1251 is not set
1338# CONFIG_NLS_ASCII is not set
1339# CONFIG_NLS_ISO8859_1 is not set
1340# CONFIG_NLS_ISO8859_2 is not set
1341# CONFIG_NLS_ISO8859_3 is not set
1342# CONFIG_NLS_ISO8859_4 is not set
1343# CONFIG_NLS_ISO8859_5 is not set
1344# CONFIG_NLS_ISO8859_6 is not set
1345# CONFIG_NLS_ISO8859_7 is not set
1346# CONFIG_NLS_ISO8859_9 is not set
1347# CONFIG_NLS_ISO8859_13 is not set
1348# CONFIG_NLS_ISO8859_14 is not set
1349# CONFIG_NLS_ISO8859_15 is not set
1350# CONFIG_NLS_KOI8_R is not set
1351# CONFIG_NLS_KOI8_U is not set
1352# CONFIG_NLS_UTF8 is not set
1353# CONFIG_DLM is not set
1354
1355#
1356# Kernel hacking
1357#
1358CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1359CONFIG_PRINTK_TIME=y
1360CONFIG_ENABLE_WARN_DEPRECATED=y
1361CONFIG_ENABLE_MUST_CHECK=y
1362CONFIG_FRAME_WARN=1024
1363# CONFIG_MAGIC_SYSRQ is not set
1364# CONFIG_UNUSED_SYMBOLS is not set
1365CONFIG_DEBUG_FS=y
1366# CONFIG_HEADERS_CHECK is not set
1367CONFIG_DEBUG_KERNEL=y
1368# CONFIG_DEBUG_SHIRQ is not set
1369CONFIG_DETECT_SOFTLOCKUP=y
1370# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1371CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1372CONFIG_DETECT_HUNG_TASK=y
1373# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1374CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1375# CONFIG_SCHED_DEBUG is not set
1376# CONFIG_SCHEDSTATS is not set
1377# CONFIG_TIMER_STATS is not set
1378# CONFIG_DEBUG_OBJECTS is not set
1379# CONFIG_DEBUG_PREEMPT is not set
1380# CONFIG_DEBUG_RT_MUTEXES is not set
1381# CONFIG_RT_MUTEX_TESTER is not set
1382# CONFIG_DEBUG_SPINLOCK is not set
1383# CONFIG_DEBUG_MUTEXES is not set
1384# CONFIG_DEBUG_LOCK_ALLOC is not set
1385# CONFIG_PROVE_LOCKING is not set
1386# CONFIG_LOCK_STAT is not set
1387# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1388# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1389# CONFIG_DEBUG_KOBJECT is not set
1390CONFIG_DEBUG_INFO=y
1391# CONFIG_DEBUG_VM is not set
1392# CONFIG_DEBUG_WRITECOUNT is not set
1393# CONFIG_DEBUG_MEMORY_INIT is not set
1394# CONFIG_DEBUG_LIST is not set
1395# CONFIG_DEBUG_SG is not set
1396# CONFIG_DEBUG_NOTIFIERS is not set
1397# CONFIG_BOOT_PRINTK_DELAY is not set
1398# CONFIG_RCU_TORTURE_TEST is not set
1399# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1400# CONFIG_BACKTRACE_SELF_TEST is not set
1401# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1402# CONFIG_FAULT_INJECTION is not set
1403# CONFIG_PAGE_POISONING is not set
1404CONFIG_TRACING_SUPPORT=y
1405CONFIG_FTRACE=y
1406# CONFIG_IRQSOFF_TRACER is not set
1407# CONFIG_PREEMPT_TRACER is not set
1408# CONFIG_SCHED_TRACER is not set
1409# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1410# CONFIG_BOOT_TRACER is not set
1411CONFIG_BRANCH_PROFILE_NONE=y
1412# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1413# CONFIG_PROFILE_ALL_BRANCHES is not set
1414# CONFIG_KMEMTRACE is not set
1415# CONFIG_WORKQUEUE_TRACER is not set
1416# CONFIG_BLK_DEV_IO_TRACE is not set
1417# CONFIG_DYNAMIC_DEBUG is not set
1418# CONFIG_SAMPLES is not set
1419CONFIG_HAVE_ARCH_KGDB=y
1420# CONFIG_KGDB is not set
1421# CONFIG_KMEMCHECK is not set
1422CONFIG_CMDLINE="rw dhash_entries=1024 ihash_entries=1024 ip=10.0.1.3:10.0.1.1:10.0.1.1:255.255.255.0:zeus:eth0: root=/dev/nfs nfsroot=/nfsroot/cramfs,wsize=512,rsize=512,tcp nokgdb console=ttyUSB0,115200 memsize=252M"
1423# CONFIG_DEBUG_STACK_USAGE is not set
1424# CONFIG_RUNTIME_DEBUG is not set
1425
1426#
1427# Security options
1428#
1429# CONFIG_KEYS is not set
1430# CONFIG_SECURITY is not set
1431# CONFIG_SECURITYFS is not set
1432# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1433CONFIG_CRYPTO=y
1434
1435#
1436# Crypto core or helper
1437#
1438# CONFIG_CRYPTO_FIPS is not set
1439CONFIG_CRYPTO_ALGAPI=y
1440CONFIG_CRYPTO_ALGAPI2=y
1441CONFIG_CRYPTO_AEAD=y
1442CONFIG_CRYPTO_AEAD2=y
1443CONFIG_CRYPTO_BLKCIPHER=y
1444CONFIG_CRYPTO_BLKCIPHER2=y
1445CONFIG_CRYPTO_HASH=y
1446CONFIG_CRYPTO_HASH2=y
1447CONFIG_CRYPTO_RNG2=y
1448CONFIG_CRYPTO_PCOMP=y
1449CONFIG_CRYPTO_MANAGER=y
1450CONFIG_CRYPTO_MANAGER2=y
1451# CONFIG_CRYPTO_GF128MUL is not set
1452# CONFIG_CRYPTO_NULL is not set
1453CONFIG_CRYPTO_WORKQUEUE=y
1454# CONFIG_CRYPTO_CRYPTD is not set
1455CONFIG_CRYPTO_AUTHENC=y
1456# CONFIG_CRYPTO_TEST is not set
1457
1458#
1459# Authenticated Encryption with Associated Data
1460#
1461# CONFIG_CRYPTO_CCM is not set
1462# CONFIG_CRYPTO_GCM is not set
1463# CONFIG_CRYPTO_SEQIV is not set
1464
1465#
1466# Block modes
1467#
1468CONFIG_CRYPTO_CBC=y
1469# CONFIG_CRYPTO_CTR is not set
1470# CONFIG_CRYPTO_CTS is not set
1471# CONFIG_CRYPTO_ECB is not set
1472# CONFIG_CRYPTO_LRW is not set
1473# CONFIG_CRYPTO_PCBC is not set
1474# CONFIG_CRYPTO_XTS is not set
1475
1476#
1477# Hash modes
1478#
1479CONFIG_CRYPTO_HMAC=y
1480# CONFIG_CRYPTO_XCBC is not set
1481
1482#
1483# Digest
1484#
1485# CONFIG_CRYPTO_CRC32C is not set
1486# CONFIG_CRYPTO_MD4 is not set
1487CONFIG_CRYPTO_MD5=y
1488# CONFIG_CRYPTO_MICHAEL_MIC is not set
1489# CONFIG_CRYPTO_RMD128 is not set
1490# CONFIG_CRYPTO_RMD160 is not set
1491# CONFIG_CRYPTO_RMD256 is not set
1492# CONFIG_CRYPTO_RMD320 is not set
1493CONFIG_CRYPTO_SHA1=y
1494# CONFIG_CRYPTO_SHA256 is not set
1495# CONFIG_CRYPTO_SHA512 is not set
1496# CONFIG_CRYPTO_TGR192 is not set
1497# CONFIG_CRYPTO_WP512 is not set
1498
1499#
1500# Ciphers
1501#
1502# CONFIG_CRYPTO_AES is not set
1503# CONFIG_CRYPTO_ANUBIS is not set
1504# CONFIG_CRYPTO_ARC4 is not set
1505# CONFIG_CRYPTO_BLOWFISH is not set
1506# CONFIG_CRYPTO_CAMELLIA is not set
1507# CONFIG_CRYPTO_CAST5 is not set
1508# CONFIG_CRYPTO_CAST6 is not set
1509CONFIG_CRYPTO_DES=y
1510# CONFIG_CRYPTO_FCRYPT is not set
1511# CONFIG_CRYPTO_KHAZAD is not set
1512# CONFIG_CRYPTO_SALSA20 is not set
1513# CONFIG_CRYPTO_SEED is not set
1514# CONFIG_CRYPTO_SERPENT is not set
1515# CONFIG_CRYPTO_TEA is not set
1516# CONFIG_CRYPTO_TWOFISH is not set
1517
1518#
1519# Compression
1520#
1521CONFIG_CRYPTO_DEFLATE=y
1522# CONFIG_CRYPTO_ZLIB is not set
1523# CONFIG_CRYPTO_LZO is not set
1524
1525#
1526# Random Number Generation
1527#
1528# CONFIG_CRYPTO_ANSI_CPRNG is not set
1529# CONFIG_CRYPTO_HW is not set
1530# CONFIG_BINARY_PRINTF is not set
1531
1532#
1533# Library routines
1534#
1535CONFIG_BITREVERSE=y
1536CONFIG_GENERIC_FIND_LAST_BIT=y
1537# CONFIG_CRC_CCITT is not set
1538# CONFIG_CRC16 is not set
1539# CONFIG_CRC_T10DIF is not set
1540# CONFIG_CRC_ITU_T is not set
1541CONFIG_CRC32=y
1542# CONFIG_CRC7 is not set
1543# CONFIG_LIBCRC32C is not set
1544CONFIG_ZLIB_INFLATE=y
1545CONFIG_ZLIB_DEFLATE=y
1546CONFIG_HAS_IOMEM=y
1547CONFIG_HAS_IOPORT=y
1548CONFIG_HAS_DMA=y
1549CONFIG_NLATTR=y
diff --git a/arch/mips/include/asm/mach-powertv/asic.h b/arch/mips/include/asm/mach-powertv/asic.h
new file mode 100644
index 000000000000..bcad43a93ebf
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/asic.h
@@ -0,0 +1,107 @@
1/*
2 * Copyright (C) 2009 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#ifndef _ASM_MACH_POWERTV_ASIC_H
20#define _ASM_MACH_POWERTV_ASIC_H
21
22#include <linux/ioport.h>
23#include <asm/mach-powertv/asic_regs.h>
24
25#define DVR_CAPABLE (1<<0)
26#define PCIE_CAPABLE (1<<1)
27#define FFS_CAPABLE (1<<2)
28#define DISPLAY_CAPABLE (1<<3)
29
30/* Platform Family types
31 * For compitability, the new value must be added in the end */
32enum family_type {
33 FAMILY_8500,
34 FAMILY_8500RNG,
35 FAMILY_4500,
36 FAMILY_1500,
37 FAMILY_8600,
38 FAMILY_4600,
39 FAMILY_4600VZA,
40 FAMILY_8600VZB,
41 FAMILY_1500VZE,
42 FAMILY_1500VZF,
43 FAMILIES
44};
45
46/* Register maps for each ASIC */
47extern const struct register_map calliope_register_map;
48extern const struct register_map cronus_register_map;
49extern const struct register_map zeus_register_map;
50
51extern struct resource dvr_cronus_resources[];
52extern struct resource dvr_zeus_resources[];
53extern struct resource non_dvr_calliope_resources[];
54extern struct resource non_dvr_cronus_resources[];
55extern struct resource non_dvr_cronuslite_resources[];
56extern struct resource non_dvr_vz_calliope_resources[];
57extern struct resource non_dvr_vze_calliope_resources[];
58extern struct resource non_dvr_vzf_calliope_resources[];
59extern struct resource non_dvr_zeus_resources[];
60
61extern void powertv_platform_init(void);
62extern void platform_alloc_bootmem(void);
63extern enum asic_type platform_get_asic(void);
64extern enum family_type platform_get_family(void);
65extern int platform_supports_dvr(void);
66extern int platform_supports_ffs(void);
67extern int platform_supports_pcie(void);
68extern int platform_supports_display(void);
69extern void configure_platform(void);
70extern void platform_configure_usb_ehci(void);
71extern void platform_unconfigure_usb_ehci(void);
72extern void platform_configure_usb_ohci(void);
73extern void platform_unconfigure_usb_ohci(void);
74
75/* Platform Resources */
76#define ASIC_RESOURCE_GET_EXISTS 1
77extern struct resource *asic_resource_get(const char *name);
78extern void platform_release_memory(void *baddr, int size);
79
80/* Reboot Cause */
81extern void set_reboot_cause(char code, unsigned int data, unsigned int data2);
82extern void set_locked_reboot_cause(char code, unsigned int data,
83 unsigned int data2);
84
85enum sys_reboot_type {
86 sys_unknown_reboot = 0x00, /* Unknown reboot cause */
87 sys_davic_change = 0x01, /* Reboot due to change in DAVIC
88 * mode */
89 sys_user_reboot = 0x02, /* Reboot initiated by user */
90 sys_system_reboot = 0x03, /* Reboot initiated by OS */
91 sys_trap_reboot = 0x04, /* Reboot due to a CPU trap */
92 sys_silent_reboot = 0x05, /* Silent reboot */
93 sys_boot_ldr_reboot = 0x06, /* Bootloader reboot */
94 sys_power_up_reboot = 0x07, /* Power on bootup. Older
95 * drivers may report as
96 * userReboot. */
97 sys_code_change = 0x08, /* Reboot to take code change.
98 * Older drivers may report as
99 * userReboot. */
100 sys_hardware_reset = 0x09, /* HW watchdog or front-panel
101 * reset button reset. Older
102 * drivers may report as
103 * userReboot. */
104 sys_watchdogInterrupt = 0x0A /* Pre-watchdog interrupt */
105};
106
107#endif /* _ASM_MACH_POWERTV_ASIC_H */
diff --git a/arch/mips/include/asm/mach-powertv/asic_regs.h b/arch/mips/include/asm/mach-powertv/asic_regs.h
new file mode 100644
index 000000000000..9a65c93782f9
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/asic_regs.h
@@ -0,0 +1,155 @@
1/*
2 * Copyright (C) 2009 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#ifndef __ASM_MACH_POWERTV_ASIC_H_
20#define __ASM_MACH_POWERTV_ASIC_H_
21#include <linux/io.h>
22
23/* ASIC types */
24enum asic_type {
25 ASIC_UNKNOWN,
26 ASIC_ZEUS,
27 ASIC_CALLIOPE,
28 ASIC_CRONUS,
29 ASIC_CRONUSLITE,
30 ASICS
31};
32
33/* hardcoded values read from Chip Version registers */
34#define CRONUS_10 0x0B4C1C20
35#define CRONUS_11 0x0B4C1C21
36#define CRONUSLITE_10 0x0B4C1C40
37
38#define NAND_FLASH_BASE 0x03000000
39#define ZEUS_IO_BASE 0x09000000
40#define CALLIOPE_IO_BASE 0x08000000
41#define CRONUS_IO_BASE 0x09000000
42#define ASIC_IO_SIZE 0x01000000
43
44/* Definitions for backward compatibility */
45#define UART1_INTSTAT uart1_intstat
46#define UART1_INTEN uart1_inten
47#define UART1_CONFIG1 uart1_config1
48#define UART1_CONFIG2 uart1_config2
49#define UART1_DIVISORHI uart1_divisorhi
50#define UART1_DIVISORLO uart1_divisorlo
51#define UART1_DATA uart1_data
52#define UART1_STATUS uart1_status
53
54/* ASIC register enumeration */
55struct register_map {
56 u32 eic_slow0_strt_add;
57 u32 eic_cfg_bits;
58 u32 eic_ready_status;
59
60 u32 chipver3;
61 u32 chipver2;
62 u32 chipver1;
63 u32 chipver0;
64
65 u32 uart1_intstat;
66 u32 uart1_inten;
67 u32 uart1_config1;
68 u32 uart1_config2;
69 u32 uart1_divisorhi;
70 u32 uart1_divisorlo;
71 u32 uart1_data;
72 u32 uart1_status;
73
74 u32 int_stat_3;
75 u32 int_stat_2;
76 u32 int_stat_1;
77 u32 int_stat_0;
78 u32 int_config;
79 u32 int_int_scan;
80 u32 ien_int_3;
81 u32 ien_int_2;
82 u32 ien_int_1;
83 u32 ien_int_0;
84 u32 int_level_3_3;
85 u32 int_level_3_2;
86 u32 int_level_3_1;
87 u32 int_level_3_0;
88 u32 int_level_2_3;
89 u32 int_level_2_2;
90 u32 int_level_2_1;
91 u32 int_level_2_0;
92 u32 int_level_1_3;
93 u32 int_level_1_2;
94 u32 int_level_1_1;
95 u32 int_level_1_0;
96 u32 int_level_0_3;
97 u32 int_level_0_2;
98 u32 int_level_0_1;
99 u32 int_level_0_0;
100 u32 int_docsis_en;
101
102 u32 mips_pll_setup;
103 u32 usb_fs;
104 u32 test_bus;
105 u32 crt_spare;
106 u32 usb2_ohci_int_mask;
107 u32 usb2_strap;
108 u32 ehci_hcapbase;
109 u32 ohci_hc_revision;
110 u32 bcm1_bs_lmi_steer;
111 u32 usb2_control;
112 u32 usb2_stbus_obc;
113 u32 usb2_stbus_mess_size;
114 u32 usb2_stbus_chunk_size;
115
116 u32 pcie_regs;
117 u32 tim_ch;
118 u32 tim_cl;
119 u32 gpio_dout;
120 u32 gpio_din;
121 u32 gpio_dir;
122 u32 watchdog;
123 u32 front_panel;
124
125 u32 register_maps;
126};
127
128extern enum asic_type asic;
129extern const struct register_map *register_map;
130extern unsigned long asic_phy_base; /* Physical address of ASIC */
131extern unsigned long asic_base; /* Virtual address of ASIC */
132
133/*
134 * Macros to interface to registers through their ioremapped address
135 * asic_reg_offset Returns the offset of a given register from the start
136 * of the ASIC address space
137 * asic_reg_phys_addr Returns the physical address of the given register
138 * asic_reg_addr Returns the iomapped virtual address of the given
139 * register.
140 */
141#define asic_reg_offset(x) (register_map->x)
142#define asic_reg_phys_addr(x) (asic_phy_base + asic_reg_offset(x))
143#define asic_reg_addr(x) \
144 ((unsigned int *) (asic_base + asic_reg_offset(x)))
145
146/*
147 * The asic_reg macro is gone. It should be replaced by either asic_read or
148 * asic_write, as appropriate.
149 */
150
151#define asic_read(x) readl(asic_reg_addr(x))
152#define asic_write(v, x) writel(v, asic_reg_addr(x))
153
154extern void asic_irq_init(void);
155#endif
diff --git a/arch/mips/include/asm/mach-powertv/dma-coherence.h b/arch/mips/include/asm/mach-powertv/dma-coherence.h
new file mode 100644
index 000000000000..5b8d5ebeb838
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/dma-coherence.h
@@ -0,0 +1,119 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Version from mach-generic modified to support PowerTV port
7 * Portions Copyright (C) 2009 Cisco Systems, Inc.
8 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
9 *
10 */
11
12#ifndef __ASM_MACH_POWERTV_DMA_COHERENCE_H
13#define __ASM_MACH_POWERTV_DMA_COHERENCE_H
14
15#include <linux/sched.h>
16#include <linux/version.h>
17#include <linux/device.h>
18#include <asm/mach-powertv/asic.h>
19
20static inline bool is_kseg2(void *addr)
21{
22 return (unsigned long)addr >= KSEG2;
23}
24
25static inline unsigned long virt_to_phys_from_pte(void *addr)
26{
27 pgd_t *pgd;
28 pud_t *pud;
29 pmd_t *pmd;
30 pte_t *ptep, pte;
31
32 unsigned long virt_addr = (unsigned long)addr;
33 unsigned long phys_addr = 0UL;
34
35 /* get the page global directory. */
36 pgd = pgd_offset_k(virt_addr);
37
38 if (!pgd_none(*pgd)) {
39 /* get the page upper directory */
40 pud = pud_offset(pgd, virt_addr);
41 if (!pud_none(*pud)) {
42 /* get the page middle directory */
43 pmd = pmd_offset(pud, virt_addr);
44 if (!pmd_none(*pmd)) {
45 /* get a pointer to the page table entry */
46 ptep = pte_offset(pmd, virt_addr);
47 pte = *ptep;
48 /* check for a valid page */
49 if (pte_present(pte)) {
50 /* get the physical address the page is
51 * refering to */
52 phys_addr = (unsigned long)
53 page_to_phys(pte_page(pte));
54 /* add the offset within the page */
55 phys_addr |= (virt_addr & ~PAGE_MASK);
56 }
57 }
58 }
59 }
60
61 return phys_addr;
62}
63
64static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
65 size_t size)
66{
67 if (is_kseg2(addr))
68 return phys_to_bus(virt_to_phys_from_pte(addr));
69 else
70 return phys_to_bus(virt_to_phys(addr));
71}
72
73static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
74 struct page *page)
75{
76 return phys_to_bus(page_to_phys(page));
77}
78
79static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
80 dma_addr_t dma_addr)
81{
82 return bus_to_phys(dma_addr);
83}
84
85static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
86 size_t size, enum dma_data_direction direction)
87{
88}
89
90static inline int plat_dma_supported(struct device *dev, u64 mask)
91{
92 /*
93 * we fall back to GFP_DMA when the mask isn't all 1s,
94 * so we can't guarantee allocations that must be
95 * within a tighter range than GFP_DMA..
96 */
97 if (mask < DMA_BIT_MASK(24))
98 return 0;
99
100 return 1;
101}
102
103static inline void plat_extra_sync_for_device(struct device *dev)
104{
105 return;
106}
107
108static inline int plat_dma_mapping_error(struct device *dev,
109 dma_addr_t dma_addr)
110{
111 return 0;
112}
113
114static inline int plat_device_is_coherent(struct device *dev)
115{
116 return 0;
117}
118
119#endif /* __ASM_MACH_POWERTV_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-powertv/interrupts.h b/arch/mips/include/asm/mach-powertv/interrupts.h
new file mode 100644
index 000000000000..629a57413657
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/interrupts.h
@@ -0,0 +1,254 @@
1/*
2 * Copyright (C) 2009 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#ifndef _ASM_MACH_POWERTV_INTERRUPTS_H_
20#define _ASM_MACH_POWERTV_INTERRUPTS_H_
21
22/*
23 * Defines for all of the interrupt lines
24 */
25
26/* Definitions for backward compatibility */
27#define kIrq_Uart1 irq_uart1
28
29#define ibase 0
30
31/*------------- Register: int_stat_3 */
32/* 126 unused (bit 31) */
33#define irq_asc2video (ibase+126) /* ASC 2 Video Interrupt */
34#define irq_asc1video (ibase+125) /* ASC 1 Video Interrupt */
35#define irq_comms_block_wd (ibase+124) /* ASC 1 Video Interrupt */
36#define irq_fdma_mailbox (ibase+123) /* FDMA Mailbox Output */
37#define irq_fdma_gp (ibase+122) /* FDMA GP Output */
38#define irq_mips_pic (ibase+121) /* MIPS Performance Counter
39 * Interrupt */
40#define irq_mips_timer (ibase+120) /* MIPS Timer Interrupt */
41#define irq_memory_protect (ibase+119) /* Memory Protection Interrupt
42 * -- Ored by glue logic inside
43 * SPARC ILC (see
44 * INT_MEM_PROT_STAT, below,
45 * for individual interrupts)
46 */
47/* 118 unused (bit 22) */
48#define irq_sbag (ibase+117) /* SBAG Interrupt -- Ored by
49 * glue logic inside SPARC ILC
50 * (see INT_SBAG_STAT, below,
51 * for individual interrupts) */
52#define irq_qam_b_fec (ibase+116) /* QAM B FEC Interrupt */
53#define irq_qam_a_fec (ibase+115) /* QAM A FEC Interrupt */
54/* 114 unused (bit 18) */
55#define irq_mailbox (ibase+113) /* Mailbox Debug Interrupt --
56 * Ored by glue logic inside
57 * SPARC ILC (see
58 * INT_MAILBOX_STAT, below, for
59 * individual interrupts) */
60#define irq_fuse_stat1 (ibase+112) /* Fuse Status 1 */
61#define irq_fuse_stat2 (ibase+111) /* Fuse Status 2 */
62#define irq_fuse_stat3 (ibase+110) /* Blitter Interrupt / Fuse
63 * Status 3 */
64#define irq_blitter (ibase+110) /* Blitter Interrupt / Fuse
65 * Status 3 */
66#define irq_avc1_pp0 (ibase+109) /* AVC Decoder #1 PP0
67 * Interrupt */
68#define irq_avc1_pp1 (ibase+108) /* AVC Decoder #1 PP1
69 * Interrupt */
70#define irq_avc1_mbe (ibase+107) /* AVC Decoder #1 MBE
71 * Interrupt */
72#define irq_avc2_pp0 (ibase+106) /* AVC Decoder #2 PP0
73 * Interrupt */
74#define irq_avc2_pp1 (ibase+105) /* AVC Decoder #2 PP1
75 * Interrupt */
76#define irq_avc2_mbe (ibase+104) /* AVC Decoder #2 MBE
77 * Interrupt */
78#define irq_zbug_spi (ibase+103) /* Zbug SPI Slave Interrupt */
79#define irq_qam_mod2 (ibase+102) /* QAM Modulator 2 DMA
80 * Interrupt */
81#define irq_ir_rx (ibase+101) /* IR RX 2 Interrupt */
82#define irq_aud_dsp2 (ibase+100) /* Audio DSP #2 Interrupt */
83#define irq_aud_dsp1 (ibase+99) /* Audio DSP #1 Interrupt */
84#define irq_docsis (ibase+98) /* DOCSIS Debug Interrupt */
85#define irq_sd_dvp1 (ibase+97) /* SD DVP #1 Interrupt */
86#define irq_sd_dvp2 (ibase+96) /* SD DVP #2 Interrupt */
87/*------------- Register: int_stat_2 */
88#define irq_hd_dvp (ibase+95) /* HD DVP Interrupt */
89#define kIrq_Prewatchdog (ibase+94) /* watchdog Pre-Interrupt */
90#define irq_timer2 (ibase+93) /* Programmable Timer
91 * Interrupt 2 */
92#define irq_1394 (ibase+92) /* 1394 Firewire Interrupt */
93#define irq_usbohci (ibase+91) /* USB 2.0 OHCI Interrupt */
94#define irq_usbehci (ibase+90) /* USB 2.0 EHCI Interrupt */
95#define irq_pciexp (ibase+89) /* PCI Express 0 Interrupt */
96#define irq_pciexp0 (ibase+89) /* PCI Express 0 Interrupt */
97#define irq_afe1 (ibase+88) /* AFE 1 Interrupt */
98#define irq_sata (ibase+87) /* SATA 1 Interrupt */
99#define irq_sata1 (ibase+87) /* SATA 1 Interrupt */
100#define irq_dtcp (ibase+86) /* DTCP Interrupt */
101#define irq_pciexp1 (ibase+85) /* PCI Express 1 Interrupt */
102/* 84 unused (bit 20) */
103/* 83 unused (bit 19) */
104/* 82 unused (bit 18) */
105#define irq_sata2 (ibase+81) /* SATA2 Interrupt */
106#define irq_uart2 (ibase+80) /* UART2 Interrupt */
107#define irq_legacy_usb (ibase+79) /* Legacy USB Host ISR (1.1
108 * Host module) */
109#define irq_pod (ibase+78) /* POD Interrupt */
110#define irq_slave_usb (ibase+77) /* Slave USB */
111#define irq_denc1 (ibase+76) /* DENC #1 VTG Interrupt */
112#define irq_vbi_vtg (ibase+75) /* VBI VTG Interrupt */
113#define irq_afe2 (ibase+74) /* AFE 2 Interrupt */
114#define irq_denc2 (ibase+73) /* DENC #2 VTG Interrupt */
115#define irq_asc2 (ibase+72) /* ASC #2 Interrupt */
116#define irq_asc1 (ibase+71) /* ASC #1 Interrupt */
117#define irq_mod_dma (ibase+70) /* Modulator DMA Interrupt */
118#define irq_byte_eng1 (ibase+69) /* Byte Engine Interrupt [1] */
119#define irq_byte_eng0 (ibase+68) /* Byte Engine Interrupt [0] */
120/* 67 unused (bit 03) */
121/* 66 unused (bit 02) */
122/* 65 unused (bit 01) */
123/* 64 unused (bit 00) */
124/*------------- Register: int_stat_1 */
125/* 63 unused (bit 31) */
126/* 62 unused (bit 30) */
127/* 61 unused (bit 29) */
128/* 60 unused (bit 28) */
129/* 59 unused (bit 27) */
130/* 58 unused (bit 26) */
131/* 57 unused (bit 25) */
132/* 56 unused (bit 24) */
133#define irq_buf_dma_mem2mem (ibase+55) /* BufDMA Memory to Memory
134 * Interrupt */
135#define irq_buf_dma_usbtransmit (ibase+54) /* BufDMA USB Transmit
136 * Interrupt */
137#define irq_buf_dma_qpskpodtransmit (ibase+53) /* BufDMA QPSK/POD Tramsit
138 * Interrupt */
139#define irq_buf_dma_transmit_error (ibase+52) /* BufDMA Transmit Error
140 * Interrupt */
141#define irq_buf_dma_usbrecv (ibase+51) /* BufDMA USB Receive
142 * Interrupt */
143#define irq_buf_dma_qpskpodrecv (ibase+50) /* BufDMA QPSK/POD Receive
144 * Interrupt */
145#define irq_buf_dma_recv_error (ibase+49) /* BufDMA Receive Error
146 * Interrupt */
147#define irq_qamdma_transmit_play (ibase+48) /* QAMDMA Transmit/Play
148 * Interrupt */
149#define irq_qamdma_transmit_error (ibase+47) /* QAMDMA Transmit Error
150 * Interrupt */
151#define irq_qamdma_recv2high (ibase+46) /* QAMDMA Receive 2 High
152 * (Chans 63-32) */
153#define irq_qamdma_recv2low (ibase+45) /* QAMDMA Receive 2 Low
154 * (Chans 31-0) */
155#define irq_qamdma_recv1high (ibase+44) /* QAMDMA Receive 1 High
156 * (Chans 63-32) */
157#define irq_qamdma_recv1low (ibase+43) /* QAMDMA Receive 1 Low
158 * (Chans 31-0) */
159#define irq_qamdma_recv_error (ibase+42) /* QAMDMA Receive Error
160 * Interrupt */
161#define irq_mpegsplice (ibase+41) /* MPEG Splice Interrupt */
162#define irq_deinterlace_rdy (ibase+40) /* Deinterlacer Frame Ready
163 * Interrupt */
164#define irq_ext_in0 (ibase+39) /* External Interrupt irq_in0 */
165#define irq_gpio3 (ibase+38) /* GP I/O IRQ 3 - From GP I/O
166 * Module */
167#define irq_gpio2 (ibase+37) /* GP I/O IRQ 2 - From GP I/O
168 * Module (ABE_intN) */
169#define irq_pcrcmplt1 (ibase+36) /* PCR Capture Complete or
170 * Discontinuity 1 */
171#define irq_pcrcmplt2 (ibase+35) /* PCR Capture Complete or
172 * Discontinuity 2 */
173#define irq_parse_peierr (ibase+34) /* PID Parser Error Detect
174 * (PEI) */
175#define irq_parse_cont_err (ibase+33) /* PID Parser continuity error
176 * detect */
177#define irq_ds1framer (ibase+32) /* DS1 Framer Interrupt */
178/*------------- Register: int_stat_0 */
179#define irq_gpio1 (ibase+31) /* GP I/O IRQ 1 - From GP I/O
180 * Module */
181#define irq_gpio0 (ibase+30) /* GP I/O IRQ 0 - From GP I/O
182 * Module */
183#define irq_qpsk_out_aloha (ibase+29) /* QPSK Output Slotted Aloha
184 * (chan 3) Transmission
185 * Completed OK */
186#define irq_qpsk_out_tdma (ibase+28) /* QPSK Output TDMA (chan 2)
187 * Transmission Completed OK */
188#define irq_qpsk_out_reserve (ibase+27) /* QPSK Output Reservation
189 * (chan 1) Transmission
190 * Completed OK */
191#define irq_qpsk_out_aloha_err (ibase+26) /* QPSK Output Slotted Aloha
192 * (chan 3)Transmission
193 * completed with Errors. */
194#define irq_qpsk_out_tdma_err (ibase+25) /* QPSK Output TDMA (chan 2)
195 * Transmission completed with
196 * Errors. */
197#define irq_qpsk_out_rsrv_err (ibase+24) /* QPSK Output Reservation
198 * (chan 1) Transmission
199 * completed with Errors */
200#define irq_aloha_fail (ibase+23) /* Unsuccessful Resend of Aloha
201 * for N times. Aloha retry
202 * timeout for channel 3. */
203#define irq_timer1 (ibase+22) /* Programmable Timer
204 * Interrupt */
205#define irq_keyboard (ibase+21) /* Keyboard Module Interrupt */
206#define irq_i2c (ibase+20) /* I2C Module Interrupt */
207#define irq_spi (ibase+19) /* SPI Module Interrupt */
208#define irq_irblaster (ibase+18) /* IR Blaster Interrupt */
209#define irq_splice_detect (ibase+17) /* PID Key Change Interrupt or
210 * Splice Detect Interrupt */
211#define irq_se_micro (ibase+16) /* Secure Micro I/F Module
212 * Interrupt */
213#define irq_uart1 (ibase+15) /* UART Interrupt */
214#define irq_irrecv (ibase+14) /* IR Receiver Interrupt */
215#define irq_host_int1 (ibase+13) /* Host-to-Host Interrupt 1 */
216#define irq_host_int0 (ibase+12) /* Host-to-Host Interrupt 0 */
217#define irq_qpsk_hecerr (ibase+11) /* QPSK HEC Error Interrupt */
218#define irq_qpsk_crcerr (ibase+10) /* QPSK AAL-5 CRC Error
219 * Interrupt */
220/* 9 unused (bit 09) */
221/* 8 unused (bit 08) */
222#define irq_psicrcerr (ibase+7) /* QAM PSI CRC Error
223 * Interrupt */
224#define irq_psilength_err (ibase+6) /* QAM PSI Length Error
225 * Interrupt */
226#define irq_esfforward (ibase+5) /* ESF Interrupt Mark From
227 * Forward Path Reference -
228 * every 3ms when forward Mbits
229 * and forward slot control
230 * bytes are updated. */
231#define irq_esfreverse (ibase+4) /* ESF Interrupt Mark from
232 * Reverse Path Reference -
233 * delayed from forward mark by
234 * the ranging delay plus a
235 * fixed amount. When reverse
236 * Mbits and reverse slot
237 * control bytes are updated.
238 * Occurs every 3ms for 3.0M and
239 * 1.554 M upstream rates and
240 * every 6 ms for 256K upstream
241 * rate. */
242#define irq_aloha_timeout (ibase+3) /* Slotted-Aloha timeout on
243 * Channel 1. */
244#define irq_reservation (ibase+2) /* Partial (or Incremental)
245 * Reservation Message Completed
246 * or Slotted aloha verify for
247 * channel 1. */
248#define irq_aloha3 (ibase+1) /* Slotted-Aloha Message Verify
249 * Interrupt or Reservation
250 * increment completed for
251 * channel 3. */
252#define irq_mpeg_d (ibase+0) /* MPEG Decoder Interrupt */
253#endif /* _ASM_MACH_POWERTV_INTERRUPTS_H_ */
254
diff --git a/arch/mips/include/asm/mach-powertv/ioremap.h b/arch/mips/include/asm/mach-powertv/ioremap.h
new file mode 100644
index 000000000000..e6276d5146e8
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/ioremap.h
@@ -0,0 +1,90 @@
1/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version
5 * 2 of the License, or (at your option) any later version.
6 *
7 * Portions Copyright (C) Cisco Systems, Inc.
8 */
9#ifndef __ASM_MACH_POWERTV_IOREMAP_H
10#define __ASM_MACH_POWERTV_IOREMAP_H
11
12#include <linux/types.h>
13
14#define LOW_MEM_BOUNDARY_PHYS 0x20000000
15#define LOW_MEM_BOUNDARY_MASK (~(LOW_MEM_BOUNDARY_PHYS - 1))
16
17/*
18 * The bus addresses are different than the physical addresses that
19 * the processor sees by an offset. This offset varies by ASIC
20 * version. Define a variable to hold the offset and some macros to
21 * make the conversion simpler. */
22extern unsigned long phys_to_bus_offset;
23
24#ifdef CONFIG_HIGHMEM
25#define MEM_GAP_PHYS 0x60000000
26/*
27 * TODO: We will use the hard code for conversion between physical and
28 * bus until the bootloader releases their device tree to us.
29 */
30#define phys_to_bus(x) (((x) < LOW_MEM_BOUNDARY_PHYS) ? \
31 ((x) + phys_to_bus_offset) : (x))
32#define bus_to_phys(x) (((x) < MEM_GAP_PHYS_ADDR) ? \
33 ((x) - phys_to_bus_offset) : (x))
34#else
35#define phys_to_bus(x) ((x) + phys_to_bus_offset)
36#define bus_to_phys(x) ((x) - phys_to_bus_offset)
37#endif
38
39/*
40 * Determine whether the address we are given is for an ASIC device
41 * Params: addr Address to check
42 * Returns: Zero if the address is not for ASIC devices, non-zero
43 * if it is.
44 */
45static inline int asic_is_device_addr(phys_t addr)
46{
47 return !((phys_t)addr & (phys_t) LOW_MEM_BOUNDARY_MASK);
48}
49
50/*
51 * Determine whether the address we are given is external RAM mappable
52 * into KSEG1.
53 * Params: addr Address to check
54 * Returns: Zero if the address is not for external RAM and
55 */
56static inline int asic_is_lowmem_ram_addr(phys_t addr)
57{
58 /*
59 * The RAM always starts at the following address in the processor's
60 * physical address space
61 */
62 static const phys_t phys_ram_base = 0x10000000;
63 phys_t bus_ram_base;
64
65 bus_ram_base = phys_to_bus_offset + phys_ram_base;
66
67 return addr >= bus_ram_base &&
68 addr < (bus_ram_base + (LOW_MEM_BOUNDARY_PHYS - phys_ram_base));
69}
70
71/*
72 * Allow physical addresses to be fixed up to help peripherals located
73 * outside the low 32-bit range -- generic pass-through version.
74 */
75static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
76{
77 return phys_addr;
78}
79
80static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
81 unsigned long flags)
82{
83 return NULL;
84}
85
86static inline int plat_iounmap(const volatile void __iomem *addr)
87{
88 return 0;
89}
90#endif /* __ASM_MACH_POWERTV_IOREMAP_H */
diff --git a/arch/mips/include/asm/mach-powertv/irq.h b/arch/mips/include/asm/mach-powertv/irq.h
new file mode 100644
index 000000000000..4bd5d0c61a91
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/irq.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2009 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#ifndef _ASM_MACH_POWERTV_IRQ_H
20#define _ASM_MACH_POWERTV_IRQ_H
21#include <asm/mach-powertv/interrupts.h>
22
23#define MIPS_CPU_IRQ_BASE ibase
24#define NR_IRQS 127
25#endif
diff --git a/arch/mips/include/asm/mach-powertv/powertv-clock.h b/arch/mips/include/asm/mach-powertv/powertv-clock.h
new file mode 100644
index 000000000000..6f3e9a0fcf8c
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/powertv-clock.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) 2009 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18/*
19 * Local definitions for the powertv PCI code
20 */
21
22#ifndef _POWERTV_PCI_POWERTV_PCI_H_
23#define _POWERTV_PCI_POWERTV_PCI_H_
24extern int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
25extern int asic_pcie_init(void);
26extern int asic_pcie_init(void);
27
28extern int log_level;
29#endif
diff --git a/arch/mips/include/asm/mach-powertv/war.h b/arch/mips/include/asm/mach-powertv/war.h
new file mode 100644
index 000000000000..7ac05ecc512b
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/war.h
@@ -0,0 +1,28 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * This version for the PowerTV platform copied from the Malta version.
7 *
8 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
9 * Portions copyright (C) 2009 Cisco Systems, Inc.
10 */
11#ifndef __ASM_MACH_POWERTV_WAR_H
12#define __ASM_MACH_POWERTV_WAR_H
13
14#define R4600_V1_INDEX_ICACHEOP_WAR 0
15#define R4600_V1_HIT_CACHEOP_WAR 0
16#define R4600_V2_HIT_CACHEOP_WAR 0
17#define R5432_CP0_INTERRUPT_WAR 0
18#define BCM1250_M3_WAR 0
19#define SIBYTE_1956_WAR 0
20#define MIPS4K_ICACHE_REFILL_WAR 1
21#define MIPS_CACHE_SYNC_WAR 1
22#define TX49XX_ICACHE_INDEX_INV_WAR 0
23#define RM9000_CDEX_SMP_WAR 0
24#define ICACHE_REFILLS_WORKAROUND_WAR 1
25#define R10000_LLSC_WAR 0
26#define MIPS34K_MISSED_ITLB_WAR 0
27
28#endif /* __ASM_MACH_POWERTV_WAR_H */
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index eecd2a9f155c..a446aa20ac83 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o
19obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o 19obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o
20obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o 20obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o
21obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o 21obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o
22obj-$(CONFIG_CSRC_POWERTV) += csrc-powertv.o
22obj-$(CONFIG_CSRC_R4K_LIB) += csrc-r4k.o 23obj-$(CONFIG_CSRC_R4K_LIB) += csrc-r4k.o
23obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o 24obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
24obj-$(CONFIG_SYNC_R4K) += sync-r4k.o 25obj-$(CONFIG_SYNC_R4K) += sync-r4k.o
diff --git a/arch/mips/kernel/csrc-powertv.c b/arch/mips/kernel/csrc-powertv.c
new file mode 100644
index 000000000000..a27c16c8690e
--- /dev/null
+++ b/arch/mips/kernel/csrc-powertv.c
@@ -0,0 +1,180 @@
1/*
2 * Copyright (C) 2008 Scientific-Atlanta, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18/*
19 * The file comes from kernel/csrc-r4k.c
20 */
21#include <linux/clocksource.h>
22#include <linux/init.h>
23
24#include <asm/time.h> /* Not included in linux/time.h */
25
26#include <asm/mach-powertv/asic_regs.h>
27#include "powertv-clock.h"
28
29/* MIPS PLL Register Definitions */
30#define PLL_GET_M(x) (((x) >> 8) & 0x000000FF)
31#define PLL_GET_N(x) (((x) >> 16) & 0x000000FF)
32#define PLL_GET_P(x) (((x) >> 24) & 0x00000007)
33
34/*
35 * returns: Clock frequency in kHz
36 */
37unsigned int __init mips_get_pll_freq(void)
38{
39 unsigned int pll_reg, m, n, p;
40 unsigned int fin = 54000; /* Base frequency in kHz */
41 unsigned int fout;
42
43 /* Read PLL register setting */
44 pll_reg = asic_read(mips_pll_setup);
45 m = PLL_GET_M(pll_reg);
46 n = PLL_GET_N(pll_reg);
47 p = PLL_GET_P(pll_reg);
48 pr_info("MIPS PLL Register:0x%x M=%d N=%d P=%d\n", pll_reg, m, n, p);
49
50 /* Calculate clock frequency = (2 * N * 54MHz) / (M * (2**P)) */
51 fout = ((2 * n * fin) / (m * (0x01 << p)));
52
53 pr_info("MIPS Clock Freq=%d kHz\n", fout);
54
55 return fout;
56}
57
58static cycle_t c0_hpt_read(struct clocksource *cs)
59{
60 return read_c0_count();
61}
62
63static struct clocksource clocksource_mips = {
64 .name = "powertv-counter",
65 .read = c0_hpt_read,
66 .mask = CLOCKSOURCE_MASK(32),
67 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
68};
69
70static void __init powertv_c0_hpt_clocksource_init(void)
71{
72 unsigned int pll_freq = mips_get_pll_freq();
73
74 pr_info("CPU frequency %d.%02d MHz\n", pll_freq / 1000,
75 (pll_freq % 1000) * 100 / 1000);
76
77 mips_hpt_frequency = pll_freq / 2 * 1000;
78
79 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
80
81 clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
82
83 clocksource_register(&clocksource_mips);
84}
85
86/**
87 * struct tim_c - free running counter
88 * @hi: High 16 bits of the counter
89 * @lo: Low 32 bits of the counter
90 *
91 * Lays out the structure of the free running counter in memory. This counter
92 * increments at a rate of 27 MHz/8 on all platforms.
93 */
94struct tim_c {
95 unsigned int hi;
96 unsigned int lo;
97};
98
99static struct tim_c *tim_c;
100
101static cycle_t tim_c_read(struct clocksource *cs)
102{
103 unsigned int hi;
104 unsigned int next_hi;
105 unsigned int lo;
106
107 hi = readl(&tim_c->hi);
108
109 for (;;) {
110 lo = readl(&tim_c->lo);
111 next_hi = readl(&tim_c->hi);
112 if (next_hi == hi)
113 break;
114 hi = next_hi;
115 }
116
117pr_crit("%s: read %llx\n", __func__, ((u64) hi << 32) | lo);
118 return ((u64) hi << 32) | lo;
119}
120
121#define TIM_C_SIZE 48 /* # bits in the timer */
122
123static struct clocksource clocksource_tim_c = {
124 .name = "powertv-tim_c",
125 .read = tim_c_read,
126 .mask = CLOCKSOURCE_MASK(TIM_C_SIZE),
127 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
128};
129
130/**
131 * powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock
132 *
133 * The hard part here is coming up with a constant k and shift s such that
134 * the 48-bit TIM_C value multiplied by k doesn't overflow and that value,
135 * when shifted right by s, yields the corresponding number of nanoseconds.
136 * We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to
137 * 1 / (27,000,000/8) seconds. Multiply that by a billion and you get the
138 * number of nanoseconds. Since the TIM_C value has 48 bits and the math is
139 * done in 64 bits, avoiding an overflow means that k must be less than
140 * 64 - 48 = 16 bits.
141 */
142static void __init powertv_tim_c_clocksource_init(void)
143{
144 int prescale;
145 unsigned long dividend;
146 unsigned long k;
147 int s;
148 const int max_k_bits = (64 - 48) - 1;
149 const unsigned long billion = 1000000000;
150 const unsigned long counts_per_second = 27000000 / 8;
151
152 prescale = BITS_PER_LONG - ilog2(billion) - 1;
153 dividend = billion << prescale;
154 k = dividend / counts_per_second;
155 s = ilog2(k) - max_k_bits;
156
157 if (s < 0)
158 s = prescale;
159
160 else {
161 k >>= s;
162 s += prescale;
163 }
164
165 clocksource_tim_c.mult = k;
166 clocksource_tim_c.shift = s;
167 clocksource_tim_c.rating = 200;
168
169 clocksource_register(&clocksource_tim_c);
170 tim_c = (struct tim_c *) asic_reg_addr(tim_ch);
171}
172
173/**
174 powertv_clocksource_init - initialize all clocksources
175 */
176void __init powertv_clocksource_init(void)
177{
178 powertv_c0_hpt_clocksource_init();
179 powertv_tim_c_clocksource_init();
180}
diff --git a/arch/mips/powertv/Kconfig b/arch/mips/powertv/Kconfig
new file mode 100644
index 000000000000..ff0e7e3e6954
--- /dev/null
+++ b/arch/mips/powertv/Kconfig
@@ -0,0 +1,21 @@
1source "arch/mips/powertv/asic/Kconfig"
2
3config BOOTLOADER_DRIVER
4 bool "PowerTV Bootloader Driver Support"
5 default n
6 depends on POWERTV
7 help
8 Use this option if you want to load bootloader driver.
9
10config BOOTLOADER_FAMILY
11 string "POWERTV Bootloader Family string"
12 default "85"
13 depends on POWERTV && !BOOTLOADER_DRIVER
14 help
15 This value should be specified when the bootloader driver is disabled
16 and must be exactly two characters long. Families supported are:
17 R1 - RNG-100 R2 - RNG-200
18 A1 - Class A B1 - Class B
19 E1 - Class E F1 - Class F
20 44 - 45xx 46 - 46xx
21 85 - 85xx 86 - 86xx
diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile
new file mode 100644
index 000000000000..2c516718affe
--- /dev/null
+++ b/arch/mips/powertv/Makefile
@@ -0,0 +1,28 @@
1#
2# Carsten Langgaard, carstenl@mips.com
3# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4#
5# Carsten Langgaard, carstenl@mips.com
6# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
7# Portions copyright (C) 2009 Cisco Systems, Inc.
8#
9# This program is free software; you can distribute it and/or modify it
10# under the terms of the GNU General Public License (Version 2) as
11# published by the Free Software Foundation.
12#
13# This program is distributed in the hope it will be useful, but WITHOUT
14# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16# for more details.
17#
18# You should have received a copy of the GNU General Public License along
19# with this program; if not, write to the Free Software Foundation, Inc.,
20# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
21#
22# Makefile for the Cisco PowerTV-specific kernel interface routines
23# under Linux.
24#
25
26obj-y += cmdline.o init.o memory.o reset.o time.o powertv_setup.o asic/ pci/
27
28EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/Kconfig b/arch/mips/powertv/asic/Kconfig
new file mode 100644
index 000000000000..2016bfe94d66
--- /dev/null
+++ b/arch/mips/powertv/asic/Kconfig
@@ -0,0 +1,28 @@
1config MIN_RUNTIME_RESOURCES
2 bool "Support for minimum runtime resources"
3 default n
4 depends on POWERTV
5 help
6 Enables support for minimizing the number of (SA asic) runtime
7 resources that are preallocated by the kernel.
8
9config MIN_RUNTIME_DOCSIS
10 bool "Support for minimum DOCSIS resource"
11 default y
12 depends on MIN_RUNTIME_RESOURCES
13 help
14 Enables support for the preallocated DOCSIS resource.
15
16config MIN_RUNTIME_PMEM
17 bool "Support for minimum PMEM resource"
18 default y
19 depends on MIN_RUNTIME_RESOURCES
20 help
21 Enables support for the preallocated Memory resource.
22
23config MIN_RUNTIME_TFTP
24 bool "Support for minimum TFTP resource"
25 default y
26 depends on MIN_RUNTIME_RESOURCES
27 help
28 Enables support for the preallocated TFTP resource.
diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile
new file mode 100644
index 000000000000..bebfdcff0443
--- /dev/null
+++ b/arch/mips/powertv/asic/Makefile
@@ -0,0 +1,23 @@
1#
2# Copyright (C) 2009 Scientific-Atlanta, Inc.
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License as published by
6# the Free Software Foundation; either version 2 of the License, or
7# (at your option) any later version.
8#
9# This program is distributed in the hope that it will be useful,
10# but WITHOUT ANY WARRANTY; without even the implied warranty of
11# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12# GNU General Public License for more details.
13#
14# You should have received a copy of the GNU General Public License
15# along with this program; if not, write to the Free Software
16# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17#
18
19obj-y += asic-calliope.o asic-cronus.o asic-zeus.o asic_devices.o asic_int.o \
20 irq_asic.o prealloc-calliope.o prealloc-cronus.o \
21 prealloc-cronuslite.o prealloc-zeus.o
22
23EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c
new file mode 100644
index 000000000000..03d3884c6270
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-calliope.c
@@ -0,0 +1,98 @@
1/*
2 * Locations of devices in the Calliope ASIC.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 *
23 * Description: Defines the platform resources for the SA settop.
24 */
25
26#include <asm/mach-powertv/asic.h>
27
28const struct register_map calliope_register_map = {
29 .eic_slow0_strt_add = 0x800000,
30 .eic_cfg_bits = 0x800038,
31 .eic_ready_status = 0x80004c,
32
33 .chipver3 = 0xA00800,
34 .chipver2 = 0xA00804,
35 .chipver1 = 0xA00808,
36 .chipver0 = 0xA0080c,
37
38 /* The registers of IRBlaster */
39 .uart1_intstat = 0xA01800,
40 .uart1_inten = 0xA01804,
41 .uart1_config1 = 0xA01808,
42 .uart1_config2 = 0xA0180C,
43 .uart1_divisorhi = 0xA01810,
44 .uart1_divisorlo = 0xA01814,
45 .uart1_data = 0xA01818,
46 .uart1_status = 0xA0181C,
47
48 .int_stat_3 = 0xA02800,
49 .int_stat_2 = 0xA02804,
50 .int_stat_1 = 0xA02808,
51 .int_stat_0 = 0xA0280c,
52 .int_config = 0xA02810,
53 .int_int_scan = 0xA02818,
54 .ien_int_3 = 0xA02830,
55 .ien_int_2 = 0xA02834,
56 .ien_int_1 = 0xA02838,
57 .ien_int_0 = 0xA0283c,
58 .int_level_3_3 = 0xA02880,
59 .int_level_3_2 = 0xA02884,
60 .int_level_3_1 = 0xA02888,
61 .int_level_3_0 = 0xA0288c,
62 .int_level_2_3 = 0xA02890,
63 .int_level_2_2 = 0xA02894,
64 .int_level_2_1 = 0xA02898,
65 .int_level_2_0 = 0xA0289c,
66 .int_level_1_3 = 0xA028a0,
67 .int_level_1_2 = 0xA028a4,
68 .int_level_1_1 = 0xA028a8,
69 .int_level_1_0 = 0xA028ac,
70 .int_level_0_3 = 0xA028b0,
71 .int_level_0_2 = 0xA028b4,
72 .int_level_0_1 = 0xA028b8,
73 .int_level_0_0 = 0xA028bc,
74 .int_docsis_en = 0xA028F4,
75
76 .mips_pll_setup = 0x980000,
77 .usb_fs = 0x980030, /* -default 72800028- */
78 .test_bus = 0x9800CC,
79 .crt_spare = 0x9800d4,
80 .usb2_ohci_int_mask = 0x9A000c,
81 .usb2_strap = 0x9A0014,
82 .ehci_hcapbase = 0x9BFE00,
83 .ohci_hc_revision = 0x9BFC00,
84 .bcm1_bs_lmi_steer = 0x9E0004,
85 .usb2_control = 0x9E0054,
86 .usb2_stbus_obc = 0x9BFF00,
87 .usb2_stbus_mess_size = 0x9BFF04,
88 .usb2_stbus_chunk_size = 0x9BFF08,
89
90 .pcie_regs = 0x000000, /* -doesn't exist- */
91 .tim_ch = 0xA02C10,
92 .tim_cl = 0xA02C14,
93 .gpio_dout = 0xA02c20,
94 .gpio_din = 0xA02c24,
95 .gpio_dir = 0xA02c2C,
96 .watchdog = 0xA02c30,
97 .front_panel = 0x000000, /* -not used- */
98};
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c
new file mode 100644
index 000000000000..5f4589c9f83d
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-cronus.c
@@ -0,0 +1,98 @@
1/*
2 * Locations of devices in the Cronus ASIC
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 *
23 * Description: Defines the platform resources for the SA settop.
24 */
25
26#include <asm/mach-powertv/asic.h>
27
28const struct register_map cronus_register_map = {
29 .eic_slow0_strt_add = 0x000000,
30 .eic_cfg_bits = 0x000038,
31 .eic_ready_status = 0x00004C,
32
33 .chipver3 = 0x2A0800,
34 .chipver2 = 0x2A0804,
35 .chipver1 = 0x2A0808,
36 .chipver0 = 0x2A080C,
37
38 /* The registers of IRBlaster */
39 .uart1_intstat = 0x2A1800,
40 .uart1_inten = 0x2A1804,
41 .uart1_config1 = 0x2A1808,
42 .uart1_config2 = 0x2A180C,
43 .uart1_divisorhi = 0x2A1810,
44 .uart1_divisorlo = 0x2A1814,
45 .uart1_data = 0x2A1818,
46 .uart1_status = 0x2A181C,
47
48 .int_stat_3 = 0x2A2800,
49 .int_stat_2 = 0x2A2804,
50 .int_stat_1 = 0x2A2808,
51 .int_stat_0 = 0x2A280C,
52 .int_config = 0x2A2810,
53 .int_int_scan = 0x2A2818,
54 .ien_int_3 = 0x2A2830,
55 .ien_int_2 = 0x2A2834,
56 .ien_int_1 = 0x2A2838,
57 .ien_int_0 = 0x2A283C,
58 .int_level_3_3 = 0x2A2880,
59 .int_level_3_2 = 0x2A2884,
60 .int_level_3_1 = 0x2A2888,
61 .int_level_3_0 = 0x2A288C,
62 .int_level_2_3 = 0x2A2890,
63 .int_level_2_2 = 0x2A2894,
64 .int_level_2_1 = 0x2A2898,
65 .int_level_2_0 = 0x2A289C,
66 .int_level_1_3 = 0x2A28A0,
67 .int_level_1_2 = 0x2A28A4,
68 .int_level_1_1 = 0x2A28A8,
69 .int_level_1_0 = 0x2A28AC,
70 .int_level_0_3 = 0x2A28B0,
71 .int_level_0_2 = 0x2A28B4,
72 .int_level_0_1 = 0x2A28B8,
73 .int_level_0_0 = 0x2A28BC,
74 .int_docsis_en = 0x2A28F4,
75
76 .mips_pll_setup = 0x1C0000,
77 .usb_fs = 0x1C0018,
78 .test_bus = 0x1C00CC,
79 .crt_spare = 0x1c00d4,
80 .usb2_ohci_int_mask = 0x20000C,
81 .usb2_strap = 0x200014,
82 .ehci_hcapbase = 0x21FE00,
83 .ohci_hc_revision = 0x1E0000,
84 .bcm1_bs_lmi_steer = 0x2E0008,
85 .usb2_control = 0x2E004C,
86 .usb2_stbus_obc = 0x21FF00,
87 .usb2_stbus_mess_size = 0x21FF04,
88 .usb2_stbus_chunk_size = 0x21FF08,
89
90 .pcie_regs = 0x220000,
91 .tim_ch = 0x2A2C10,
92 .tim_cl = 0x2A2C14,
93 .gpio_dout = 0x2A2C20,
94 .gpio_din = 0x2A2C24,
95 .gpio_dir = 0x2A2C2C,
96 .watchdog = 0x2A2C30,
97 .front_panel = 0x2A3800,
98};
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c
new file mode 100644
index 000000000000..1469daab920e
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-zeus.c
@@ -0,0 +1,98 @@
1/*
2 * Locations of devices in the Zeus ASIC
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 *
23 * Description: Defines the platform resources for the SA settop.
24 */
25
26#include <asm/mach-powertv/asic.h>
27
28const struct register_map zeus_register_map = {
29 .eic_slow0_strt_add = 0x000000,
30 .eic_cfg_bits = 0x000038,
31 .eic_ready_status = 0x00004c,
32
33 .chipver3 = 0x280800,
34 .chipver2 = 0x280804,
35 .chipver1 = 0x280808,
36 .chipver0 = 0x28080c,
37
38 /* The registers of IRBlaster */
39 .uart1_intstat = 0x281800,
40 .uart1_inten = 0x281804,
41 .uart1_config1 = 0x281808,
42 .uart1_config2 = 0x28180C,
43 .uart1_divisorhi = 0x281810,
44 .uart1_divisorlo = 0x281814,
45 .uart1_data = 0x281818,
46 .uart1_status = 0x28181C,
47
48 .int_stat_3 = 0x282800,
49 .int_stat_2 = 0x282804,
50 .int_stat_1 = 0x282808,
51 .int_stat_0 = 0x28280c,
52 .int_config = 0x282810,
53 .int_int_scan = 0x282818,
54 .ien_int_3 = 0x282830,
55 .ien_int_2 = 0x282834,
56 .ien_int_1 = 0x282838,
57 .ien_int_0 = 0x28283c,
58 .int_level_3_3 = 0x282880,
59 .int_level_3_2 = 0x282884,
60 .int_level_3_1 = 0x282888,
61 .int_level_3_0 = 0x28288c,
62 .int_level_2_3 = 0x282890,
63 .int_level_2_2 = 0x282894,
64 .int_level_2_1 = 0x282898,
65 .int_level_2_0 = 0x28289c,
66 .int_level_1_3 = 0x2828a0,
67 .int_level_1_2 = 0x2828a4,
68 .int_level_1_1 = 0x2828a8,
69 .int_level_1_0 = 0x2828ac,
70 .int_level_0_3 = 0x2828b0,
71 .int_level_0_2 = 0x2828b4,
72 .int_level_0_1 = 0x2828b8,
73 .int_level_0_0 = 0x2828bc,
74 .int_docsis_en = 0x2828F4,
75
76 .mips_pll_setup = 0x1a0000,
77 .usb_fs = 0x1a0018,
78 .test_bus = 0x1a0238,
79 .crt_spare = 0x1a0090,
80 .usb2_ohci_int_mask = 0x1e000c,
81 .usb2_strap = 0x1e0014,
82 .ehci_hcapbase = 0x1FFE00,
83 .ohci_hc_revision = 0x1FFC00,
84 .bcm1_bs_lmi_steer = 0x2C0008,
85 .usb2_control = 0x2c01a0,
86 .usb2_stbus_obc = 0x1FFF00,
87 .usb2_stbus_mess_size = 0x1FFF04,
88 .usb2_stbus_chunk_size = 0x1FFF08,
89
90 .pcie_regs = 0x200000,
91 .tim_ch = 0x282C10,
92 .tim_cl = 0x282C14,
93 .gpio_dout = 0x282c20,
94 .gpio_din = 0x282c24,
95 .gpio_dir = 0x282c2C,
96 .watchdog = 0x282c30,
97 .front_panel = 0x283800,
98};
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
new file mode 100644
index 000000000000..bae82880b6b5
--- /dev/null
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -0,0 +1,787 @@
1/*
2 * ASIC Device List Intialization
3 *
4 * Description: Defines the platform resources for the SA settop.
5 *
6 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 *
22 * Author: Ken Eppinett
23 * David Schleef <ds@schleef.org>
24 *
25 * Description: Defines the platform resources for the SA settop.
26 *
27 * NOTE: The bootloader allocates persistent memory at an address which is
28 * 16 MiB below the end of the highest address in KSEG0. All fixed
29 * address memory reservations must avoid this region.
30 */
31
32#include <linux/device.h>
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/resource.h>
36#include <linux/serial_reg.h>
37#include <linux/io.h>
38#include <linux/bootmem.h>
39#include <linux/mm.h>
40#include <linux/platform_device.h>
41#include <linux/module.h>
42#include <asm/page.h>
43#include <linux/swap.h>
44#include <linux/highmem.h>
45#include <linux/dma-mapping.h>
46
47#include <asm/mach-powertv/asic.h>
48#include <asm/mach-powertv/asic_regs.h>
49#include <asm/mach-powertv/interrupts.h>
50
51#ifdef CONFIG_BOOTLOADER_DRIVER
52#include <asm/mach-powertv/kbldr.h>
53#endif
54#include <asm/bootinfo.h>
55
56#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0))
57
58/*
59 * Forward Prototypes
60 */
61static void pmem_setup_resource(void);
62
63/*
64 * Global Variables
65 */
66enum asic_type asic;
67
68unsigned int platform_features;
69unsigned int platform_family;
70const struct register_map *register_map;
71EXPORT_SYMBOL(register_map); /* Exported for testing */
72unsigned long asic_phy_base;
73unsigned long asic_base;
74EXPORT_SYMBOL(asic_base); /* Exported for testing */
75struct resource *gp_resources;
76static bool usb_configured;
77
78/*
79 * Don't recommend to use it directly, it is usually used by kernel internally.
80 * Portable code should be using interfaces such as ioremp, dma_map_single, etc.
81 */
82unsigned long phys_to_bus_offset;
83EXPORT_SYMBOL(phys_to_bus_offset);
84
85/*
86 *
87 * IO Resource Definition
88 *
89 */
90
91struct resource asic_resource = {
92 .name = "ASIC Resource",
93 .start = 0,
94 .end = ASIC_IO_SIZE,
95 .flags = IORESOURCE_MEM,
96};
97
98/*
99 *
100 * USB Host Resource Definition
101 *
102 */
103
104static struct resource ehci_resources[] = {
105 {
106 .parent = &asic_resource,
107 .start = 0,
108 .end = 0xff,
109 .flags = IORESOURCE_MEM,
110 },
111 {
112 .start = irq_usbehci,
113 .end = irq_usbehci,
114 .flags = IORESOURCE_IRQ,
115 },
116};
117
118static u64 ehci_dmamask = DMA_BIT_MASK(32);
119
120static struct platform_device ehci_device = {
121 .name = "powertv-ehci",
122 .id = 0,
123 .num_resources = 2,
124 .resource = ehci_resources,
125 .dev = {
126 .dma_mask = &ehci_dmamask,
127 .coherent_dma_mask = DMA_BIT_MASK(32),
128 },
129};
130
131static struct resource ohci_resources[] = {
132 {
133 .parent = &asic_resource,
134 .start = 0,
135 .end = 0xff,
136 .flags = IORESOURCE_MEM,
137 },
138 {
139 .start = irq_usbohci,
140 .end = irq_usbohci,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145static u64 ohci_dmamask = DMA_BIT_MASK(32);
146
147static struct platform_device ohci_device = {
148 .name = "powertv-ohci",
149 .id = 0,
150 .num_resources = 2,
151 .resource = ohci_resources,
152 .dev = {
153 .dma_mask = &ohci_dmamask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
155 },
156};
157
158static struct platform_device *platform_devices[] = {
159 &ehci_device,
160 &ohci_device,
161};
162
163/*
164 *
165 * Platform Configuration and Device Initialization
166 *
167 */
168static void __init fs_update(int pe, int md, int sdiv, int disable_div_by_3)
169{
170 int en_prg, byp, pwr, nsb, val;
171 int sout;
172
173 sout = 1;
174 en_prg = 1;
175 byp = 0;
176 nsb = 1;
177 pwr = 1;
178
179 val = ((sdiv << 29) | (md << 24) | (pe<<8) | (sout<<3) | (byp<<2) |
180 (nsb<<1) | (disable_div_by_3<<5));
181
182 asic_write(val, usb_fs);
183 asic_write(val | (en_prg<<4), usb_fs);
184 asic_write(val | (en_prg<<4) | pwr, usb_fs);
185}
186
187/*
188 * Allow override of bootloader-specified model
189 */
190static char __initdata cmdline[COMMAND_LINE_SIZE];
191
192#define FORCEFAMILY_PARAM "forcefamily"
193
194static __init int check_forcefamily(unsigned char forced_family[2])
195{
196 const char *p;
197
198 forced_family[0] = '\0';
199 forced_family[1] = '\0';
200
201 /* Check the command line for a forcefamily directive */
202 strncpy(cmdline, arcs_cmdline, COMMAND_LINE_SIZE - 1);
203 p = strstr(cmdline, FORCEFAMILY_PARAM);
204 if (p && (p != cmdline) && (*(p - 1) != ' '))
205 p = strstr(p, " " FORCEFAMILY_PARAM "=");
206
207 if (p) {
208 p += strlen(FORCEFAMILY_PARAM "=");
209
210 if (*p == '\0' || *(p + 1) == '\0' ||
211 (*(p + 2) != '\0' && *(p + 2) != ' '))
212 pr_err(FORCEFAMILY_PARAM " must be exactly two "
213 "characters long, ignoring value\n");
214
215 else {
216 forced_family[0] = *p;
217 forced_family[1] = *(p + 1);
218 }
219 }
220
221 return 0;
222}
223
224/*
225 * platform_set_family - determine major platform family type.
226 *
227 * Returns family type; -1 if none
228 * Returns the family type; -1 if none
229 *
230 */
231static __init noinline void platform_set_family(void)
232{
233#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0))
234
235 unsigned char forced_family[2];
236 unsigned short bootldr_family;
237
238 check_forcefamily(forced_family);
239
240 if (forced_family[0] != '\0' && forced_family[1] != '\0')
241 bootldr_family = BOOTLDRFAMILY(forced_family[0],
242 forced_family[1]);
243 else {
244
245#ifdef CONFIG_BOOTLOADER_DRIVER
246 bootldr_family = (unsigned short) kbldr_GetSWFamily();
247#else
248#if defined(CONFIG_BOOTLOADER_FAMILY)
249 bootldr_family = (unsigned short) BOOTLDRFAMILY(
250 CONFIG_BOOTLOADER_FAMILY[0],
251 CONFIG_BOOTLOADER_FAMILY[1]);
252#else
253#error "Unknown Bootloader Family"
254#endif
255#endif
256 }
257
258 pr_info("Bootloader Family = 0x%04X\n", bootldr_family);
259
260 switch (bootldr_family) {
261 case BOOTLDRFAMILY('R', '1'):
262 platform_family = FAMILY_1500;
263 break;
264 case BOOTLDRFAMILY('4', '4'):
265 platform_family = FAMILY_4500;
266 break;
267 case BOOTLDRFAMILY('4', '6'):
268 platform_family = FAMILY_4600;
269 break;
270 case BOOTLDRFAMILY('A', '1'):
271 platform_family = FAMILY_4600VZA;
272 break;
273 case BOOTLDRFAMILY('8', '5'):
274 platform_family = FAMILY_8500;
275 break;
276 case BOOTLDRFAMILY('R', '2'):
277 platform_family = FAMILY_8500RNG;
278 break;
279 case BOOTLDRFAMILY('8', '6'):
280 platform_family = FAMILY_8600;
281 break;
282 case BOOTLDRFAMILY('B', '1'):
283 platform_family = FAMILY_8600VZB;
284 break;
285 case BOOTLDRFAMILY('E', '1'):
286 platform_family = FAMILY_1500VZE;
287 break;
288 case BOOTLDRFAMILY('F', '1'):
289 platform_family = FAMILY_1500VZF;
290 break;
291 default:
292 platform_family = -1;
293 }
294}
295
296unsigned int platform_get_family(void)
297{
298 return platform_family;
299}
300EXPORT_SYMBOL(platform_get_family);
301
302/*
303 * \brief usb_eye_configure() for optimizing the USB eye on Calliope.
304 *
305 * \param unsigned int value saved to the register.
306 *
307 * \return none
308 *
309 */
310static void __init usb_eye_configure(unsigned int value)
311{
312 asic_write(asic_read(crt_spare) | value, crt_spare);
313}
314
315/*
316 * platform_get_asic - determine the ASIC type.
317 *
318 * \param none
319 *
320 * \return ASIC type; ASIC_UNKNOWN if none
321 *
322 */
323enum asic_type platform_get_asic(void)
324{
325 return asic;
326}
327EXPORT_SYMBOL(platform_get_asic);
328
329/*
330 * platform_configure_usb - usb configuration based on platform type.
331 * @bcm1_usb2_ctl: value for the BCM1_USB2_CTL register, which is
332 * quirky
333 */
334static void __init platform_configure_usb(void)
335{
336 u32 bcm1_usb2_ctl;
337
338 if (usb_configured)
339 return;
340
341 switch (asic) {
342 case ASIC_ZEUS:
343 fs_update(0x0000, 0x11, 0x02, 0);
344 bcm1_usb2_ctl = 0x803;
345 break;
346
347 case ASIC_CRONUS:
348 case ASIC_CRONUSLITE:
349 fs_update(0x0000, 0x11, 0x02, 0);
350 bcm1_usb2_ctl = 0x803;
351 break;
352
353 case ASIC_CALLIOPE:
354 fs_update(0x0000, 0x11, 0x02, 1);
355
356 switch (platform_family) {
357 case FAMILY_1500VZE:
358 break;
359
360 case FAMILY_1500VZF:
361 usb_eye_configure(0x003c0000);
362 break;
363
364 default:
365 usb_eye_configure(0x00300000);
366 break;
367 }
368
369 bcm1_usb2_ctl = 0x803;
370 break;
371
372 default:
373 pr_err("Unknown ASIC type: %d\n", asic);
374 break;
375 }
376
377 /* turn on USB power */
378 asic_write(0, usb2_strap);
379 /* Enable all OHCI interrupts */
380 asic_write(bcm1_usb2_ctl, usb2_control);
381 /* USB2_STBUS_OBC store32/load32 */
382 asic_write(3, usb2_stbus_obc);
383 /* USB2_STBUS_MESS_SIZE 2 packets */
384 asic_write(1, usb2_stbus_mess_size);
385 /* USB2_STBUS_CHUNK_SIZE 2 packets */
386 asic_write(1, usb2_stbus_chunk_size);
387
388 usb_configured = true;
389}
390
391/*
392 * Set up the USB EHCI interface
393 */
394void platform_configure_usb_ehci()
395{
396 platform_configure_usb();
397}
398
399/*
400 * Set up the USB OHCI interface
401 */
402void platform_configure_usb_ohci()
403{
404 platform_configure_usb();
405}
406
407/*
408 * Shut the USB EHCI interface down--currently a NOP
409 */
410void platform_unconfigure_usb_ehci()
411{
412}
413
414/*
415 * Shut the USB OHCI interface down--currently a NOP
416 */
417void platform_unconfigure_usb_ohci()
418{
419}
420
421/**
422 * configure_platform - configuration based on platform type.
423 */
424void __init configure_platform(void)
425{
426 platform_set_family();
427
428 switch (platform_family) {
429 case FAMILY_1500:
430 case FAMILY_1500VZE:
431 case FAMILY_1500VZF:
432 platform_features = FFS_CAPABLE;
433 asic = ASIC_CALLIOPE;
434 asic_phy_base = CALLIOPE_IO_BASE;
435 register_map = &calliope_register_map;
436 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
437 ASIC_IO_SIZE);
438
439 if (platform_family == FAMILY_1500VZE) {
440 gp_resources = non_dvr_vze_calliope_resources;
441 pr_info("Platform: 1500/Vz Class E - "
442 "CALLIOPE, NON_DVR_CAPABLE\n");
443 } else if (platform_family == FAMILY_1500VZF) {
444 gp_resources = non_dvr_vzf_calliope_resources;
445 pr_info("Platform: 1500/Vz Class F - "
446 "CALLIOPE, NON_DVR_CAPABLE\n");
447 } else {
448 gp_resources = non_dvr_calliope_resources;
449 pr_info("Platform: 1500/RNG100 - CALLIOPE, "
450 "NON_DVR_CAPABLE\n");
451 }
452 break;
453
454 case FAMILY_4500:
455 platform_features = FFS_CAPABLE | PCIE_CAPABLE |
456 DISPLAY_CAPABLE;
457 asic = ASIC_ZEUS;
458 asic_phy_base = ZEUS_IO_BASE;
459 register_map = &zeus_register_map;
460 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
461 ASIC_IO_SIZE);
462 gp_resources = non_dvr_zeus_resources;
463
464 pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n");
465 break;
466
467 case FAMILY_4600:
468 {
469 unsigned int chipversion = 0;
470
471 /* The settop has PCIE but it isn't used, so don't advertise
472 * it*/
473 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
474 asic_phy_base = CRONUS_IO_BASE; /* same as Cronus */
475 register_map = &cronus_register_map; /* same as Cronus */
476 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
477 ASIC_IO_SIZE);
478 gp_resources = non_dvr_cronuslite_resources;
479
480 /* ASIC version will determine if this is a real CronusLite or
481 * Castrati(Cronus) */
482 chipversion = asic_read(chipver3) << 24;
483 chipversion |= asic_read(chipver2) << 16;
484 chipversion |= asic_read(chipver1) << 8;
485 chipversion |= asic_read(chipver0);
486
487 if ((chipversion == CRONUS_10) || (chipversion == CRONUS_11))
488 asic = ASIC_CRONUS;
489 else
490 asic = ASIC_CRONUSLITE;
491
492 pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, "
493 "chipversion=0x%08X\n",
494 (asic == ASIC_CRONUS) ? "CRONUS" : "CRONUS LITE",
495 chipversion);
496 break;
497 }
498 case FAMILY_4600VZA:
499 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
500 asic = ASIC_CRONUS;
501 asic_phy_base = CRONUS_IO_BASE;
502 register_map = &cronus_register_map;
503 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
504 ASIC_IO_SIZE);
505 gp_resources = non_dvr_cronus_resources;
506
507 pr_info("Platform: Vz Class A - CRONUS, NON_DVR_CAPABLE\n");
508 break;
509
510 case FAMILY_8500:
511 case FAMILY_8500RNG:
512 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
513 DISPLAY_CAPABLE;
514 asic = ASIC_ZEUS;
515 asic_phy_base = ZEUS_IO_BASE;
516 register_map = &zeus_register_map;
517 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
518 ASIC_IO_SIZE);
519 gp_resources = dvr_zeus_resources;
520
521 pr_info("Platform: 8500/RNG200 - ZEUS, DVR_CAPABLE\n");
522 break;
523
524 case FAMILY_8600:
525 case FAMILY_8600VZB:
526 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
527 DISPLAY_CAPABLE;
528 asic = ASIC_CRONUS;
529 asic_phy_base = CRONUS_IO_BASE;
530 register_map = &cronus_register_map;
531 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
532 ASIC_IO_SIZE);
533 gp_resources = dvr_cronus_resources;
534
535 pr_info("Platform: 8600/Vz Class B - CRONUS, "
536 "DVR_CAPABLE\n");
537 break;
538
539 default:
540 pr_crit("Platform: UNKNOWN PLATFORM\n");
541 break;
542 }
543
544 switch (asic) {
545 case ASIC_ZEUS:
546 phys_to_bus_offset = 0x30000000;
547 break;
548 case ASIC_CALLIOPE:
549 phys_to_bus_offset = 0x10000000;
550 break;
551 case ASIC_CRONUSLITE:
552 /* Fall through */
553 case ASIC_CRONUS:
554 /*
555 * TODO: We suppose 0x10000000 aliases into 0x20000000-
556 * 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000-
557 * 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000.
558 */
559 phys_to_bus_offset = 0x10000000;
560 break;
561 default:
562 phys_to_bus_offset = 0x00000000;
563 break;
564 }
565}
566
567/**
568 * platform_devices_init - sets up USB device resourse.
569 */
570static int __init platform_devices_init(void)
571{
572 pr_notice("%s: ----- Initializing USB resources -----\n", __func__);
573
574 asic_resource.start = asic_phy_base;
575 asic_resource.end += asic_resource.start;
576
577 ehci_resources[0].start = asic_reg_phys_addr(ehci_hcapbase);
578 ehci_resources[0].end += ehci_resources[0].start;
579
580 ohci_resources[0].start = asic_reg_phys_addr(ohci_hc_revision);
581 ohci_resources[0].end += ohci_resources[0].start;
582
583 set_io_port_base(0);
584
585 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
586
587 return 0;
588}
589
590arch_initcall(platform_devices_init);
591
592/*
593 *
594 * BOOTMEM ALLOCATION
595 *
596 */
597/*
598 * Allocates/reserves the Platform memory resources early in the boot process.
599 * This ignores any resources that are designated IORESOURCE_IO
600 */
601void __init platform_alloc_bootmem(void)
602{
603 int i;
604 int total = 0;
605
606 /* Get persistent memory data from command line before allocating
607 * resources. This need to happen before normal command line parsing
608 * has been done */
609 pmem_setup_resource();
610
611 /* Loop through looking for resources that want a particular address */
612 for (i = 0; gp_resources[i].flags != 0; i++) {
613 int size = gp_resources[i].end - gp_resources[i].start + 1;
614 if ((gp_resources[i].start != 0) &&
615 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
616 reserve_bootmem(bus_to_phys(gp_resources[i].start),
617 size, 0);
618 total += gp_resources[i].end -
619 gp_resources[i].start + 1;
620 pr_info("reserve resource %s at %08x (%u bytes)\n",
621 gp_resources[i].name, gp_resources[i].start,
622 gp_resources[i].end -
623 gp_resources[i].start + 1);
624 }
625 }
626
627 /* Loop through assigning addresses for those that are left */
628 for (i = 0; gp_resources[i].flags != 0; i++) {
629 int size = gp_resources[i].end - gp_resources[i].start + 1;
630 if ((gp_resources[i].start == 0) &&
631 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
632 void *mem = alloc_bootmem_pages(size);
633
634 if (mem == NULL)
635 pr_err("Unable to allocate bootmem pages "
636 "for %s\n", gp_resources[i].name);
637
638 else {
639 gp_resources[i].start =
640 phys_to_bus(virt_to_phys(mem));
641 gp_resources[i].end =
642 gp_resources[i].start + size - 1;
643 total += size;
644 pr_info("allocate resource %s at %08x "
645 "(%u bytes)\n",
646 gp_resources[i].name,
647 gp_resources[i].start, size);
648 }
649 }
650 }
651
652 pr_info("Total Platform driver memory allocation: 0x%08x\n", total);
653
654 /* indicate resources that are platform I/O related */
655 for (i = 0; gp_resources[i].flags != 0; i++) {
656 if ((gp_resources[i].start != 0) &&
657 ((gp_resources[i].flags & IORESOURCE_IO) != 0)) {
658 pr_info("reserved platform resource %s at %08x\n",
659 gp_resources[i].name, gp_resources[i].start);
660 }
661 }
662}
663
664/*
665 *
666 * PERSISTENT MEMORY (PMEM) CONFIGURATION
667 *
668 */
669static unsigned long pmemaddr __initdata;
670
671static int __init early_param_pmemaddr(char *p)
672{
673 pmemaddr = (unsigned long)simple_strtoul(p, NULL, 0);
674 return 0;
675}
676early_param("pmemaddr", early_param_pmemaddr);
677
678static long pmemlen __initdata;
679
680static int __init early_param_pmemlen(char *p)
681{
682/* TODO: we can use this code when and if the bootloader ever changes this */
683#if 0
684 pmemlen = (unsigned long)simple_strtoul(p, NULL, 0);
685#else
686 pmemlen = 0x20000;
687#endif
688 return 0;
689}
690early_param("pmemlen", early_param_pmemlen);
691
692/*
693 * Set up persistent memory. If we were given values, we patch the array of
694 * resources. Otherwise, persistent memory may be allocated anywhere at all.
695 */
696static void __init pmem_setup_resource(void)
697{
698 struct resource *resource;
699 resource = asic_resource_get("DiagPersistentMemory");
700
701 if (resource && pmemaddr && pmemlen) {
702 /* The address provided by bootloader is in kseg0. Convert to
703 * a bus address. */
704 resource->start = phys_to_bus(pmemaddr - 0x80000000);
705 resource->end = resource->start + pmemlen - 1;
706
707 pr_info("persistent memory: start=0x%x end=0x%x\n",
708 resource->start, resource->end);
709 }
710}
711
712/*
713 *
714 * RESOURCE ACCESS FUNCTIONS
715 *
716 */
717
718/**
719 * asic_resource_get - retrieves parameters for a platform resource.
720 * @name: string to match resource
721 *
722 * Returns a pointer to a struct resource corresponding to the given name.
723 *
724 * CANNOT BE NAMED platform_resource_get, which would be the obvious choice,
725 * as this function name is already declared
726 */
727struct resource *asic_resource_get(const char *name)
728{
729 int i;
730
731 for (i = 0; gp_resources[i].flags != 0; i++) {
732 if (strcmp(gp_resources[i].name, name) == 0)
733 return &gp_resources[i];
734 }
735
736 return NULL;
737}
738EXPORT_SYMBOL(asic_resource_get);
739
740/**
741 * platform_release_memory - release pre-allocated memory
742 * @ptr: pointer to memory to release
743 * @size: size of resource
744 *
745 * This must only be called for memory allocated or reserved via the boot
746 * memory allocator.
747 */
748void platform_release_memory(void *ptr, int size)
749{
750 unsigned long addr;
751 unsigned long end;
752
753 addr = ((unsigned long)ptr + (PAGE_SIZE - 1)) & PAGE_MASK;
754 end = ((unsigned long)ptr + size) & PAGE_MASK;
755
756 for (; addr < end; addr += PAGE_SIZE) {
757 ClearPageReserved(virt_to_page(__va(addr)));
758 init_page_count(virt_to_page(__va(addr)));
759 free_page((unsigned long)__va(addr));
760 }
761}
762EXPORT_SYMBOL(platform_release_memory);
763
764/*
765 *
766 * FEATURE AVAILABILITY FUNCTIONS
767 *
768 */
769int platform_supports_dvr(void)
770{
771 return (platform_features & DVR_CAPABLE) != 0;
772}
773
774int platform_supports_ffs(void)
775{
776 return (platform_features & FFS_CAPABLE) != 0;
777}
778
779int platform_supports_pcie(void)
780{
781 return (platform_features & PCIE_CAPABLE) != 0;
782}
783
784int platform_supports_display(void)
785{
786 return (platform_features & DISPLAY_CAPABLE) != 0;
787}
diff --git a/arch/mips/powertv/asic/asic_int.c b/arch/mips/powertv/asic/asic_int.c
new file mode 100644
index 000000000000..80b2eed21ac3
--- /dev/null
+++ b/arch/mips/powertv/asic/asic_int.c
@@ -0,0 +1,125 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
4 * Copyright (C) 2001 Ralf Baechle
5 * Portions copyright (C) 2009 Cisco Systems, Inc.
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * Routines for generic manipulation of the interrupts found on the PowerTV
21 * platform.
22 *
23 * The interrupt controller is located in the South Bridge a PIIX4 device
24 * with two internal 82C95 interrupt controllers.
25 */
26#include <linux/init.h>
27#include <linux/irq.h>
28#include <linux/sched.h>
29#include <linux/slab.h>
30#include <linux/interrupt.h>
31#include <linux/kernel_stat.h>
32#include <linux/kernel.h>
33#include <linux/random.h>
34
35#include <asm/irq_cpu.h>
36#include <linux/io.h>
37#include <asm/irq_regs.h>
38#include <asm/mips-boards/generic.h>
39
40#include <asm/mach-powertv/asic_regs.h>
41
42static DEFINE_SPINLOCK(asic_irq_lock);
43
44static inline int get_int(void)
45{
46 unsigned long flags;
47 int irq;
48
49 spin_lock_irqsave(&asic_irq_lock, flags);
50
51 irq = (asic_read(int_int_scan) >> 4) - 1;
52
53 if (irq == 0 || irq >= NR_IRQS)
54 irq = -1;
55
56 spin_unlock_irqrestore(&asic_irq_lock, flags);
57
58 return irq;
59}
60
61static void asic_irqdispatch(void)
62{
63 int irq;
64
65 irq = get_int();
66 if (irq < 0)
67 return; /* interrupt has already been cleared */
68
69 do_IRQ(irq);
70}
71
72static inline int clz(unsigned long x)
73{
74 __asm__(
75 " .set push \n"
76 " .set mips32 \n"
77 " clz %0, %1 \n"
78 " .set pop \n"
79 : "=r" (x)
80 : "r" (x));
81
82 return x;
83}
84
85/*
86 * Version of ffs that only looks at bits 12..15.
87 */
88static inline unsigned int irq_ffs(unsigned int pending)
89{
90 return fls(pending) - 1 + CAUSEB_IP;
91}
92
93/*
94 * TODO: check how it works under EIC mode.
95 */
96asmlinkage void plat_irq_dispatch(void)
97{
98 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
99 int irq;
100
101 irq = irq_ffs(pending);
102
103 if (irq == CAUSEF_IP3)
104 asic_irqdispatch();
105 else if (irq >= 0)
106 do_IRQ(irq);
107 else
108 spurious_interrupt();
109}
110
111void __init arch_init_irq(void)
112{
113 int i;
114
115 asic_irq_init();
116
117 /*
118 * Initialize interrupt exception vectors.
119 */
120 if (cpu_has_veic || cpu_has_vint) {
121 int nvec = cpu_has_veic ? 64 : 8;
122 for (i = 0; i < nvec; i++)
123 set_vi_handler(i, asic_irqdispatch);
124 }
125}
diff --git a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c
new file mode 100644
index 000000000000..b54d24499b06
--- /dev/null
+++ b/arch/mips/powertv/asic/irq_asic.c
@@ -0,0 +1,116 @@
1/*
2 * Portions copyright (C) 2005-2009 Scientific Atlanta
3 * Portions copyright (C) 2009 Cisco Systems, Inc.
4 *
5 * Modified from arch/mips/kernel/irq-rm7000.c:
6 * Copyright (C) 2003 Ralf Baechle
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/kernel.h>
16
17#include <asm/irq_cpu.h>
18#include <asm/mipsregs.h>
19#include <asm/system.h>
20
21#include <asm/mach-powertv/asic_regs.h>
22
23static inline void unmask_asic_irq(unsigned int irq)
24{
25 unsigned long enable_bit;
26
27 enable_bit = (1 << (irq & 0x1f));
28
29 switch (irq >> 5) {
30 case 0:
31 asic_write(asic_read(ien_int_0) | enable_bit, ien_int_0);
32 break;
33 case 1:
34 asic_write(asic_read(ien_int_1) | enable_bit, ien_int_1);
35 break;
36 case 2:
37 asic_write(asic_read(ien_int_2) | enable_bit, ien_int_2);
38 break;
39 case 3:
40 asic_write(asic_read(ien_int_3) | enable_bit, ien_int_3);
41 break;
42 default:
43 BUG();
44 }
45}
46
47static inline void mask_asic_irq(unsigned int irq)
48{
49 unsigned long disable_mask;
50
51 disable_mask = ~(1 << (irq & 0x1f));
52
53 switch (irq >> 5) {
54 case 0:
55 asic_write(asic_read(ien_int_0) & disable_mask, ien_int_0);
56 break;
57 case 1:
58 asic_write(asic_read(ien_int_1) & disable_mask, ien_int_1);
59 break;
60 case 2:
61 asic_write(asic_read(ien_int_2) & disable_mask, ien_int_2);
62 break;
63 case 3:
64 asic_write(asic_read(ien_int_3) & disable_mask, ien_int_3);
65 break;
66 default:
67 BUG();
68 }
69}
70
71static struct irq_chip asic_irq_chip = {
72 .name = "ASIC Level",
73 .ack = mask_asic_irq,
74 .mask = mask_asic_irq,
75 .mask_ack = mask_asic_irq,
76 .unmask = unmask_asic_irq,
77 .eoi = unmask_asic_irq,
78};
79
80void __init asic_irq_init(void)
81{
82 int i;
83
84 /* set priority to 0 */
85 write_c0_status(read_c0_status() & ~(0x0000fc00));
86
87 asic_write(0, ien_int_0);
88 asic_write(0, ien_int_1);
89 asic_write(0, ien_int_2);
90 asic_write(0, ien_int_3);
91
92 asic_write(0x0fffffff, int_level_3_3);
93 asic_write(0xffffffff, int_level_3_2);
94 asic_write(0xffffffff, int_level_3_1);
95 asic_write(0xffffffff, int_level_3_0);
96 asic_write(0xffffffff, int_level_2_3);
97 asic_write(0xffffffff, int_level_2_2);
98 asic_write(0xffffffff, int_level_2_1);
99 asic_write(0xffffffff, int_level_2_0);
100 asic_write(0xffffffff, int_level_1_3);
101 asic_write(0xffffffff, int_level_1_2);
102 asic_write(0xffffffff, int_level_1_1);
103 asic_write(0xffffffff, int_level_1_0);
104 asic_write(0xffffffff, int_level_0_3);
105 asic_write(0xffffffff, int_level_0_2);
106 asic_write(0xffffffff, int_level_0_1);
107 asic_write(0xffffffff, int_level_0_0);
108
109 asic_write(0xf, int_int_scan);
110
111 /*
112 * Initialize interrupt handlers.
113 */
114 for (i = 0; i < NR_IRQS; i++)
115 set_irq_chip_and_handler(i, &asic_irq_chip, handle_level_irq);
116}
diff --git a/arch/mips/powertv/asic/prealloc-calliope.c b/arch/mips/powertv/asic/prealloc-calliope.c
new file mode 100644
index 000000000000..cd5b76a1c951
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-calliope.c
@@ -0,0 +1,620 @@
1/*
2 * Memory pre-allocations for Calliope boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * NON_DVR_CAPABLE CALLIOPE RESOURCES
29 */
30struct resource non_dvr_calliope_resources[] __initdata =
31{
32 /*
33 * VIDEO / LX1
34 */
35 {
36 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
37 .start = 0x24000000,
38 .end = 0x24200000 - 1, /*2MiB */
39 .flags = IORESOURCE_MEM,
40 },
41 {
42 .name = "ST231aMonitor", /*8KiB block ST231a monitor */
43 .start = 0x24200000,
44 .end = 0x24202000 - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .name = "MediaMemory1",
49 .start = 0x24202000,
50 .end = 0x26700000 - 1, /*~36.9MiB (32MiB - (2MiB + 8KiB)) */
51 .flags = IORESOURCE_MEM,
52 },
53 /*
54 * Sysaudio Driver
55 */
56 {
57 .name = "DSP_Image_Buff",
58 .start = 0x00000000,
59 .end = 0x000FFFFF,
60 .flags = IORESOURCE_MEM,
61 },
62 {
63 .name = "ADSC_CPU_PCM_Buff",
64 .start = 0x00000000,
65 .end = 0x00009FFF,
66 .flags = IORESOURCE_MEM,
67 },
68 {
69 .name = "ADSC_AUX_Buff",
70 .start = 0x00000000,
71 .end = 0x00003FFF,
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .name = "ADSC_Main_Buff",
76 .start = 0x00000000,
77 .end = 0x00003FFF,
78 .flags = IORESOURCE_MEM,
79 },
80 /*
81 * STAVEM driver/STAPI
82 */
83 {
84 .name = "AVMEMPartition0",
85 .start = 0x00000000,
86 .end = 0x00600000 - 1, /* 6 MB total */
87 .flags = IORESOURCE_MEM,
88 },
89 /*
90 * DOCSIS Subsystem
91 */
92 {
93 .name = "Docsis",
94 .start = 0x22000000,
95 .end = 0x22700000 - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 /*
99 * GHW HAL Driver
100 */
101 {
102 .name = "GraphicsHeap",
103 .start = 0x22700000,
104 .end = 0x23500000 - 1, /* 14 MB total */
105 .flags = IORESOURCE_MEM,
106 },
107 /*
108 * multi com buffer area
109 */
110 {
111 .name = "MulticomSHM",
112 .start = 0x23700000,
113 .end = 0x23720000 - 1,
114 .flags = IORESOURCE_MEM,
115 },
116 /*
117 * DMA Ring buffer (don't need recording buffers)
118 */
119 {
120 .name = "BMM_Buffer",
121 .start = 0x00000000,
122 .end = 0x000AA000 - 1,
123 .flags = IORESOURCE_MEM,
124 },
125 /*
126 * Display bins buffer for unit0
127 */
128 {
129 .name = "DisplayBins0",
130 .start = 0x00000000,
131 .end = 0x00000FFF, /* 4 KB total */
132 .flags = IORESOURCE_MEM,
133 },
134 /*
135 *
136 * AVFS: player HAL memory
137 *
138 *
139 */
140 {
141 .name = "AvfsDmaMem",
142 .start = 0x00000000,
143 .end = 0x002c4c00 - 1, /* 945K * 3 for playback */
144 .flags = IORESOURCE_MEM,
145 },
146 /*
147 * PMEM
148 */
149 {
150 .name = "DiagPersistentMemory",
151 .start = 0x00000000,
152 .end = 0x10000 - 1,
153 .flags = IORESOURCE_MEM,
154 },
155 /*
156 * Smartcard
157 */
158 {
159 .name = "SmartCardInfo",
160 .start = 0x00000000,
161 .end = 0x2800 - 1,
162 .flags = IORESOURCE_MEM,
163 },
164 /*
165 * NAND Flash
166 */
167 {
168 .name = "NandFlash",
169 .start = NAND_FLASH_BASE,
170 .end = NAND_FLASH_BASE + 0x400 - 1,
171 .flags = IORESOURCE_IO,
172 },
173 /*
174 * Synopsys GMAC Memory Region
175 */
176 {
177 .name = "GMAC",
178 .start = 0x00000000,
179 .end = 0x00010000 - 1,
180 .flags = IORESOURCE_MEM,
181 },
182 /*
183 * Add other resources here
184 *
185 */
186 { },
187};
188
189struct resource non_dvr_vz_calliope_resources[] __initdata =
190{
191 /*
192 * VIDEO / LX1
193 */
194 {
195 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
196 .start = 0x24000000,
197 .end = 0x24200000 - 1, /*2 Meg */
198 .flags = IORESOURCE_MEM,
199 },
200 {
201 .name = "ST231aMonitor", /* 8k block ST231a monitor */
202 .start = 0x24200000,
203 .end = 0x24202000 - 1,
204 .flags = IORESOURCE_MEM,
205 },
206 {
207 .name = "MediaMemory1",
208 .start = 0x22202000,
209 .end = 0x22C20B85 - 1, /* 10.12 Meg */
210 .flags = IORESOURCE_MEM,
211 },
212 /*
213 * Sysaudio Driver
214 */
215 {
216 .name = "DSP_Image_Buff",
217 .start = 0x00000000,
218 .end = 0x000FFFFF,
219 .flags = IORESOURCE_MEM,
220 },
221 {
222 .name = "ADSC_CPU_PCM_Buff",
223 .start = 0x00000000,
224 .end = 0x00009FFF,
225 .flags = IORESOURCE_MEM,
226 },
227 {
228 .name = "ADSC_AUX_Buff",
229 .start = 0x00000000,
230 .end = 0x00003FFF,
231 .flags = IORESOURCE_MEM,
232 },
233 {
234 .name = "ADSC_Main_Buff",
235 .start = 0x00000000,
236 .end = 0x00003FFF,
237 .flags = IORESOURCE_MEM,
238 },
239 /*
240 * STAVEM driver/STAPI
241 */
242 {
243 .name = "AVMEMPartition0",
244 .start = 0x20300000,
245 .end = 0x20620000-1, /*3.125 MB total */
246 .flags = IORESOURCE_MEM,
247 },
248 /*
249 * GHW HAL Driver
250 */
251 {
252 .name = "GraphicsHeap",
253 .start = 0x20100000,
254 .end = 0x20300000 - 1,
255 .flags = IORESOURCE_MEM,
256 },
257 /*
258 * multi com buffer area
259 */
260 {
261 .name = "MulticomSHM",
262 .start = 0x23900000,
263 .end = 0x23920000 - 1,
264 .flags = IORESOURCE_MEM,
265 },
266 /*
267 * DMA Ring buffer
268 */
269 {
270 .name = "BMM_Buffer",
271 .start = 0x00000000,
272 .end = 0x000AA000 - 1,
273 .flags = IORESOURCE_MEM,
274 },
275 /*
276 * Display bins buffer for unit0
277 */
278 {
279 .name = "DisplayBins0",
280 .start = 0x00000000,
281 .end = 0x00000FFF,
282 .flags = IORESOURCE_MEM,
283 },
284 /*
285 * PMEM
286 */
287 {
288 .name = "DiagPersistentMemory",
289 .start = 0x00000000,
290 .end = 0x10000 - 1,
291 .flags = IORESOURCE_MEM,
292 },
293 /*
294 * Smartcard
295 */
296 {
297 .name = "SmartCardInfo",
298 .start = 0x00000000,
299 .end = 0x2800 - 1,
300 .flags = IORESOURCE_MEM,
301 },
302 /*
303 * NAND Flash
304 */
305 {
306 .name = "NandFlash",
307 .start = NAND_FLASH_BASE,
308 .end = NAND_FLASH_BASE+0x400 - 1,
309 .flags = IORESOURCE_IO,
310 },
311 /*
312 * Synopsys GMAC Memory Region
313 */
314 {
315 .name = "GMAC",
316 .start = 0x00000000,
317 .end = 0x00010000 - 1,
318 .flags = IORESOURCE_MEM,
319 },
320 /*
321 * Add other resources here
322 */
323 { },
324};
325
326struct resource non_dvr_vze_calliope_resources[] __initdata =
327{
328 /*
329 * VIDEO / LX1
330 */
331 {
332 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
333 .start = 0x22000000,
334 .end = 0x22200000 - 1, /*2 Meg */
335 .flags = IORESOURCE_MEM,
336 },
337 {
338 .name = "ST231aMonitor", /* 8k block ST231a monitor */
339 .start = 0x22200000,
340 .end = 0x22202000 - 1,
341 .flags = IORESOURCE_MEM,
342 },
343 {
344 .name = "MediaMemory1",
345 .start = 0x22202000,
346 .end = 0x22C20B85 - 1, /* 10.12 Meg */
347 .flags = IORESOURCE_MEM,
348 },
349 /*
350 * Sysaudio Driver
351 */
352 {
353 .name = "DSP_Image_Buff",
354 .start = 0x00000000,
355 .end = 0x000FFFFF,
356 .flags = IORESOURCE_MEM,
357 },
358 {
359 .name = "ADSC_CPU_PCM_Buff",
360 .start = 0x00000000,
361 .end = 0x00009FFF,
362 .flags = IORESOURCE_MEM,
363 },
364 {
365 .name = "ADSC_AUX_Buff",
366 .start = 0x00000000,
367 .end = 0x00003FFF,
368 .flags = IORESOURCE_MEM,
369 },
370 {
371 .name = "ADSC_Main_Buff",
372 .start = 0x00000000,
373 .end = 0x00003FFF,
374 .flags = IORESOURCE_MEM,
375 },
376 /*
377 * STAVEM driver/STAPI
378 */
379 {
380 .name = "AVMEMPartition0",
381 .start = 0x20396000,
382 .end = 0x206B6000 - 1, /* 3.125 MB total */
383 .flags = IORESOURCE_MEM,
384 },
385 /*
386 * GHW HAL Driver
387 */
388 {
389 .name = "GraphicsHeap",
390 .start = 0x20100000,
391 .end = 0x20396000 - 1,
392 .flags = IORESOURCE_MEM,
393 },
394 /*
395 * multi com buffer area
396 */
397 {
398 .name = "MulticomSHM",
399 .start = 0x206B6000,
400 .end = 0x206D6000 - 1,
401 .flags = IORESOURCE_MEM,
402 },
403 /*
404 * DMA Ring buffer
405 */
406 {
407 .name = "BMM_Buffer",
408 .start = 0x00000000,
409 .end = 0x000AA000 - 1,
410 .flags = IORESOURCE_MEM,
411 },
412 /*
413 * Display bins buffer for unit0
414 */
415 {
416 .name = "DisplayBins0",
417 .start = 0x00000000,
418 .end = 0x00000FFF,
419 .flags = IORESOURCE_MEM,
420 },
421 /*
422 * PMEM
423 */
424 {
425 .name = "DiagPersistentMemory",
426 .start = 0x00000000,
427 .end = 0x10000 - 1,
428 .flags = IORESOURCE_MEM,
429 },
430 /*
431 * Smartcard
432 */
433 {
434 .name = "SmartCardInfo",
435 .start = 0x00000000,
436 .end = 0x2800 - 1,
437 .flags = IORESOURCE_MEM,
438 },
439 /*
440 * NAND Flash
441 */
442 {
443 .name = "NandFlash",
444 .start = NAND_FLASH_BASE,
445 .end = NAND_FLASH_BASE+0x400 - 1,
446 .flags = IORESOURCE_MEM,
447 },
448 /*
449 * Synopsys GMAC Memory Region
450 */
451 {
452 .name = "GMAC",
453 .start = 0x00000000,
454 .end = 0x00010000 - 1,
455 .flags = IORESOURCE_MEM,
456 },
457 /*
458 * Add other resources here
459 */
460 { },
461};
462
463struct resource non_dvr_vzf_calliope_resources[] __initdata =
464{
465 /*
466 * VIDEO / LX1
467 */
468 {
469 .name = "ST231aImage", /*Delta-Mu 1 image and ram */
470 .start = 0x24000000,
471 .end = 0x24200000 - 1, /*2MiB */
472 .flags = IORESOURCE_MEM,
473 },
474 {
475 .name = "ST231aMonitor", /*8KiB block ST231a monitor */
476 .start = 0x24200000,
477 .end = 0x24202000 - 1,
478 .flags = IORESOURCE_MEM,
479 },
480 {
481 .name = "MediaMemory1",
482 .start = 0x24202000,
483 /* ~19.4 (21.5MiB - (2MiB + 8KiB)) */
484 .end = 0x25580000 - 1,
485 .flags = IORESOURCE_MEM,
486 },
487 /*
488 * Sysaudio Driver
489 */
490 {
491 .name = "DSP_Image_Buff",
492 .start = 0x00000000,
493 .end = 0x000FFFFF,
494 .flags = IORESOURCE_MEM,
495 },
496 {
497 .name = "ADSC_CPU_PCM_Buff",
498 .start = 0x00000000,
499 .end = 0x00009FFF,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .name = "ADSC_AUX_Buff",
504 .start = 0x00000000,
505 .end = 0x00003FFF,
506 .flags = IORESOURCE_MEM,
507 },
508 {
509 .name = "ADSC_Main_Buff",
510 .start = 0x00000000,
511 .end = 0x00003FFF,
512 .flags = IORESOURCE_MEM,
513 },
514 /*
515 * STAVEM driver/STAPI
516 */
517 {
518 .name = "AVMEMPartition0",
519 .start = 0x00000000,
520 .end = 0x00480000 - 1, /* 4.5 MB total */
521 .flags = IORESOURCE_MEM,
522 },
523 /*
524 * GHW HAL Driver
525 */
526 {
527 .name = "GraphicsHeap",
528 .start = 0x22700000,
529 .end = 0x23500000 - 1, /* 14 MB total */
530 .flags = IORESOURCE_MEM,
531 },
532 /*
533 * multi com buffer area
534 */
535 {
536 .name = "MulticomSHM",
537 .start = 0x23700000,
538 .end = 0x23720000 - 1,
539 .flags = IORESOURCE_MEM,
540 },
541 /*
542 * DMA Ring buffer (don't need recording buffers)
543 */
544 {
545 .name = "BMM_Buffer",
546 .start = 0x00000000,
547 .end = 0x000AA000 - 1,
548 .flags = IORESOURCE_MEM,
549 },
550 /*
551 * Display bins buffer for unit0
552 */
553 {
554 .name = "DisplayBins0",
555 .start = 0x00000000,
556 .end = 0x00000FFF, /* 4 KB total */
557 .flags = IORESOURCE_MEM,
558 },
559 /*
560 * Display bins buffer for unit1
561 */
562 {
563 .name = "DisplayBins1",
564 .start = 0x00000000,
565 .end = 0x00000FFF, /* 4 KB total */
566 .flags = IORESOURCE_MEM,
567 },
568 /*
569 *
570 * AVFS: player HAL memory
571 *
572 *
573 */
574 {
575 .name = "AvfsDmaMem",
576 .start = 0x00000000,
577 .end = 0x002c4c00 - 1, /* 945K * 3 for playback */
578 .flags = IORESOURCE_MEM,
579 },
580 /*
581 * PMEM
582 */
583 {
584 .name = "DiagPersistentMemory",
585 .start = 0x00000000,
586 .end = 0x10000 - 1,
587 .flags = IORESOURCE_MEM,
588 },
589 /*
590 * Smartcard
591 */
592 {
593 .name = "SmartCardInfo",
594 .start = 0x00000000,
595 .end = 0x2800 - 1,
596 .flags = IORESOURCE_MEM,
597 },
598 /*
599 * NAND Flash
600 */
601 {
602 .name = "NandFlash",
603 .start = NAND_FLASH_BASE,
604 .end = NAND_FLASH_BASE + 0x400 - 1,
605 .flags = IORESOURCE_MEM,
606 },
607 /*
608 * Synopsys GMAC Memory Region
609 */
610 {
611 .name = "GMAC",
612 .start = 0x00000000,
613 .end = 0x00010000 - 1,
614 .flags = IORESOURCE_MEM,
615 },
616 /*
617 * Add other resources here
618 */
619 { },
620};
diff --git a/arch/mips/powertv/asic/prealloc-cronus.c b/arch/mips/powertv/asic/prealloc-cronus.c
new file mode 100644
index 000000000000..45a5c3ea718c
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-cronus.c
@@ -0,0 +1,608 @@
1/*
2 * Memory pre-allocations for Cronus boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * DVR_CAPABLE CRONUS RESOURCES
29 */
30struct resource dvr_cronus_resources[] __initdata =
31{
32 /*
33 *
34 * VIDEO1 / LX1
35 *
36 */
37 {
38 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
39 .start = 0x24000000,
40 .end = 0x241FFFFF, /* 2MiB */
41 .flags = IORESOURCE_MEM,
42 },
43 {
44 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
45 .start = 0x24200000,
46 .end = 0x24201FFF,
47 .flags = IORESOURCE_MEM,
48 },
49 {
50 .name = "MediaMemory1",
51 .start = 0x24202000,
52 .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
53 .flags = IORESOURCE_MEM,
54 },
55 /*
56 *
57 * VIDEO2 / LX2
58 *
59 */
60 {
61 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
62 .start = 0x60000000,
63 .end = 0x601FFFFF, /* 2MiB */
64 .flags = IORESOURCE_IO,
65 },
66 {
67 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
68 .start = 0x60200000,
69 .end = 0x60201FFF,
70 .flags = IORESOURCE_IO,
71 },
72 {
73 .name = "MediaMemory2",
74 .start = 0x60202000,
75 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
76 .flags = IORESOURCE_IO,
77 },
78 /*
79 *
80 * Sysaudio Driver
81 *
82 * This driver requires:
83 *
84 * Arbitrary Based Buffers:
85 * DSP_Image_Buff - DSP code and data images (1MB)
86 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
87 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
88 * ADSC_Main_Buff - ADSC Main buffer (16KB)
89 *
90 */
91 {
92 .name = "DSP_Image_Buff",
93 .start = 0x00000000,
94 .end = 0x000FFFFF,
95 .flags = IORESOURCE_MEM,
96 },
97 {
98 .name = "ADSC_CPU_PCM_Buff",
99 .start = 0x00000000,
100 .end = 0x00009FFF,
101 .flags = IORESOURCE_MEM,
102 },
103 {
104 .name = "ADSC_AUX_Buff",
105 .start = 0x00000000,
106 .end = 0x00003FFF,
107 .flags = IORESOURCE_MEM,
108 },
109 {
110 .name = "ADSC_Main_Buff",
111 .start = 0x00000000,
112 .end = 0x00003FFF,
113 .flags = IORESOURCE_MEM,
114 },
115 /*
116 *
117 * STAVEM driver/STAPI
118 *
119 * This driver requires:
120 *
121 * Arbitrary Based Buffers:
122 * This memory area is used for allocating buffers for Video decoding
123 * purposes. Allocation/De-allocation within this buffer is managed
124 * by the STAVMEM driver of the STAPI. They could be Decimated
125 * Picture Buffers, Intermediate Buffers, as deemed necessary for
126 * video decoding purposes, for any video decoders on Zeus.
127 *
128 */
129 {
130 .name = "AVMEMPartition0",
131 .start = 0x63580000,
132 .end = 0x64180000 - 1, /* 12 MB total */
133 .flags = IORESOURCE_IO,
134 },
135 /*
136 *
137 * DOCSIS Subsystem
138 *
139 * This driver requires:
140 *
141 * Arbitrary Based Buffers:
142 * Docsis -
143 *
144 */
145 {
146 .name = "Docsis",
147 .start = 0x62000000,
148 .end = 0x62700000 - 1, /* 7 MB total */
149 .flags = IORESOURCE_IO,
150 },
151 /*
152 *
153 * GHW HAL Driver
154 *
155 * This driver requires:
156 *
157 * Arbitrary Based Buffers:
158 * GraphicsHeap - PowerTV Graphics Heap
159 *
160 */
161 {
162 .name = "GraphicsHeap",
163 .start = 0x62700000,
164 .end = 0x63500000 - 1, /* 14 MB total */
165 .flags = IORESOURCE_IO,
166 },
167 /*
168 *
169 * multi com buffer area
170 *
171 * This driver requires:
172 *
173 * Arbitrary Based Buffers:
174 * Docsis -
175 *
176 */
177 {
178 .name = "MulticomSHM",
179 .start = 0x26000000,
180 .end = 0x26020000 - 1,
181 .flags = IORESOURCE_MEM,
182 },
183 /*
184 *
185 * DMA Ring buffer
186 *
187 * This driver requires:
188 *
189 * Arbitrary Based Buffers:
190 * Docsis -
191 *
192 */
193 {
194 .name = "BMM_Buffer",
195 .start = 0x00000000,
196 .end = 0x00280000 - 1,
197 .flags = IORESOURCE_MEM,
198 },
199 /*
200 *
201 * Display bins buffer for unit0
202 *
203 * This driver requires:
204 *
205 * Arbitrary Based Buffers:
206 * Display Bins for unit0
207 *
208 */
209 {
210 .name = "DisplayBins0",
211 .start = 0x00000000,
212 .end = 0x00000FFF, /* 4 KB total */
213 .flags = IORESOURCE_MEM,
214 },
215 /*
216 *
217 * Display bins buffer
218 *
219 * This driver requires:
220 *
221 * Arbitrary Based Buffers:
222 * Display Bins for unit1
223 *
224 */
225 {
226 .name = "DisplayBins1",
227 .start = 0x64AD4000,
228 .end = 0x64AD5000 - 1, /* 4 KB total */
229 .flags = IORESOURCE_IO,
230 },
231 /*
232 *
233 * ITFS
234 *
235 * This driver requires:
236 *
237 * Arbitrary Based Buffers:
238 * Docsis -
239 *
240 */
241 {
242 .name = "ITFS",
243 .start = 0x64180000,
244 /* 815,104 bytes each for 2 ITFS partitions. */
245 .end = 0x6430DFFF,
246 .flags = IORESOURCE_IO,
247 },
248 /*
249 *
250 * AVFS
251 *
252 * This driver requires:
253 *
254 * Arbitrary Based Buffers:
255 * Docsis -
256 *
257 */
258 {
259 .name = "AvfsDmaMem",
260 .start = 0x6430E000,
261 /* (945K * 8) = (128K *3) 5 playbacks / 3 server */
262 .end = 0x64AD0000 - 1,
263 .flags = IORESOURCE_IO,
264 },
265 {
266 .name = "AvfsFileSys",
267 .start = 0x64AD0000,
268 .end = 0x64AD1000 - 1, /* 4K */
269 .flags = IORESOURCE_IO,
270 },
271 /*
272 *
273 * PMEM
274 *
275 * This driver requires:
276 *
277 * Arbitrary Based Buffers:
278 * Persistent memory for diagnostics.
279 *
280 */
281 {
282 .name = "DiagPersistentMemory",
283 .start = 0x00000000,
284 .end = 0x10000 - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 /*
288 *
289 * Smartcard
290 *
291 * This driver requires:
292 *
293 * Arbitrary Based Buffers:
294 * Read and write buffers for Internal/External cards
295 *
296 */
297 {
298 .name = "SmartCardInfo",
299 .start = 0x64AD1000,
300 .end = 0x64AD3800 - 1,
301 .flags = IORESOURCE_IO,
302 },
303 /*
304 *
305 * KAVNET
306 * NP Reset Vector - must be of the form xxCxxxxx
307 * NP Image - must be video bank 1
308 * NP IPC - must be video bank 2
309 */
310 {
311 .name = "NP_Reset_Vector",
312 .start = 0x27c00000,
313 .end = 0x27c01000 - 1,
314 .flags = IORESOURCE_MEM,
315 },
316 {
317 .name = "NP_Image",
318 .start = 0x27020000,
319 .end = 0x27060000 - 1,
320 .flags = IORESOURCE_MEM,
321 },
322 {
323 .name = "NP_IPC",
324 .start = 0x63500000,
325 .end = 0x63580000 - 1,
326 .flags = IORESOURCE_IO,
327 },
328 /*
329 * Add other resources here
330 */
331 { },
332};
333
334/*
335 * NON_DVR_CAPABLE CRONUS RESOURCES
336 */
337struct resource non_dvr_cronus_resources[] __initdata =
338{
339 /*
340 *
341 * VIDEO1 / LX1
342 *
343 */
344 {
345 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
346 .start = 0x24000000,
347 .end = 0x241FFFFF, /* 2MiB */
348 .flags = IORESOURCE_MEM,
349 },
350 {
351 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
352 .start = 0x24200000,
353 .end = 0x24201FFF,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .name = "MediaMemory1",
358 .start = 0x24202000,
359 .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
360 .flags = IORESOURCE_MEM,
361 },
362 /*
363 *
364 * VIDEO2 / LX2
365 *
366 */
367 {
368 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
369 .start = 0x60000000,
370 .end = 0x601FFFFF, /* 2MiB */
371 .flags = IORESOURCE_IO,
372 },
373 {
374 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
375 .start = 0x60200000,
376 .end = 0x60201FFF,
377 .flags = IORESOURCE_IO,
378 },
379 {
380 .name = "MediaMemory2",
381 .start = 0x60202000,
382 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
383 .flags = IORESOURCE_IO,
384 },
385 /*
386 *
387 * Sysaudio Driver
388 *
389 * This driver requires:
390 *
391 * Arbitrary Based Buffers:
392 * DSP_Image_Buff - DSP code and data images (1MB)
393 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
394 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
395 * ADSC_Main_Buff - ADSC Main buffer (16KB)
396 *
397 */
398 {
399 .name = "DSP_Image_Buff",
400 .start = 0x00000000,
401 .end = 0x000FFFFF,
402 .flags = IORESOURCE_MEM,
403 },
404 {
405 .name = "ADSC_CPU_PCM_Buff",
406 .start = 0x00000000,
407 .end = 0x00009FFF,
408 .flags = IORESOURCE_MEM,
409 },
410 {
411 .name = "ADSC_AUX_Buff",
412 .start = 0x00000000,
413 .end = 0x00003FFF,
414 .flags = IORESOURCE_MEM,
415 },
416 {
417 .name = "ADSC_Main_Buff",
418 .start = 0x00000000,
419 .end = 0x00003FFF,
420 .flags = IORESOURCE_MEM,
421 },
422 /*
423 *
424 * STAVEM driver/STAPI
425 *
426 * This driver requires:
427 *
428 * Arbitrary Based Buffers:
429 * This memory area is used for allocating buffers for Video decoding
430 * purposes. Allocation/De-allocation within this buffer is managed
431 * by the STAVMEM driver of the STAPI. They could be Decimated
432 * Picture Buffers, Intermediate Buffers, as deemed necessary for
433 * video decoding purposes, for any video decoders on Zeus.
434 *
435 */
436 {
437 .name = "AVMEMPartition0",
438 .start = 0x63580000,
439 .end = 0x64180000 - 1, /* 12 MB total */
440 .flags = IORESOURCE_IO,
441 },
442 /*
443 *
444 * DOCSIS Subsystem
445 *
446 * This driver requires:
447 *
448 * Arbitrary Based Buffers:
449 * Docsis -
450 *
451 */
452 {
453 .name = "Docsis",
454 .start = 0x62000000,
455 .end = 0x62700000 - 1, /* 7 MB total */
456 .flags = IORESOURCE_IO,
457 },
458 /*
459 *
460 * GHW HAL Driver
461 *
462 * This driver requires:
463 *
464 * Arbitrary Based Buffers:
465 * GraphicsHeap - PowerTV Graphics Heap
466 *
467 */
468 {
469 .name = "GraphicsHeap",
470 .start = 0x62700000,
471 .end = 0x63500000 - 1, /* 14 MB total */
472 .flags = IORESOURCE_IO,
473 },
474 /*
475 *
476 * multi com buffer area
477 *
478 * This driver requires:
479 *
480 * Arbitrary Based Buffers:
481 * Docsis -
482 *
483 */
484 {
485 .name = "MulticomSHM",
486 .start = 0x26000000,
487 .end = 0x26020000 - 1,
488 .flags = IORESOURCE_MEM,
489 },
490 /*
491 *
492 * DMA Ring buffer
493 *
494 * This driver requires:
495 *
496 * Arbitrary Based Buffers:
497 * Docsis -
498 *
499 */
500 {
501 .name = "BMM_Buffer",
502 .start = 0x00000000,
503 .end = 0x000AA000 - 1,
504 .flags = IORESOURCE_MEM,
505 },
506 /*
507 *
508 * Display bins buffer for unit0
509 *
510 * This driver requires:
511 *
512 * Arbitrary Based Buffers:
513 * Display Bins for unit0
514 *
515 */
516 {
517 .name = "DisplayBins0",
518 .start = 0x00000000,
519 .end = 0x00000FFF, /* 4 KB total */
520 .flags = IORESOURCE_MEM,
521 },
522 /*
523 *
524 * Display bins buffer
525 *
526 * This driver requires:
527 *
528 * Arbitrary Based Buffers:
529 * Display Bins for unit1
530 *
531 */
532 {
533 .name = "DisplayBins1",
534 .start = 0x64AD4000,
535 .end = 0x64AD5000 - 1, /* 4 KB total */
536 .flags = IORESOURCE_IO,
537 },
538 /*
539 *
540 * AVFS: player HAL memory
541 *
542 *
543 */
544 {
545 .name = "AvfsDmaMem",
546 .start = 0x6430E000,
547 .end = 0x645D2C00 - 1, /* 945K * 3 for playback */
548 .flags = IORESOURCE_IO,
549 },
550 /*
551 *
552 * PMEM
553 *
554 * This driver requires:
555 *
556 * Arbitrary Based Buffers:
557 * Persistent memory for diagnostics.
558 *
559 */
560 {
561 .name = "DiagPersistentMemory",
562 .start = 0x00000000,
563 .end = 0x10000 - 1,
564 .flags = IORESOURCE_MEM,
565 },
566 /*
567 *
568 * Smartcard
569 *
570 * This driver requires:
571 *
572 * Arbitrary Based Buffers:
573 * Read and write buffers for Internal/External cards
574 *
575 */
576 {
577 .name = "SmartCardInfo",
578 .start = 0x64AD1000,
579 .end = 0x64AD3800 - 1,
580 .flags = IORESOURCE_IO,
581 },
582 /*
583 *
584 * KAVNET
585 * NP Reset Vector - must be of the form xxCxxxxx
586 * NP Image - must be video bank 1
587 * NP IPC - must be video bank 2
588 */
589 {
590 .name = "NP_Reset_Vector",
591 .start = 0x27c00000,
592 .end = 0x27c01000 - 1,
593 .flags = IORESOURCE_MEM,
594 },
595 {
596 .name = "NP_Image",
597 .start = 0x27020000,
598 .end = 0x27060000 - 1,
599 .flags = IORESOURCE_MEM,
600 },
601 {
602 .name = "NP_IPC",
603 .start = 0x63500000,
604 .end = 0x63580000 - 1,
605 .flags = IORESOURCE_IO,
606 },
607 { },
608};
diff --git a/arch/mips/powertv/asic/prealloc-cronuslite.c b/arch/mips/powertv/asic/prealloc-cronuslite.c
new file mode 100644
index 000000000000..23a905613c04
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-cronuslite.c
@@ -0,0 +1,290 @@
1/*
2 * Memory pre-allocations for Cronus Lite boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * NON_DVR_CAPABLE CRONUSLITE RESOURCES
29 */
30struct resource non_dvr_cronuslite_resources[] __initdata =
31{
32 /*
33 *
34 * VIDEO2 / LX2
35 *
36 */
37 {
38 .name = "ST231aImage", /* Delta-Mu 2 image and ram */
39 .start = 0x60000000,
40 .end = 0x601FFFFF, /* 2MiB */
41 .flags = IORESOURCE_IO,
42 },
43 {
44 .name = "ST231aMonitor", /* 8KiB block ST231b monitor */
45 .start = 0x60200000,
46 .end = 0x60201FFF,
47 .flags = IORESOURCE_IO,
48 },
49 {
50 .name = "MediaMemory1",
51 .start = 0x60202000,
52 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
53 .flags = IORESOURCE_IO,
54 },
55 /*
56 *
57 * Sysaudio Driver
58 *
59 * This driver requires:
60 *
61 * Arbitrary Based Buffers:
62 * DSP_Image_Buff - DSP code and data images (1MB)
63 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
64 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
65 * ADSC_Main_Buff - ADSC Main buffer (16KB)
66 *
67 */
68 {
69 .name = "DSP_Image_Buff",
70 .start = 0x00000000,
71 .end = 0x000FFFFF,
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .name = "ADSC_CPU_PCM_Buff",
76 .start = 0x00000000,
77 .end = 0x00009FFF,
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .name = "ADSC_AUX_Buff",
82 .start = 0x00000000,
83 .end = 0x00003FFF,
84 .flags = IORESOURCE_MEM,
85 },
86 {
87 .name = "ADSC_Main_Buff",
88 .start = 0x00000000,
89 .end = 0x00003FFF,
90 .flags = IORESOURCE_MEM,
91 },
92 /*
93 *
94 * STAVEM driver/STAPI
95 *
96 * This driver requires:
97 *
98 * Arbitrary Based Buffers:
99 * This memory area is used for allocating buffers for Video decoding
100 * purposes. Allocation/De-allocation within this buffer is managed
101 * by the STAVMEM driver of the STAPI. They could be Decimated
102 * Picture Buffers, Intermediate Buffers, as deemed necessary for
103 * video decoding purposes, for any video decoders on Zeus.
104 *
105 */
106 {
107 .name = "AVMEMPartition0",
108 .start = 0x63580000,
109 .end = 0x63B80000 - 1, /* 6 MB total */
110 .flags = IORESOURCE_IO,
111 },
112 /*
113 *
114 * DOCSIS Subsystem
115 *
116 * This driver requires:
117 *
118 * Arbitrary Based Buffers:
119 * Docsis -
120 *
121 */
122 {
123 .name = "Docsis",
124 .start = 0x62000000,
125 .end = 0x62700000 - 1, /* 7 MB total */
126 .flags = IORESOURCE_IO,
127 },
128 /*
129 *
130 * GHW HAL Driver
131 *
132 * This driver requires:
133 *
134 * Arbitrary Based Buffers:
135 * GraphicsHeap - PowerTV Graphics Heap
136 *
137 */
138 {
139 .name = "GraphicsHeap",
140 .start = 0x62700000,
141 .end = 0x63500000 - 1, /* 14 MB total */
142 .flags = IORESOURCE_IO,
143 },
144 /*
145 *
146 * multi com buffer area
147 *
148 * This driver requires:
149 *
150 * Arbitrary Based Buffers:
151 * Docsis -
152 *
153 */
154 {
155 .name = "MulticomSHM",
156 .start = 0x26000000,
157 .end = 0x26020000 - 1,
158 .flags = IORESOURCE_MEM,
159 },
160 /*
161 *
162 * DMA Ring buffer
163 *
164 * This driver requires:
165 *
166 * Arbitrary Based Buffers:
167 * Docsis -
168 *
169 */
170 {
171 .name = "BMM_Buffer",
172 .start = 0x00000000,
173 .end = 0x000AA000 - 1,
174 .flags = IORESOURCE_MEM,
175 },
176 /*
177 *
178 * Display bins buffer for unit0
179 *
180 * This driver requires:
181 *
182 * Arbitrary Based Buffers:
183 * Display Bins for unit0
184 *
185 */
186 {
187 .name = "DisplayBins0",
188 .start = 0x00000000,
189 .end = 0x00000FFF, /* 4 KB total */
190 .flags = IORESOURCE_MEM,
191 },
192 /*
193 *
194 * Display bins buffer
195 *
196 * This driver requires:
197 *
198 * Arbitrary Based Buffers:
199 * Display Bins for unit1
200 *
201 */
202 {
203 .name = "DisplayBins1",
204 .start = 0x63B83000,
205 .end = 0x63B84000 - 1, /* 4 KB total */
206 .flags = IORESOURCE_IO,
207 },
208 /*
209 *
210 * AVFS: player HAL memory
211 *
212 *
213 */
214 {
215 .name = "AvfsDmaMem",
216 .start = 0x63B84000,
217 .end = 0x63E48C00 - 1, /* 945K * 3 for playback */
218 .flags = IORESOURCE_IO,
219 },
220 /*
221 *
222 * PMEM
223 *
224 * This driver requires:
225 *
226 * Arbitrary Based Buffers:
227 * Persistent memory for diagnostics.
228 *
229 */
230 {
231 .name = "DiagPersistentMemory",
232 .start = 0x00000000,
233 .end = 0x10000 - 1,
234 .flags = IORESOURCE_MEM,
235 },
236 /*
237 *
238 * Smartcard
239 *
240 * This driver requires:
241 *
242 * Arbitrary Based Buffers:
243 * Read and write buffers for Internal/External cards
244 *
245 */
246 {
247 .name = "SmartCardInfo",
248 .start = 0x63B80000,
249 .end = 0x63B82800 - 1,
250 .flags = IORESOURCE_IO,
251 },
252 /*
253 *
254 * KAVNET
255 * NP Reset Vector - must be of the form xxCxxxxx
256 * NP Image - must be video bank 1
257 * NP IPC - must be video bank 2
258 */
259 {
260 .name = "NP_Reset_Vector",
261 .start = 0x27c00000,
262 .end = 0x27c01000 - 1,
263 .flags = IORESOURCE_MEM,
264 },
265 {
266 .name = "NP_Image",
267 .start = 0x27020000,
268 .end = 0x27060000 - 1,
269 .flags = IORESOURCE_MEM,
270 },
271 {
272 .name = "NP_IPC",
273 .start = 0x63500000,
274 .end = 0x63580000 - 1,
275 .flags = IORESOURCE_IO,
276 },
277 /*
278 * NAND Flash
279 */
280 {
281 .name = "NandFlash",
282 .start = NAND_FLASH_BASE,
283 .end = NAND_FLASH_BASE + 0x400 - 1,
284 .flags = IORESOURCE_IO,
285 },
286 /*
287 * Add other resources here
288 */
289 { },
290};
diff --git a/arch/mips/powertv/asic/prealloc-zeus.c b/arch/mips/powertv/asic/prealloc-zeus.c
new file mode 100644
index 000000000000..018d4514dbe3
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-zeus.c
@@ -0,0 +1,459 @@
1/*
2 * Memory pre-allocations for Zeus boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * DVR_CAPABLE RESOURCES
29 */
30struct resource dvr_zeus_resources[] __initdata =
31{
32 /*
33 *
34 * VIDEO1 / LX1
35 *
36 */
37 {
38 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
39 .start = 0x20000000,
40 .end = 0x201FFFFF, /* 2MiB */
41 .flags = IORESOURCE_IO,
42 },
43 {
44 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
45 .start = 0x20200000,
46 .end = 0x20201FFF,
47 .flags = IORESOURCE_IO,
48 },
49 {
50 .name = "MediaMemory1",
51 .start = 0x20202000,
52 .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
53 .flags = IORESOURCE_IO,
54 },
55 /*
56 *
57 * VIDEO2 / LX2
58 *
59 */
60 {
61 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
62 .start = 0x30000000,
63 .end = 0x301FFFFF, /* 2MiB */
64 .flags = IORESOURCE_IO,
65 },
66 {
67 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
68 .start = 0x30200000,
69 .end = 0x30201FFF,
70 .flags = IORESOURCE_IO,
71 },
72 {
73 .name = "MediaMemory2",
74 .start = 0x30202000,
75 .end = 0x31FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
76 .flags = IORESOURCE_IO,
77 },
78 /*
79 *
80 * Sysaudio Driver
81 *
82 * This driver requires:
83 *
84 * Arbitrary Based Buffers:
85 * DSP_Image_Buff - DSP code and data images (1MB)
86 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
87 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
88 * ADSC_Main_Buff - ADSC Main buffer (16KB)
89 *
90 */
91 {
92 .name = "DSP_Image_Buff",
93 .start = 0x00000000,
94 .end = 0x000FFFFF,
95 .flags = IORESOURCE_MEM,
96 },
97 {
98 .name = "ADSC_CPU_PCM_Buff",
99 .start = 0x00000000,
100 .end = 0x00009FFF,
101 .flags = IORESOURCE_MEM,
102 },
103 {
104 .name = "ADSC_AUX_Buff",
105 .start = 0x00000000,
106 .end = 0x00003FFF,
107 .flags = IORESOURCE_MEM,
108 },
109 {
110 .name = "ADSC_Main_Buff",
111 .start = 0x00000000,
112 .end = 0x00003FFF,
113 .flags = IORESOURCE_MEM,
114 },
115 /*
116 *
117 * STAVEM driver/STAPI
118 *
119 * This driver requires:
120 *
121 * Arbitrary Based Buffers:
122 * This memory area is used for allocating buffers for Video decoding
123 * purposes. Allocation/De-allocation within this buffer is managed
124 * by the STAVMEM driver of the STAPI. They could be Decimated
125 * Picture Buffers, Intermediate Buffers, as deemed necessary for
126 * video decoding purposes, for any video decoders on Zeus.
127 *
128 */
129 {
130 .name = "AVMEMPartition0",
131 .start = 0x00000000,
132 .end = 0x00c00000 - 1, /* 12 MB total */
133 .flags = IORESOURCE_MEM,
134 },
135 /*
136 *
137 * DOCSIS Subsystem
138 *
139 * This driver requires:
140 *
141 * Arbitrary Based Buffers:
142 * Docsis -
143 *
144 */
145 {
146 .name = "Docsis",
147 .start = 0x40100000,
148 .end = 0x407fffff,
149 .flags = IORESOURCE_MEM,
150 },
151 /*
152 *
153 * GHW HAL Driver
154 *
155 * This driver requires:
156 *
157 * Arbitrary Based Buffers:
158 * GraphicsHeap - PowerTV Graphics Heap
159 *
160 */
161 {
162 .name = "GraphicsHeap",
163 .start = 0x46900000,
164 .end = 0x47700000 - 1, /* 14 MB total */
165 .flags = IORESOURCE_MEM,
166 },
167 /*
168 *
169 * multi com buffer area
170 *
171 * This driver requires:
172 *
173 * Arbitrary Based Buffers:
174 * Docsis -
175 *
176 */
177 {
178 .name = "MulticomSHM",
179 .start = 0x47900000,
180 .end = 0x47920000 - 1,
181 .flags = IORESOURCE_MEM,
182 },
183 /*
184 *
185 * DMA Ring buffer
186 *
187 * This driver requires:
188 *
189 * Arbitrary Based Buffers:
190 * Docsis -
191 *
192 */
193 {
194 .name = "BMM_Buffer",
195 .start = 0x00000000,
196 .end = 0x00280000 - 1,
197 .flags = IORESOURCE_MEM,
198 },
199 /*
200 *
201 * Display bins buffer for unit0
202 *
203 * This driver requires:
204 *
205 * Arbitrary Based Buffers:
206 * Display Bins for unit0
207 *
208 */
209 {
210 .name = "DisplayBins0",
211 .start = 0x00000000,
212 .end = 0x00000FFF, /* 4 KB total */
213 .flags = IORESOURCE_MEM,
214 },
215 /*
216 *
217 * Display bins buffer
218 *
219 * This driver requires:
220 *
221 * Arbitrary Based Buffers:
222 * Display Bins for unit1
223 *
224 */
225 {
226 .name = "DisplayBins1",
227 .start = 0x00000000,
228 .end = 0x00000FFF, /* 4 KB total */
229 .flags = IORESOURCE_MEM,
230 },
231 /*
232 *
233 * ITFS
234 *
235 * This driver requires:
236 *
237 * Arbitrary Based Buffers:
238 * Docsis -
239 *
240 */
241 {
242 .name = "ITFS",
243 .start = 0x00000000,
244 /* 815,104 bytes each for 2 ITFS partitions. */
245 .end = 0x0018DFFF,
246 .flags = IORESOURCE_MEM,
247 },
248 /*
249 *
250 * AVFS
251 *
252 * This driver requires:
253 *
254 * Arbitrary Based Buffers:
255 * Docsis -
256 *
257 */
258 {
259 .name = "AvfsDmaMem",
260 .start = 0x00000000,
261 /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */
262 .end = 0x007c2000 - 1,
263 .flags = IORESOURCE_MEM,
264 },
265 {
266 .name = "AvfsFileSys",
267 .start = 0x00000000,
268 .end = 0x00001000 - 1, /* 4K */
269 .flags = IORESOURCE_MEM,
270 },
271 /*
272 *
273 * PMEM
274 *
275 * This driver requires:
276 *
277 * Arbitrary Based Buffers:
278 * Persistent memory for diagnostics.
279 *
280 */
281 {
282 .name = "DiagPersistentMemory",
283 .start = 0x00000000,
284 .end = 0x10000 - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 /*
288 *
289 * Smartcard
290 *
291 * This driver requires:
292 *
293 * Arbitrary Based Buffers:
294 * Read and write buffers for Internal/External cards
295 *
296 */
297 {
298 .name = "SmartCardInfo",
299 .start = 0x00000000,
300 .end = 0x2800 - 1,
301 .flags = IORESOURCE_MEM,
302 },
303 /*
304 * Add other resources here
305 */
306 { },
307};
308
309/*
310 * NON_DVR_CAPABLE ZEUS RESOURCES
311 */
312struct resource non_dvr_zeus_resources[] __initdata =
313{
314 /*
315 * VIDEO1 / LX1
316 */
317 {
318 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
319 .start = 0x20000000,
320 .end = 0x201FFFFF, /* 2MiB */
321 .flags = IORESOURCE_IO,
322 },
323 {
324 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
325 .start = 0x20200000,
326 .end = 0x20201FFF,
327 .flags = IORESOURCE_IO,
328 },
329 {
330 .name = "MediaMemory1",
331 .start = 0x20202000,
332 .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
333 .flags = IORESOURCE_IO,
334 },
335 /*
336 * Sysaudio Driver
337 */
338 {
339 .name = "DSP_Image_Buff",
340 .start = 0x00000000,
341 .end = 0x000FFFFF,
342 .flags = IORESOURCE_MEM,
343 },
344 {
345 .name = "ADSC_CPU_PCM_Buff",
346 .start = 0x00000000,
347 .end = 0x00009FFF,
348 .flags = IORESOURCE_MEM,
349 },
350 {
351 .name = "ADSC_AUX_Buff",
352 .start = 0x00000000,
353 .end = 0x00003FFF,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .name = "ADSC_Main_Buff",
358 .start = 0x00000000,
359 .end = 0x00003FFF,
360 .flags = IORESOURCE_MEM,
361 },
362 /*
363 * STAVEM driver/STAPI
364 */
365 {
366 .name = "AVMEMPartition0",
367 .start = 0x00000000,
368 .end = 0x00600000 - 1, /* 6 MB total */
369 .flags = IORESOURCE_MEM,
370 },
371 /*
372 * DOCSIS Subsystem
373 */
374 {
375 .name = "Docsis",
376 .start = 0x40100000,
377 .end = 0x407fffff,
378 .flags = IORESOURCE_MEM,
379 },
380 /*
381 * GHW HAL Driver
382 */
383 {
384 .name = "GraphicsHeap",
385 .start = 0x46900000,
386 .end = 0x47700000 - 1, /* 14 MB total */
387 .flags = IORESOURCE_MEM,
388 },
389 /*
390 * multi com buffer area
391 */
392 {
393 .name = "MulticomSHM",
394 .start = 0x47900000,
395 .end = 0x47920000 - 1,
396 .flags = IORESOURCE_MEM,
397 },
398 /*
399 * DMA Ring buffer
400 */
401 {
402 .name = "BMM_Buffer",
403 .start = 0x00000000,
404 .end = 0x00280000 - 1,
405 .flags = IORESOURCE_MEM,
406 },
407 /*
408 * Display bins buffer for unit0
409 */
410 {
411 .name = "DisplayBins0",
412 .start = 0x00000000,
413 .end = 0x00000FFF, /* 4 KB total */
414 .flags = IORESOURCE_MEM,
415 },
416 /*
417 *
418 * AVFS: player HAL memory
419 *
420 *
421 */
422 {
423 .name = "AvfsDmaMem",
424 .start = 0x00000000,
425 .end = 0x002c4c00 - 1, /* 945K * 3 for playback */
426 .flags = IORESOURCE_MEM,
427 },
428 /*
429 * PMEM
430 */
431 {
432 .name = "DiagPersistentMemory",
433 .start = 0x00000000,
434 .end = 0x10000 - 1,
435 .flags = IORESOURCE_MEM,
436 },
437 /*
438 * Smartcard
439 */
440 {
441 .name = "SmartCardInfo",
442 .start = 0x00000000,
443 .end = 0x2800 - 1,
444 .flags = IORESOURCE_MEM,
445 },
446 /*
447 * NAND Flash
448 */
449 {
450 .name = "NandFlash",
451 .start = NAND_FLASH_BASE,
452 .end = NAND_FLASH_BASE + 0x400 - 1,
453 .flags = IORESOURCE_IO,
454 },
455 /*
456 * Add other resources here
457 */
458 { },
459};
diff --git a/arch/mips/powertv/cmdline.c b/arch/mips/powertv/cmdline.c
new file mode 100644
index 000000000000..98d73cb0d452
--- /dev/null
+++ b/arch/mips/powertv/cmdline.c
@@ -0,0 +1,52 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 * Kernel command line creation using the prom monitor (YAMON) argc/argv.
20 */
21#include <linux/init.h>
22#include <linux/string.h>
23
24#include <asm/bootinfo.h>
25
26#include "init.h"
27
28/*
29 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
30 * This macro take care of sign extension.
31 */
32#define prom_argv(index) ((char *)(long)_prom_argv[(index)])
33
34char * __init prom_getcmdline(void)
35{
36 return &(arcs_cmdline[0]);
37}
38
39void __init prom_init_cmdline(void)
40{
41 int len;
42
43 if (prom_argc != 1)
44 return;
45
46 len = strlen(arcs_cmdline);
47
48 arcs_cmdline[len] = ' ';
49
50 strlcpy(arcs_cmdline + len + 1, (char *)_prom_argv,
51 COMMAND_LINE_SIZE - len - 1);
52}
diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c
new file mode 100644
index 000000000000..5f4e4c304e48
--- /dev/null
+++ b/arch/mips/powertv/init.c
@@ -0,0 +1,128 @@
1/*
2 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
6 * Portions copyright (C) 2009 Cisco Systems, Inc.
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 *
21 * PROM library initialisation code.
22 */
23#include <linux/init.h>
24#include <linux/string.h>
25#include <linux/kernel.h>
26
27#include <asm/bootinfo.h>
28#include <linux/io.h>
29#include <asm/system.h>
30#include <asm/cacheflush.h>
31#include <asm/traps.h>
32
33#include <asm/mips-boards/prom.h>
34#include <asm/mips-boards/generic.h>
35#include <asm/mach-powertv/asic.h>
36
37#include "init.h"
38
39int prom_argc;
40int *_prom_argv, *_prom_envp;
41unsigned long _prom_memsize;
42
43/*
44 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
45 * This macro take care of sign extension, if running in 64-bit mode.
46 */
47#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
48
49char *prom_getenv(char *envname)
50{
51 char *result = NULL;
52
53 if (_prom_envp != NULL) {
54 /*
55 * Return a pointer to the given environment variable.
56 * In 64-bit mode: we're using 64-bit pointers, but all pointers
57 * in the PROM structures are only 32-bit, so we need some
58 * workarounds, if we are running in 64-bit mode.
59 */
60 int i, index = 0;
61
62 i = strlen(envname);
63
64 while (prom_envp(index)) {
65 if (strncmp(envname, prom_envp(index), i) == 0) {
66 result = prom_envp(index + 1);
67 break;
68 }
69 index += 2;
70 }
71 }
72
73 return result;
74}
75
76/* TODO: Verify on linux-mips mailing list that the following two */
77/* functions are correct */
78/* TODO: Copy NMI and EJTAG exception vectors to memory from the */
79/* BootROM exception vectors. Flush their cache entries. test it. */
80
81static void __init mips_nmi_setup(void)
82{
83 void *base;
84#if defined(CONFIG_CPU_MIPS32_R1)
85 base = cpu_has_veic ?
86 (void *)(CAC_BASE + 0xa80) :
87 (void *)(CAC_BASE + 0x380);
88#elif defined(CONFIG_CPU_MIPS32_R2)
89 base = (void *)0xbfc00000;
90#else
91#error NMI exception handler address not defined
92#endif
93}
94
95static void __init mips_ejtag_setup(void)
96{
97 void *base;
98
99#if defined(CONFIG_CPU_MIPS32_R1)
100 base = cpu_has_veic ?
101 (void *)(CAC_BASE + 0xa00) :
102 (void *)(CAC_BASE + 0x300);
103#elif defined(CONFIG_CPU_MIPS32_R2)
104 base = (void *)0xbfc00480;
105#else
106#error EJTAG exception handler address not defined
107#endif
108}
109
110void __init prom_init(void)
111{
112 prom_argc = fw_arg0;
113 _prom_argv = (int *) fw_arg1;
114 _prom_envp = (int *) fw_arg2;
115 _prom_memsize = (unsigned long) fw_arg3;
116
117 board_nmi_handler_setup = mips_nmi_setup;
118 board_ejtag_handler_setup = mips_ejtag_setup;
119
120 pr_info("\nLINUX started...\n");
121 prom_init_cmdline();
122 configure_platform();
123 prom_meminit();
124
125#ifndef CONFIG_BOOTLOADER_DRIVER
126 pr_info("\nBootloader driver isn't loaded...\n");
127#endif
128}
diff --git a/arch/mips/powertv/init.h b/arch/mips/powertv/init.h
new file mode 100644
index 000000000000..7af6bf25008c
--- /dev/null
+++ b/arch/mips/powertv/init.h
@@ -0,0 +1,28 @@
1/*
2 * Definitions from powertv init.c file
3 *
4 * Copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: David VomLehn
21 */
22
23#ifndef _POWERTV_INIT_H
24#define _POWERTV_INIT_H
25extern int prom_argc;
26extern int *_prom_argv;
27extern unsigned long _prom_memsize;
28#endif
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c
new file mode 100644
index 000000000000..28d06605fff6
--- /dev/null
+++ b/arch/mips/powertv/memory.c
@@ -0,0 +1,186 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 * Apparently originally from arch/mips/malta-memory.c. Modified to work
20 * with the PowerTV bootloader.
21 */
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/bootmem.h>
25#include <linux/pfn.h>
26#include <linux/string.h>
27
28#include <asm/bootinfo.h>
29#include <asm/page.h>
30#include <asm/sections.h>
31
32#include <asm/mips-boards/prom.h>
33
34#include "init.h"
35
36/* Memory constants */
37#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */
38#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */
39#define DEFAULT_MEMSIZE MEBIBYTE(256) /* If no memsize provided */
40#define LOW_MEM_MAX MEBIBYTE(252) /* Max usable low mem */
41#define RES_BOOTLDR_MEMSIZE MEBIBYTE(1) /* Memory reserved for bldr */
42#define BOOT_MEM_SIZE KIBIBYTE(256) /* Memory reserved for bldr */
43#define PHYS_MEM_START 0x10000000 /* Start of physical memory */
44
45unsigned long ptv_memsize;
46
47char __initdata cmdline[COMMAND_LINE_SIZE];
48
49void __init prom_meminit(void)
50{
51 char *memsize_str;
52 unsigned long memsize = 0;
53 unsigned int physend;
54 char *ptr;
55 int low_mem;
56 int high_mem;
57
58 /* Check the command line first for a memsize directive */
59 strcpy(cmdline, arcs_cmdline);
60 ptr = strstr(cmdline, "memsize=");
61 if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
62 ptr = strstr(ptr, " memsize=");
63
64 if (ptr) {
65 memsize = memparse(ptr + 8, &ptr);
66 } else {
67 /* otherwise look in the environment */
68 memsize_str = prom_getenv("memsize");
69
70 if (memsize_str != NULL) {
71 pr_info("prom memsize = %s\n", memsize_str);
72 memsize = simple_strtol(memsize_str, NULL, 0);
73 }
74
75 if (memsize == 0) {
76 if (_prom_memsize != 0) {
77 memsize = _prom_memsize;
78 pr_info("_prom_memsize = 0x%lx\n", memsize);
79 /* add in memory that the bootloader doesn't
80 * report */
81 memsize += BOOT_MEM_SIZE;
82 } else {
83 memsize = DEFAULT_MEMSIZE;
84 pr_info("Memsize not passed by bootloader, "
85 "defaulting to 0x%lx\n", memsize);
86 }
87 }
88 }
89
90 /* Store memsize for diagnostic purposes */
91 ptv_memsize = memsize;
92
93 physend = PFN_ALIGN(&_end) - 0x80000000;
94 if (memsize > LOW_MEM_MAX) {
95 low_mem = LOW_MEM_MAX;
96 high_mem = memsize - low_mem;
97 } else {
98 low_mem = memsize;
99 high_mem = 0;
100 }
101
102/*
103 * TODO: We will use the hard code for memory configuration until
104 * the bootloader releases their device tree to us.
105 */
106 /*
107 * Add the memory reserved for use by the bootloader to the
108 * memory map.
109 */
110 add_memory_region(PHYS_MEM_START, RES_BOOTLDR_MEMSIZE,
111 BOOT_MEM_RESERVED);
112#ifdef CONFIG_HIGHMEM_256_128
113 /*
114 * Add memory in low for general use by the kernel and its friends
115 * (like drivers, applications, etc).
116 */
117 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
118 LOW_MEM_MAX - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
119 /*
120 * Add the memory reserved for reset vector.
121 */
122 add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED);
123 /*
124 * Add the memory reserved.
125 */
126 add_memory_region(0x20000000, MEBIBYTE(1024 + 75), BOOT_MEM_RESERVED);
127 /*
128 * Add memory in high for general use by the kernel and its friends
129 * (like drivers, applications, etc).
130 *
131 * 75MB is reserved for devices which are using the memory in high.
132 */
133 add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
134 BOOT_MEM_RAM);
135#elif defined CONFIG_HIGHMEM_128_128
136 /*
137 * Add memory in low for general use by the kernel and its friends
138 * (like drivers, applications, etc).
139 */
140 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
141 MEBIBYTE(128) - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
142 /*
143 * Add the memory reserved.
144 */
145 add_memory_region(PHYS_MEM_START + MEBIBYTE(128),
146 MEBIBYTE(128 + 1024 + 75), BOOT_MEM_RESERVED);
147 /*
148 * Add memory in high for general use by the kernel and its friends
149 * (like drivers, applications, etc).
150 *
151 * 75MB is reserved for devices which are using the memory in high.
152 */
153 add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
154 BOOT_MEM_RAM);
155#else
156 /* Add low memory regions for either:
157 * - no-highmemory configuration case -OR-
158 * - highmemory "HIGHMEM_LOWBANK_ONLY" case
159 */
160 /*
161 * Add memory for general use by the kernel and its friends
162 * (like drivers, applications, etc).
163 */
164 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
165 low_mem - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
166 /*
167 * Add the memory reserved for reset vector.
168 */
169 add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED);
170#endif
171}
172
173void __init prom_free_prom_memory(void)
174{
175 unsigned long addr;
176 int i;
177
178 for (i = 0; i < boot_mem_map.nr_map; i++) {
179 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
180 continue;
181
182 addr = boot_mem_map.map[i].addr;
183 free_init_pages("prom memory",
184 addr, addr + boot_mem_map.map[i].size);
185 }
186}
diff --git a/arch/mips/powertv/pci/Makefile b/arch/mips/powertv/pci/Makefile
new file mode 100644
index 000000000000..f5c62462fc9d
--- /dev/null
+++ b/arch/mips/powertv/pci/Makefile
@@ -0,0 +1,21 @@
1#
2# Copyright (C) 2009 Scientific-Atlanta, Inc.
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License as published by
6# the Free Software Foundation; either version 2 of the License, or
7# (at your option) any later version.
8#
9# This program is distributed in the hope that it will be useful,
10# but WITHOUT ANY WARRANTY; without even the implied warranty of
11# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12# GNU General Public License for more details.
13#
14# You should have received a copy of the GNU General Public License
15# along with this program; if not, write to the Free Software
16# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17#
18
19obj-$(CONFIG_PCI) += fixup-powertv.o
20
21EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/pci/fixup-powertv.c b/arch/mips/powertv/pci/fixup-powertv.c
new file mode 100644
index 000000000000..726bc2e824b3
--- /dev/null
+++ b/arch/mips/powertv/pci/fixup-powertv.c
@@ -0,0 +1,36 @@
1#include <linux/init.h>
2#include <linux/pci.h>
3#include <asm/mach-powertv/interrupts.h>
4#include "powertv-pci.h"
5
6int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
7{
8 return asic_pcie_map_irq(dev, slot, pin);
9}
10
11/* Do platform specific device initialization at pci_enable_device() time */
12int pcibios_plat_dev_init(struct pci_dev *dev)
13{
14 return 0;
15}
16
17/*
18 * asic_pcie_map_irq
19 *
20 * Parameters:
21 * *dev - pointer to a pci_dev structure (not used)
22 * slot - slot number (not used)
23 * pin - pin number (not used)
24 *
25 * Return Value:
26 * Returns: IRQ number (always the PCI Express IRQ number)
27 *
28 * Description:
29 * asic_pcie_map_irq will return the IRQ number of the PCI Express interrupt.
30 *
31 */
32int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
33{
34 return irq_pciexp;
35}
36EXPORT_SYMBOL(asic_pcie_map_irq);
diff --git a/arch/mips/powertv/pci/powertv-pci.h b/arch/mips/powertv/pci/powertv-pci.h
new file mode 100644
index 000000000000..1b5886bbd759
--- /dev/null
+++ b/arch/mips/powertv/pci/powertv-pci.h
@@ -0,0 +1,31 @@
1/*
2 * powertv-pci.c
3 *
4 * Copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20/*
21 * Local definitions for the powertv PCI code
22 */
23
24#ifndef _POWERTV_PCI_POWERTV_PCI_H_
25#define _POWERTV_PCI_POWERTV_PCI_H_
26extern int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
27extern int asic_pcie_init(void);
28extern int asic_pcie_init(void);
29
30extern int log_level;
31#endif
diff --git a/arch/mips/powertv/powertv-clock.h b/arch/mips/powertv/powertv-clock.h
new file mode 100644
index 000000000000..d94c54311485
--- /dev/null
+++ b/arch/mips/powertv/powertv-clock.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2009 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 *
18 * Author: David VomLehn
19 */
20
21#ifndef _POWERTV_POWERTV_CLOCK_H
22#define _POWERTV_POWERTV_CLOCK_H
23extern int powertv_clockevent_init(void);
24extern void powertv_clocksource_init(void);
25extern unsigned int mips_get_pll_freq(void);
26#endif
diff --git a/arch/mips/powertv/powertv_setup.c b/arch/mips/powertv/powertv_setup.c
new file mode 100644
index 000000000000..bd8ebf128f29
--- /dev/null
+++ b/arch/mips/powertv/powertv_setup.c
@@ -0,0 +1,351 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */
19#include <linux/init.h>
20#include <linux/sched.h>
21#include <linux/ioport.h>
22#include <linux/pci.h>
23#include <linux/screen_info.h>
24#include <linux/notifier.h>
25#include <linux/etherdevice.h>
26#include <linux/if_ether.h>
27#include <linux/ctype.h>
28
29#include <linux/cpu.h>
30#include <asm/bootinfo.h>
31#include <asm/irq.h>
32#include <asm/mips-boards/generic.h>
33#include <asm/mips-boards/prom.h>
34#include <asm/dma.h>
35#include <linux/time.h>
36#include <asm/traps.h>
37#include <asm/asm-offsets.h>
38#include "reset.h"
39
40#define VAL(n) STR(n)
41
42/*
43 * Macros for loading addresses and storing registers:
44 * PTR_LA Load the address into a register
45 * LONG_S Store the full width of the given register.
46 * LONG_L Load the full width of the given register
47 * PTR_ADDIU Add a constant value to a register used as a pointer
48 * REG_SIZE Number of 8-bit bytes in a full width register
49 */
50#ifdef CONFIG_64BIT
51#warning TODO: 64-bit code needs to be verified
52#define PTR_LA "dla "
53#define LONG_S "sd "
54#define LONG_L "ld "
55#define PTR_ADDIU "daddiu "
56#define REG_SIZE "8" /* In bytes */
57#endif
58
59#ifdef CONFIG_32BIT
60#define PTR_LA "la "
61#define LONG_S "sw "
62#define LONG_L "lw "
63#define PTR_ADDIU "addiu "
64#define REG_SIZE "4" /* In bytes */
65#endif
66
67static struct pt_regs die_regs;
68static bool have_die_regs;
69
70static void register_panic_notifier(void);
71static int panic_handler(struct notifier_block *notifier_block,
72 unsigned long event, void *cause_string);
73
74const char *get_system_type(void)
75{
76 return "PowerTV";
77}
78
79void __init plat_mem_setup(void)
80{
81 panic_on_oops = 1;
82 register_panic_notifier();
83
84#if 0
85 mips_pcibios_init();
86#endif
87 mips_reboot_setup();
88}
89
90/*
91 * Install a panic notifier for platform-specific diagnostics
92 */
93static void register_panic_notifier()
94{
95 static struct notifier_block panic_notifier = {
96 .notifier_call = panic_handler,
97 .next = NULL,
98 .priority = INT_MAX
99 };
100 atomic_notifier_chain_register(&panic_notifier_list, &panic_notifier);
101}
102
103static int panic_handler(struct notifier_block *notifier_block,
104 unsigned long event, void *cause_string)
105{
106 struct pt_regs my_regs;
107
108 /* Save all of the registers */
109 {
110 unsigned long at, v0, v1; /* Must be on the stack */
111
112 /* Start by saving $at and v0 on the stack. We use $at
113 * ourselves, but it looks like the compiler may use v0 or v1
114 * to load the address of the pt_regs structure. We'll come
115 * back later to store the registers in the pt_regs
116 * structure. */
117 __asm__ __volatile__ (
118 ".set noat\n"
119 LONG_S "$at, %[at]\n"
120 LONG_S "$2, %[v0]\n"
121 LONG_S "$3, %[v1]\n"
122 :
123 [at] "=m" (at),
124 [v0] "=m" (v0),
125 [v1] "=m" (v1)
126 :
127 : "at"
128 );
129
130 __asm__ __volatile__ (
131 ".set noat\n"
132 "move $at, %[pt_regs]\n"
133
134 /* Argument registers */
135 LONG_S "$4, " VAL(PT_R4) "($at)\n"
136 LONG_S "$5, " VAL(PT_R5) "($at)\n"
137 LONG_S "$6, " VAL(PT_R6) "($at)\n"
138 LONG_S "$7, " VAL(PT_R7) "($at)\n"
139
140 /* Temporary regs */
141 LONG_S "$8, " VAL(PT_R8) "($at)\n"
142 LONG_S "$9, " VAL(PT_R9) "($at)\n"
143 LONG_S "$10, " VAL(PT_R10) "($at)\n"
144 LONG_S "$11, " VAL(PT_R11) "($at)\n"
145 LONG_S "$12, " VAL(PT_R12) "($at)\n"
146 LONG_S "$13, " VAL(PT_R13) "($at)\n"
147 LONG_S "$14, " VAL(PT_R14) "($at)\n"
148 LONG_S "$15, " VAL(PT_R15) "($at)\n"
149
150 /* "Saved" registers */
151 LONG_S "$16, " VAL(PT_R16) "($at)\n"
152 LONG_S "$17, " VAL(PT_R17) "($at)\n"
153 LONG_S "$18, " VAL(PT_R18) "($at)\n"
154 LONG_S "$19, " VAL(PT_R19) "($at)\n"
155 LONG_S "$20, " VAL(PT_R20) "($at)\n"
156 LONG_S "$21, " VAL(PT_R21) "($at)\n"
157 LONG_S "$22, " VAL(PT_R22) "($at)\n"
158 LONG_S "$23, " VAL(PT_R23) "($at)\n"
159
160 /* Add'l temp regs */
161 LONG_S "$24, " VAL(PT_R24) "($at)\n"
162 LONG_S "$25, " VAL(PT_R25) "($at)\n"
163
164 /* Kernel temp regs */
165 LONG_S "$26, " VAL(PT_R26) "($at)\n"
166 LONG_S "$27, " VAL(PT_R27) "($at)\n"
167
168 /* Global pointer, stack pointer, frame pointer and
169 * return address */
170 LONG_S "$gp, " VAL(PT_R28) "($at)\n"
171 LONG_S "$sp, " VAL(PT_R29) "($at)\n"
172 LONG_S "$fp, " VAL(PT_R30) "($at)\n"
173 LONG_S "$ra, " VAL(PT_R31) "($at)\n"
174
175 /* Now we can get the $at and v0 registers back and
176 * store them */
177 LONG_L "$8, %[at]\n"
178 LONG_S "$8, " VAL(PT_R1) "($at)\n"
179 LONG_L "$8, %[v0]\n"
180 LONG_S "$8, " VAL(PT_R2) "($at)\n"
181 LONG_L "$8, %[v1]\n"
182 LONG_S "$8, " VAL(PT_R3) "($at)\n"
183 :
184 :
185 [at] "m" (at),
186 [v0] "m" (v0),
187 [v1] "m" (v1),
188 [pt_regs] "r" (&my_regs)
189 : "at", "t0"
190 );
191
192 /* Set the current EPC value to be the current location in this
193 * function */
194 __asm__ __volatile__ (
195 ".set noat\n"
196 "1:\n"
197 PTR_LA "$at, 1b\n"
198 LONG_S "$at, %[cp0_epc]\n"
199 :
200 [cp0_epc] "=m" (my_regs.cp0_epc)
201 :
202 : "at"
203 );
204
205 my_regs.cp0_cause = read_c0_cause();
206 my_regs.cp0_status = read_c0_status();
207 }
208
209#ifdef CONFIG_DIAGNOSTICS
210 failure_report((char *) cause_string,
211 have_die_regs ? &die_regs : &my_regs);
212 have_die_regs = false;
213#else
214 pr_crit("I'm feeling a bit sleepy. hmmmmm... perhaps a nap would... "
215 "zzzz... \n");
216#endif
217
218 return NOTIFY_DONE;
219}
220
221/**
222 * Platform-specific handling of oops
223 * @str: Pointer to the oops string
224 * @regs: Pointer to the oops registers
225 * All we do here is to save the registers for subsequent printing through
226 * the panic notifier.
227 */
228void platform_die(const char *str, const struct pt_regs *regs)
229{
230 /* If we already have saved registers, don't overwrite them as they
231 * they apply to the initial fault */
232
233 if (!have_die_regs) {
234 have_die_regs = true;
235 die_regs = *regs;
236 }
237}
238
239/* Information about the RF MAC address, if one was supplied on the
240 * command line. */
241static bool have_rfmac;
242static u8 rfmac[ETH_ALEN];
243
244static int rfmac_param(char *p)
245{
246 u8 *q;
247 bool is_high_nibble;
248 int c;
249
250 /* Skip a leading "0x", if present */
251 if (*p == '0' && *(p+1) == 'x')
252 p += 2;
253
254 q = rfmac;
255 is_high_nibble = true;
256
257 for (c = (unsigned char) *p++;
258 isxdigit(c) && q - rfmac < ETH_ALEN;
259 c = (unsigned char) *p++) {
260 int nibble;
261
262 nibble = (isdigit(c) ? (c - '0') :
263 (isupper(c) ? c - 'A' + 10 : c - 'a' + 10));
264
265 if (is_high_nibble)
266 *q = nibble << 4;
267 else
268 *q++ |= nibble;
269
270 is_high_nibble = !is_high_nibble;
271 }
272
273 /* If we parsed all the way to the end of the parameter value and
274 * parsed all ETH_ALEN bytes, we have a usable RF MAC address */
275 have_rfmac = (c == '\0' && q - rfmac == ETH_ALEN);
276
277 return 0;
278}
279
280early_param("rfmac", rfmac_param);
281
282/*
283 * Generate an Ethernet MAC address that has a good chance of being unique.
284 * @addr: Pointer to six-byte array containing the Ethernet address
285 * Generates an Ethernet MAC address that is highly likely to be unique for
286 * this particular system on a network with other systems of the same type.
287 *
288 * The problem we are solving is that, when random_ether_addr() is used to
289 * generate MAC addresses at startup, there isn't much entropy for the random
290 * number generator to use and the addresses it produces are fairly likely to
291 * be the same as those of other identical systems on the same local network.
292 * This is true even for relatively small numbers of systems (for the reason
293 * why, see the Wikipedia entry for "Birthday problem" at:
294 * http://en.wikipedia.org/wiki/Birthday_problem
295 *
296 * The good news is that we already have a MAC address known to be unique, the
297 * RF MAC address. The bad news is that this address is already in use on the
298 * RF interface. Worse, the obvious trick, taking the RF MAC address and
299 * turning on the locally managed bit, has already been used for other devices.
300 * Still, this does give us something to work with.
301 *
302 * The approach we take is:
303 * 1. If we can't get the RF MAC Address, just call random_ether_addr.
304 * 2. Use the 24-bit NIC-specific bits of the RF MAC address as the last 24
305 * bits of the new address. This is very likely to be unique, except for
306 * the current box.
307 * 3. To avoid using addresses already on the current box, we set the top
308 * six bits of the address with a value different from any currently
309 * registered Scientific Atlanta organizationally unique identifyer
310 * (OUI). This avoids duplication with any addresses on the system that
311 * were generated from valid Scientific Atlanta-registered address by
312 * simply flipping the locally managed bit.
313 * 4. We aren't generating a multicast address, so we leave the multicast
314 * bit off. Since we aren't using a registered address, we have to set
315 * the locally managed bit.
316 * 5. We then randomly generate the remaining 16-bits. This does two
317 * things:
318 * a. It allows us to call this function for more than one device
319 * in this system
320 * b. It ensures that things will probably still work even if
321 * some device on the device network has a locally managed
322 * address that matches the top six bits from step 2.
323 */
324void platform_random_ether_addr(u8 addr[ETH_ALEN])
325{
326 const int num_random_bytes = 2;
327 const unsigned char non_sciatl_oui_bits = 0xc0u;
328 const unsigned char mac_addr_locally_managed = (1 << 1);
329
330 if (!have_rfmac) {
331 pr_warning("rfmac not available on command line; "
332 "generating random MAC address\n");
333 random_ether_addr(addr);
334 }
335
336 else {
337 int i;
338
339 /* Set the first byte to something that won't match a Scientific
340 * Atlanta OUI, is locally managed, and isn't a multicast
341 * address */
342 addr[0] = non_sciatl_oui_bits | mac_addr_locally_managed;
343
344 /* Get some bytes of random address information */
345 get_random_bytes(&addr[1], num_random_bytes);
346
347 /* Copy over the NIC-specific bits of the RF MAC address */
348 for (i = 1 + num_random_bytes; i < ETH_ALEN; i++)
349 addr[i] = rfmac[i];
350 }
351}
diff --git a/arch/mips/powertv/reset.c b/arch/mips/powertv/reset.c
new file mode 100644
index 000000000000..494c652c984b
--- /dev/null
+++ b/arch/mips/powertv/reset.c
@@ -0,0 +1,65 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */
19#include <linux/pm.h>
20
21#include <linux/io.h>
22#include <asm/reboot.h> /* Not included by linux/reboot.h */
23
24#ifdef CONFIG_BOOTLOADER_DRIVER
25#include <asm/mach-powertv/kbldr.h>
26#endif
27
28#include <asm/mach-powertv/asic_regs.h>
29#include "reset.h"
30
31static void mips_machine_restart(char *command);
32static void mips_machine_halt(void);
33
34static void mips_machine_restart(char *command)
35{
36#ifdef CONFIG_BOOTLOADER_DRIVER
37 /*
38 * Call the bootloader's reset function to ensure
39 * that persistent data is flushed before hard reset
40 */
41 kbldr_SetCauseAndReset();
42#else
43 writel(0x1, asic_reg_addr(watchdog));
44#endif
45}
46
47static void mips_machine_halt(void)
48{
49#ifdef CONFIG_BOOTLOADER_DRIVER
50 /*
51 * Call the bootloader's reset function to ensure
52 * that persistent data is flushed before hard reset
53 */
54 kbldr_SetCauseAndReset();
55#else
56 writel(0x1, asic_reg_addr(watchdog));
57#endif
58}
59
60void mips_reboot_setup(void)
61{
62 _machine_restart = mips_machine_restart;
63 _machine_halt = mips_machine_halt;
64 pm_power_off = mips_machine_halt;
65}
diff --git a/arch/mips/powertv/reset.h b/arch/mips/powertv/reset.h
new file mode 100644
index 000000000000..888fd09e2620
--- /dev/null
+++ b/arch/mips/powertv/reset.h
@@ -0,0 +1,26 @@
1/*
2 * Definitions from powertv reset.c file
3 *
4 * Copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: David VomLehn
21 */
22
23#ifndef _POWERTV_POWERTV_RESET_H
24#define _POWERTV_POWERTV_RESET_H
25extern void mips_reboot_setup(void);
26#endif
diff --git a/arch/mips/powertv/time.c b/arch/mips/powertv/time.c
new file mode 100644
index 000000000000..1e0a5ef4c8c7
--- /dev/null
+++ b/arch/mips/powertv/time.c
@@ -0,0 +1,37 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 * Setting up the clock on the MIPS boards.
20 */
21
22#include <linux/init.h>
23#include <asm/mach-powertv/interrupts.h>
24#include <asm/time.h>
25
26#include "powertv-clock.h"
27
28unsigned int __cpuinit get_c0_compare_int(void)
29{
30 return irq_mips_timer;
31}
32
33void __init plat_time_init(void)
34{
35 powertv_clocksource_init();
36 r4k_clockevent_init();
37}
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 14:43:12 -0400