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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-10 12:01:01 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-10 12:01:01 -0500
commit9e66645d72d3c395da92b0f8855c787f4b5f0e89 (patch)
tree61b94adb6c32340c45b6d984837556b6b845e983 /arch/mips
parentecb50f0afd35a51ef487e8a54b976052eb03d729 (diff)
parent74faaf7aa64c76b60db0f5c994fd43a46be772ce (diff)
Merge branch 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq domain updates from Thomas Gleixner: "The real interesting irq updates: - Support for hierarchical irq domains: For complex interrupt routing scenarios where more than one interrupt related chip is involved we had no proper representation in the generic interrupt infrastructure so far. That made people implement rather ugly constructs in their nested irq chip implementations. The main offenders are x86 and arm/gic. To distangle that mess we have now hierarchical irqdomains which seperate the various interrupt chips and connect them via the hierarchical domains. That keeps the domain specific details internal to the particular hierarchy level and removes the criss/cross referencing of chip internals. The resulting hierarchy for a complex x86 system will look like this: vector mapped: 74 msi-0 mapped: 2 dmar-ir-1 mapped: 69 ioapic-1 mapped: 4 ioapic-0 mapped: 20 pci-msi-2 mapped: 45 dmar-ir-0 mapped: 3 ioapic-2 mapped: 1 pci-msi-1 mapped: 2 htirq mapped: 0 Neither ioapic nor pci-msi know about the dmar interrupt remapping between themself and the vector domain. If interrupt remapping is disabled ioapic and pci-msi become direct childs of the vector domain. In hindsight we should have done that years ago, but in hindsight we always know better :) - Support for generic MSI interrupt domain handling We have more and more non PCI related MSI interrupts, so providing a generic infrastructure for this is better than having all affected architectures implementing their own private hacks. - Support for PCI-MSI interrupt domain handling, based on the generic MSI support. This part carries the pci/msi branch from Bjorn Helgaas pci tree to avoid a massive conflict. The PCI/MSI parts are acked by Bjorn. I have two more branches on top of this. The full conversion of x86 to hierarchical domains and a partial conversion of arm/gic" * 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits) genirq: Move irq_chip_write_msi_msg() helper to core PCI/MSI: Allow an msi_controller to be associated to an irq domain PCI/MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain PCI/MSI: Enhance core to support hierarchy irqdomain PCI/MSI: Move cached entry functions to irq core genirq: Provide default callbacks for msi_domain_ops genirq: Introduce msi_domain_alloc/free_irqs() asm-generic: Add msi.h genirq: Add generic msi irq domain support genirq: Introduce callback irq_chip.irq_write_msi_msg genirq: Work around __irq_set_handler vs stacked domains ordering issues irqdomain: Introduce helper function irq_domain_add_hierarchy() irqdomain: Implement a method to automatically call parent domains alloc/free genirq: Introduce helper irq_domain_set_info() to reduce duplicated code genirq: Split out flow handler typedefs into seperate header file genirq: Add IRQ_SET_MASK_OK_DONE to support stacked irqchip genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip genirq: Add more helper functions to support stacked irq_chip genirq: Introduce helper functions to support stacked irq_chip irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF ...
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/pci/msi-octeon.c2
-rw-r--r--arch/mips/pci/msi-xlp.c12
-rw-r--r--arch/mips/pci/pci-xlr.c2
3 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
index 63bbe07a1ccd..cffaaf4aae3c 100644
--- a/arch/mips/pci/msi-octeon.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -178,7 +178,7 @@ msi_irq_allocated:
178 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); 178 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
179 179
180 irq_set_msi_desc(irq, desc); 180 irq_set_msi_desc(irq, desc);
181 write_msi_msg(irq, &msg); 181 pci_write_msi_msg(irq, &msg);
182 return 0; 182 return 0;
183} 183}
184 184
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index f7ac3edda1b2..6a40f24c91b4 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -217,7 +217,7 @@ static void xlp_msix_mask_ack(struct irq_data *d)
217 217
218 msixvec = nlm_irq_msixvec(d->irq); 218 msixvec = nlm_irq_msixvec(d->irq);
219 link = nlm_irq_msixlink(msixvec); 219 link = nlm_irq_msixlink(msixvec);
220 mask_msi_irq(d); 220 pci_msi_mask_irq(d);
221 md = irq_data_get_irq_handler_data(d); 221 md = irq_data_get_irq_handler_data(d);
222 222
223 /* Ack MSI on bridge */ 223 /* Ack MSI on bridge */
@@ -239,10 +239,10 @@ static void xlp_msix_mask_ack(struct irq_data *d)
239 239
240static struct irq_chip xlp_msix_chip = { 240static struct irq_chip xlp_msix_chip = {
241 .name = "XLP-MSIX", 241 .name = "XLP-MSIX",
242 .irq_enable = unmask_msi_irq, 242 .irq_enable = pci_msi_unmask_irq,
243 .irq_disable = mask_msi_irq, 243 .irq_disable = pci_msi_mask_irq,
244 .irq_mask_ack = xlp_msix_mask_ack, 244 .irq_mask_ack = xlp_msix_mask_ack,
245 .irq_unmask = unmask_msi_irq, 245 .irq_unmask = pci_msi_unmask_irq,
246}; 246};
247 247
248void arch_teardown_msi_irq(unsigned int irq) 248void arch_teardown_msi_irq(unsigned int irq)
@@ -345,7 +345,7 @@ static int xlp_setup_msi(uint64_t lnkbase, int node, int link,
345 if (ret < 0) 345 if (ret < 0)
346 return ret; 346 return ret;
347 347
348 write_msi_msg(xirq, &msg); 348 pci_write_msi_msg(xirq, &msg);
349 return 0; 349 return 0;
350} 350}
351 351
@@ -446,7 +446,7 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link,
446 if (ret < 0) 446 if (ret < 0)
447 return ret; 447 return ret;
448 448
449 write_msi_msg(xirq, &msg); 449 pci_write_msi_msg(xirq, &msg);
450 return 0; 450 return 0;
451} 451}
452 452
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 0dde80332d3a..26d2dabef281 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -260,7 +260,7 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
260 if (ret < 0) 260 if (ret < 0)
261 return ret; 261 return ret;
262 262
263 write_msi_msg(irq, &msg); 263 pci_write_msi_msg(irq, &msg);
264 return 0; 264 return 0;
265} 265}
266#endif 266#endif