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authorDavid Daney <david.daney@cavium.com>2013-05-22 11:10:46 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-06-10 12:01:25 -0400
commit9ddebc46e70b434e485060f7c1b53c5b848a6c8c (patch)
tree3a0c3c6d29b223390cccac888a4411a4fa217ab1 /arch/mips
parent6e7582bf35b8a5a330fd08b398ae445bac86917a (diff)
MIPS: OCTEON: Rename Kconfig CAVIUM_OCTEON_REFERENCE_BOARD to CAVIUM_OCTEON_SOC
CAVIUM_OCTEON_SOC most place we used to use CPU_CAVIUM_OCTEON. This allows us to CPU_CAVIUM_OCTEON in places where we have no OCTEON SOC. Remove CAVIUM_OCTEON_SIMULATOR as it doesn't really do anything, we can get the same configuration with CAVIUM_OCTEON_SOC. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-ide@vger.kernel.org Cc: linux-edac@vger.kernel.org Cc: linux-i2c@vger.kernel.org Cc: netdev@vger.kernel.org Cc: spi-devel-general@lists.sourceforge.net Cc: devel@driverdev.osuosl.org Cc: linux-usb@vger.kernel.org Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com> Patchwork: https://patchwork.linux-mips.org/patch/5295/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig19
-rw-r--r--arch/mips/cavium-octeon/Kconfig6
-rw-r--r--arch/mips/cavium-octeon/Platform8
-rw-r--r--arch/mips/configs/cavium_octeon_defconfig2
-rw-r--r--arch/mips/pci/Makefile4
5 files changed, 14 insertions, 25 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7a58ab933b20..ade99730ef3b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -735,23 +735,8 @@ config WR_PPMC
735 This enables support for the Wind River MIPS32 4KC PPMC evaluation 735 This enables support for the Wind River MIPS32 4KC PPMC evaluation
736 board, which is based on GT64120 bridge chip. 736 board, which is based on GT64120 bridge chip.
737 737
738config CAVIUM_OCTEON_SIMULATOR 738config CAVIUM_OCTEON_SOC
739 bool "Cavium Networks Octeon Simulator" 739 bool "Cavium Networks Octeon SoC based boards"
740 select CEVT_R4K
741 select 64BIT_PHYS_ADDR
742 select DMA_COHERENT
743 select SYS_SUPPORTS_64BIT_KERNEL
744 select SYS_SUPPORTS_BIG_ENDIAN
745 select SYS_SUPPORTS_HOTPLUG_CPU
746 select SYS_HAS_CPU_CAVIUM_OCTEON
747 select HOLES_IN_ZONE
748 help
749 The Octeon simulator is software performance model of the Cavium
750 Octeon Processor. It supports simulating Octeon processors on x86
751 hardware.
752
753config CAVIUM_OCTEON_REFERENCE_BOARD
754 bool "Cavium Networks Octeon reference board"
755 select CEVT_R4K 740 select CEVT_R4K
756 select 64BIT_PHYS_ADDR 741 select 64BIT_PHYS_ADDR
757 select DMA_COHERENT 742 select DMA_COHERENT
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index 75a6df7fd265..a12444a5f1b5 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -10,6 +10,10 @@ config CAVIUM_CN63XXP1
10 non-CN63XXP1 hardware, so it is recommended to select "n" 10 non-CN63XXP1 hardware, so it is recommended to select "n"
11 unless it is known the workarounds are needed. 11 unless it is known the workarounds are needed.
12 12
13endif # CPU_CAVIUM_OCTEON
14
15if CAVIUM_OCTEON_SOC
16
13config CAVIUM_OCTEON_2ND_KERNEL 17config CAVIUM_OCTEON_2ND_KERNEL
14 bool "Build the kernel to be used as a 2nd kernel on the same chip" 18 bool "Build the kernel to be used as a 2nd kernel on the same chip"
15 default "n" 19 default "n"
@@ -103,4 +107,4 @@ config OCTEON_ILM
103 To compile this driver as a module, choose M here. The module 107 To compile this driver as a module, choose M here. The module
104 will be called octeon-ilm 108 will be called octeon-ilm
105 109
106endif # CPU_CAVIUM_OCTEON 110endif # CAVIUM_OCTEON_SOC
diff --git a/arch/mips/cavium-octeon/Platform b/arch/mips/cavium-octeon/Platform
index 1e43ccf1a792..8a301cb12d68 100644
--- a/arch/mips/cavium-octeon/Platform
+++ b/arch/mips/cavium-octeon/Platform
@@ -1,11 +1,11 @@
1# 1#
2# Cavium Octeon 2# Cavium Octeon
3# 3#
4platform-$(CONFIG_CPU_CAVIUM_OCTEON) += cavium-octeon/ 4platform-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon/
5cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += \ 5cflags-$(CONFIG_CAVIUM_OCTEON_SOC) += \
6 -I$(srctree)/arch/mips/include/asm/mach-cavium-octeon 6 -I$(srctree)/arch/mips/include/asm/mach-cavium-octeon
7ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL 7ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
8load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff84100000 8load-$(CONFIG_CAVIUM_OCTEON_SOC) += 0xffffffff84100000
9else 9else
10load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000 10load-$(CONFIG_CAVIUM_OCTEON_SOC) += 0xffffffff81100000
11endif 11endif
diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig
index 014ba4bbba7d..1888e5f4d598 100644
--- a/arch/mips/configs/cavium_octeon_defconfig
+++ b/arch/mips/configs/cavium_octeon_defconfig
@@ -1,4 +1,4 @@
1CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD=y 1CONFIG_CAVIUM_OCTEON_SOC=y
2CONFIG_CAVIUM_CN63XXP1=y 2CONFIG_CAVIUM_CN63XXP1=y
3CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2 3CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2
4CONFIG_SPARSEMEM_MANUAL=y 4CONFIG_SPARSEMEM_MANUAL=y
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 2cb1d315d225..fa3bcd233138 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -54,10 +54,10 @@ obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
54obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o 54obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
55obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o 55obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
56obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o 56obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
57obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o 57obj-$(CONFIG_CAVIUM_OCTEON_SOC) += pci-octeon.o pcie-octeon.o
58obj-$(CONFIG_CPU_XLR) += pci-xlr.o 58obj-$(CONFIG_CPU_XLR) += pci-xlr.o
59obj-$(CONFIG_CPU_XLP) += pci-xlp.o 59obj-$(CONFIG_CPU_XLP) += pci-xlp.o
60 60
61ifdef CONFIG_PCI_MSI 61ifdef CONFIG_PCI_MSI
62obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o 62obj-$(CONFIG_CAVIUM_OCTEON_SOC) += msi-octeon.o
63endif 63endif