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authorFelix Fietkau <nbd@openwrt.org>2013-09-27 08:41:44 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-01-22 14:43:10 -0500
commit885014bcf284cdfbe3428f2cfa3882edde5ff5fa (patch)
treecb0eeee346b51eb7af6c8cf8c49a046bb937f296 /arch/mips
parent5792bf6438658cb129c3022aa2cf7e9b19b5de3a (diff)
MIPS: improve checks for noncoherent DMA
Only one MIPS development board actually supports enabling/disabling DMA coherency at runtime, so it's not a good idea to push the overhead of checking that configuration setting onto every other supported target as well. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5912/
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig6
-rw-r--r--arch/mips/include/asm/dma-coherence.h9
-rw-r--r--arch/mips/include/asm/mach-generic/dma-coherence.h4
-rw-r--r--arch/mips/mm/dma-default.c2
4 files changed, 16 insertions, 5 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a7ec153be0b9..57a887334a65 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -301,7 +301,7 @@ config MIPS_MALTA
301 select CEVT_R4K 301 select CEVT_R4K
302 select CSRC_R4K 302 select CSRC_R4K
303 select CSRC_GIC 303 select CSRC_GIC
304 select DMA_NONCOHERENT 304 select DMA_MAYBE_COHERENT
305 select GENERIC_ISA_DMA 305 select GENERIC_ISA_DMA
306 select HAVE_PCSPKR_PLATFORM 306 select HAVE_PCSPKR_PLATFORM
307 select IRQ_CPU 307 select IRQ_CPU
@@ -893,6 +893,10 @@ config FW_CFE
893config ARCH_DMA_ADDR_T_64BIT 893config ARCH_DMA_ADDR_T_64BIT
894 def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 894 def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
895 895
896config DMA_MAYBE_COHERENT
897 select DMA_NONCOHERENT
898 bool
899
896config DMA_COHERENT 900config DMA_COHERENT
897 bool 901 bool
898 902
diff --git a/arch/mips/include/asm/dma-coherence.h b/arch/mips/include/asm/dma-coherence.h
index 242cbb3ca582..bc5e85d579e6 100644
--- a/arch/mips/include/asm/dma-coherence.h
+++ b/arch/mips/include/asm/dma-coherence.h
@@ -9,7 +9,16 @@
9#ifndef __ASM_DMA_COHERENCE_H 9#ifndef __ASM_DMA_COHERENCE_H
10#define __ASM_DMA_COHERENCE_H 10#define __ASM_DMA_COHERENCE_H
11 11
12#ifdef CONFIG_DMA_MAYBE_COHERENT
12extern int coherentio; 13extern int coherentio;
13extern int hw_coherentio; 14extern int hw_coherentio;
15#else
16#ifdef CONFIG_DMA_COHERENT
17#define coherentio 1
18#else
19#define coherentio 0
20#endif
21#define hw_coherentio 0
22#endif /* CONFIG_DMA_MAYBE_COHERENT */
14 23
15#endif 24#endif
diff --git a/arch/mips/include/asm/mach-generic/dma-coherence.h b/arch/mips/include/asm/mach-generic/dma-coherence.h
index a9e8f6b62b0b..7629c35986f7 100644
--- a/arch/mips/include/asm/mach-generic/dma-coherence.h
+++ b/arch/mips/include/asm/mach-generic/dma-coherence.h
@@ -49,11 +49,7 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
49 49
50static inline int plat_device_is_coherent(struct device *dev) 50static inline int plat_device_is_coherent(struct device *dev)
51{ 51{
52#ifdef CONFIG_DMA_COHERENT
53 return 1;
54#else
55 return coherentio; 52 return coherentio;
56#endif
57} 53}
58 54
59#ifdef CONFIG_SWIOTLB 55#ifdef CONFIG_SWIOTLB
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 2e9418562258..44b6dff5aba2 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -23,6 +23,7 @@
23 23
24#include <dma-coherence.h> 24#include <dma-coherence.h>
25 25
26#ifdef CONFIG_DMA_MAYBE_COHERENT
26int coherentio = 0; /* User defined DMA coherency from command line. */ 27int coherentio = 0; /* User defined DMA coherency from command line. */
27EXPORT_SYMBOL_GPL(coherentio); 28EXPORT_SYMBOL_GPL(coherentio);
28int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */ 29int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
@@ -42,6 +43,7 @@ static int __init setnocoherentio(char *str)
42 return 0; 43 return 0;
43} 44}
44early_param("nocoherentio", setnocoherentio); 45early_param("nocoherentio", setnocoherentio);
46#endif
45 47
46static inline struct page *dma_addr_to_page(struct device *dev, 48static inline struct page *dma_addr_to_page(struct device *dev,
47 dma_addr_t dma_addr) 49 dma_addr_t dma_addr)