diff options
author | Markos Chandras <markos.chandras@imgtec.com> | 2014-06-23 05:38:45 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-06-26 05:48:19 -0400 |
commit | 7682f9e81899f1f874bd565daa7fb0b20024ed80 (patch) | |
tree | 836541e400ac7d0fc928c22cb2f785a3f62dc2ec /arch/mips | |
parent | 9d9873697e8b5aaf39ef1f96e57ab4fffb8f45ae (diff) |
MIPS: uasm: Add SLT uasm instruction
It will be used later on by bpf-jit
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/7120/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/include/asm/uasm.h | 1 | ||||
-rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 1 | ||||
-rw-r--r-- | arch/mips/mm/uasm-micromips.c | 1 | ||||
-rw-r--r-- | arch/mips/mm/uasm-mips.c | 1 | ||||
-rw-r--r-- | arch/mips/mm/uasm.c | 3 |
5 files changed, 6 insertions, 1 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h index 43259b3fca6d..708c5d414905 100644 --- a/arch/mips/include/asm/uasm.h +++ b/arch/mips/include/asm/uasm.h | |||
@@ -150,6 +150,7 @@ Ip_u2s3u1(_scd); | |||
150 | Ip_u2s3u1(_sd); | 150 | Ip_u2s3u1(_sd); |
151 | Ip_u2u1u3(_sll); | 151 | Ip_u2u1u3(_sll); |
152 | Ip_u3u2u1(_sllv); | 152 | Ip_u3u2u1(_sllv); |
153 | Ip_s3s1s2(_slt); | ||
153 | Ip_u2u1s3(_sltiu); | 154 | Ip_u2u1s3(_sltiu); |
154 | Ip_u3u1u2(_sltu); | 155 | Ip_u3u1u2(_sltu); |
155 | Ip_u2u1u3(_sra); | 156 | Ip_u2u1u3(_sra); |
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index 4b7160259292..4bfdb9d4c186 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h | |||
@@ -273,6 +273,7 @@ enum mm_32a_minor_op { | |||
273 | mm_and_op = 0x250, | 273 | mm_and_op = 0x250, |
274 | mm_or32_op = 0x290, | 274 | mm_or32_op = 0x290, |
275 | mm_xor32_op = 0x310, | 275 | mm_xor32_op = 0x310, |
276 | mm_slt_op = 0x350, | ||
276 | mm_sltu_op = 0x390, | 277 | mm_sltu_op = 0x390, |
277 | }; | 278 | }; |
278 | 279 | ||
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c index 775c2800cba2..8399ddf03a02 100644 --- a/arch/mips/mm/uasm-micromips.c +++ b/arch/mips/mm/uasm-micromips.c | |||
@@ -102,6 +102,7 @@ static struct insn insn_table_MM[] = { | |||
102 | { insn_sd, 0, 0 }, | 102 | { insn_sd, 0, 0 }, |
103 | { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD }, | 103 | { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD }, |
104 | { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD }, | 104 | { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD }, |
105 | { insn_slt, M(mm_pool32a_op, 0, 0, 0, 0, mm_slt_op), RT | RS | RD }, | ||
105 | { insn_sltiu, M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, | 106 | { insn_sltiu, M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, |
106 | { insn_sltu, M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD }, | 107 | { insn_sltu, M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD }, |
107 | { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD }, | 108 | { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD }, |
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c index 38792c2364f5..4535a9d19ea5 100644 --- a/arch/mips/mm/uasm-mips.c +++ b/arch/mips/mm/uasm-mips.c | |||
@@ -110,6 +110,7 @@ static struct insn insn_table[] = { | |||
110 | { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, | 110 | { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, |
111 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, | 111 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, |
112 | { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, | 112 | { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, |
113 | { insn_slt, M(spec_op, 0, 0, 0, 0, slt_op), RS | RT | RD }, | ||
113 | { insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, | 114 | { insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, |
114 | { insn_sltu, M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD }, | 115 | { insn_sltu, M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD }, |
115 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, | 116 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, |
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index 1e3e10919423..a01b0d6cedd2 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c | |||
@@ -53,7 +53,7 @@ enum opcode { | |||
53 | insn_ld, insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw, | 53 | insn_ld, insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw, |
54 | insn_lwx, insn_mfc0, insn_mfhi, insn_mflo, insn_mtc0, insn_mul, | 54 | insn_lwx, insn_mfc0, insn_mfhi, insn_mflo, insn_mtc0, insn_mul, |
55 | insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, | 55 | insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, |
56 | insn_sd, insn_sll, insn_sllv, insn_sltiu, insn_sltu, insn_sra, | 56 | insn_sd, insn_sll, insn_sllv, insn_slt, insn_sltiu, insn_sltu, insn_sra, |
57 | insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, | 57 | insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, |
58 | insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh, | 58 | insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh, |
59 | insn_xor, insn_xori, insn_yield, | 59 | insn_xor, insn_xori, insn_yield, |
@@ -296,6 +296,7 @@ I_u2s3u1(_scd) | |||
296 | I_u2s3u1(_sd) | 296 | I_u2s3u1(_sd) |
297 | I_u2u1u3(_sll) | 297 | I_u2u1u3(_sll) |
298 | I_u3u2u1(_sllv) | 298 | I_u3u2u1(_sllv) |
299 | I_s3s1s2(_slt) | ||
299 | I_u2u1s3(_sltiu) | 300 | I_u2u1s3(_sltiu) |
300 | I_u3u1u2(_sltu) | 301 | I_u3u1u2(_sltu) |
301 | I_u2u1u3(_sra) | 302 | I_u2u1u3(_sra) |