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authorRalf Baechle <ralf@linux-mips.org>2007-07-09 11:29:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 12:33:05 -0400
commit688b3d720820a9e3e2e9d5882be64a28f649e206 (patch)
tree7181045ae55f69966e8237439a215242e9714ff4 /arch/mips
parentc99cabf034d42c9e4a9c1ed9dfd26411b2fb9b57 (diff)
[MIPS] Delete Ocelot 3 support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig25
-rw-r--r--arch/mips/Makefile7
-rw-r--r--arch/mips/configs/atlas_defconfig1
-rw-r--r--arch/mips/configs/bigsur_defconfig1
-rw-r--r--arch/mips/configs/capcella_defconfig1
-rw-r--r--arch/mips/configs/cobalt_defconfig1
-rw-r--r--arch/mips/configs/db1000_defconfig1
-rw-r--r--arch/mips/configs/db1100_defconfig1
-rw-r--r--arch/mips/configs/db1200_defconfig1
-rw-r--r--arch/mips/configs/db1500_defconfig1
-rw-r--r--arch/mips/configs/db1550_defconfig1
-rw-r--r--arch/mips/configs/ddb5477_defconfig1
-rw-r--r--arch/mips/configs/decstation_defconfig1
-rw-r--r--arch/mips/configs/e55_defconfig1
-rw-r--r--arch/mips/configs/emma2rh_defconfig1
-rw-r--r--arch/mips/configs/excite_defconfig1
-rw-r--r--arch/mips/configs/fulong_defconfig1
-rw-r--r--arch/mips/configs/ip22_defconfig1
-rw-r--r--arch/mips/configs/ip27_defconfig1
-rw-r--r--arch/mips/configs/ip32_defconfig1
-rw-r--r--arch/mips/configs/jazz_defconfig1
-rw-r--r--arch/mips/configs/jmr3927_defconfig1
-rw-r--r--arch/mips/configs/malta_defconfig1
-rw-r--r--arch/mips/configs/mipssim_defconfig1
-rw-r--r--arch/mips/configs/mpc30x_defconfig1
-rw-r--r--arch/mips/configs/msp71xx_defconfig1
-rw-r--r--arch/mips/configs/ocelot_3_defconfig1280
-rw-r--r--arch/mips/configs/ocelot_defconfig1
-rw-r--r--arch/mips/configs/pb1100_defconfig1
-rw-r--r--arch/mips/configs/pb1500_defconfig1
-rw-r--r--arch/mips/configs/pb1550_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-jbs_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-stb810_defconfig1
-rw-r--r--arch/mips/configs/qemu_defconfig1
-rw-r--r--arch/mips/configs/rbhma4200_defconfig1
-rw-r--r--arch/mips/configs/rbhma4500_defconfig1
-rw-r--r--arch/mips/configs/rm200_defconfig1
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig1
-rw-r--r--arch/mips/configs/sead_defconfig1
-rw-r--r--arch/mips/configs/tb0219_defconfig1
-rw-r--r--arch/mips/configs/tb0226_defconfig1
-rw-r--r--arch/mips/configs/tb0287_defconfig1
-rw-r--r--arch/mips/configs/workpad_defconfig1
-rw-r--r--arch/mips/configs/wrppmc_defconfig1
-rw-r--r--arch/mips/configs/yosemite_defconfig1
-rw-r--r--arch/mips/defconfig1
-rw-r--r--arch/mips/kernel/Makefile1
-rw-r--r--arch/mips/kernel/irq-mv6434x.c111
-rw-r--r--arch/mips/momentum/ocelot_3/Makefile8
-rw-r--r--arch/mips/momentum/ocelot_3/irq.c109
-rw-r--r--arch/mips/momentum/ocelot_3/ocelot_3_fpga.h59
-rw-r--r--arch/mips/momentum/ocelot_3/platform.c252
-rw-r--r--arch/mips/momentum/ocelot_3/prom.c189
-rw-r--r--arch/mips/momentum/ocelot_3/reset.c59
-rw-r--r--arch/mips/momentum/ocelot_3/setup.c398
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-ocelot3.c41
-rw-r--r--arch/mips/pci/ops-marvell.c93
58 files changed, 0 insertions, 2677 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 1619cf2c9ff0..a00fabe2e4e0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -266,25 +266,6 @@ config MOMENCO_OCELOT
266 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 266 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
267 Momentum Computer <http://www.momenco.com/>. 267 Momentum Computer <http://www.momenco.com/>.
268 268
269config MOMENCO_OCELOT_3
270 bool "Momentum Ocelot-3 board"
271 select BOOT_ELF32
272 select DMA_NONCOHERENT
273 select HW_HAS_PCI
274 select IRQ_CPU
275 select IRQ_CPU_RM7K
276 select IRQ_MV64340
277 select PCI_MARVELL
278 select RM7000_CPU_SCACHE
279 select SWAP_IO_SPACE
280 select SYS_HAS_CPU_RM9000
281 select SYS_SUPPORTS_32BIT_KERNEL
282 select SYS_SUPPORTS_64BIT_KERNEL
283 select SYS_SUPPORTS_BIG_ENDIAN
284 help
285 The Ocelot-3 is based off Discovery III System Controller and
286 PMC-Sierra Rm79000 core.
287
288config PNX8550_JBS 269config PNX8550_JBS
289 bool "Philips PNX8550 based JBS board" 270 bool "Philips PNX8550 based JBS board"
290 select PNX8550 271 select PNX8550
@@ -826,9 +807,6 @@ config IRQ_MSP_SLP
826config IRQ_MSP_CIC 807config IRQ_MSP_CIC
827 bool 808 bool
828 809
829config IRQ_MV64340
830 bool
831
832config DDB5XXX_COMMON 810config DDB5XXX_COMMON
833 bool 811 bool
834 select SYS_SUPPORTS_KGDB 812 select SYS_SUPPORTS_KGDB
@@ -850,9 +828,6 @@ config MIPS_RM9122
850 bool 828 bool
851 select SERIAL_RM9000 829 select SERIAL_RM9000
852 830
853config PCI_MARVELL
854 bool
855
856config PNX8550 831config PNX8550
857 bool 832 bool
858 select SOC_PNX8550 833 select SOC_PNX8550
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 0c270b6ee24c..20d19c9b7761 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -365,13 +365,6 @@ cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
365load-$(CONFIG_QEMU) += 0xffffffff80010000 365load-$(CONFIG_QEMU) += 0xffffffff80010000
366 366
367# 367#
368# Momentum Ocelot-3
369#
370core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
371cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
372load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
373
374#
375# Basler eXcite 368# Basler eXcite
376# 369#
377core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/ 370core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index 6480571de944..129e2c961fec 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -33,7 +33,6 @@ CONFIG_MIPS_ATLAS=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 9c75795cba08..dc3e1bf4e42e 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index 0152730fb4d1..4c7031222e64 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 521311ad9528..c8c05785a86d 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -19,7 +19,6 @@ CONFIG_MIPS_COBALT=y
19# CONFIG_WR_PPMC is not set 19# CONFIG_WR_PPMC is not set
20# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
21# CONFIG_MOMENCO_OCELOT is not set 21# CONFIG_MOMENCO_OCELOT is not set
22# CONFIG_MOMENCO_OCELOT_3 is not set
23# CONFIG_PNX8550_JBS is not set 22# CONFIG_PNX8550_JBS is not set
24# CONFIG_PNX8550_STB810 is not set 23# CONFIG_PNX8550_STB810 is not set
25# CONFIG_DDB5477 is not set 24# CONFIG_DDB5477 is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index f3b0bc7abb56..ec60beb888b2 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_DB1000=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index b9ebb301a523..f3c25f08bfad 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_DB1100=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index cfebcca2f938..6d400befbacc 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_DB1200=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index 213ef385ff09..82aea6e08823 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_DB1500=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index aa40611fb00b..82697714a9e3 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_DB1550=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index 1f4acce27659..a42ab9ae7d4b 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index a08b99a0379d..d6e3fffbc80d 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -33,7 +33,6 @@ CONFIG_MACH_DECSTATION=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 938da2d7b19d..78f5004fb721 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig
index dab9aba49487..b29bff0f56c3 100644
--- a/arch/mips/configs/emma2rh_defconfig
+++ b/arch/mips/configs/emma2rh_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig
index a828c04d1afe..69810592aa6b 100644
--- a/arch/mips/configs/excite_defconfig
+++ b/arch/mips/configs/excite_defconfig
@@ -34,7 +34,6 @@ CONFIG_BASLER_EXCITE=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/fulong_defconfig b/arch/mips/configs/fulong_defconfig
index f15559fa578d..6ab94d8cf08b 100644
--- a/arch/mips/configs/fulong_defconfig
+++ b/arch/mips/configs/fulong_defconfig
@@ -20,7 +20,6 @@ CONFIG_LEMOTE_FULONG=y
20# CONFIG_WR_PPMC is not set 20# CONFIG_WR_PPMC is not set
21# CONFIG_MIPS_SIM is not set 21# CONFIG_MIPS_SIM is not set
22# CONFIG_MOMENCO_OCELOT is not set 22# CONFIG_MOMENCO_OCELOT is not set
23# CONFIG_MOMENCO_OCELOT_3 is not set
24# CONFIG_PNX8550_JBS is not set 23# CONFIG_PNX8550_JBS is not set
25# CONFIG_PNX8550_STB810 is not set 24# CONFIG_PNX8550_STB810 is not set
26# CONFIG_DDB5477 is not set 25# CONFIG_DDB5477 is not set
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index cc0530ef33f2..405c9f505a77 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 482f2fa120df..a9dcbcf563cb 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index f9f58d0906ba..a040459bec11 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig
index bc4e30fe4e22..dd04eece9fd3 100644
--- a/arch/mips/configs/jazz_defconfig
+++ b/arch/mips/configs/jazz_defconfig
@@ -33,7 +33,6 @@ CONFIG_MACH_JAZZ=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index baa1736c21cd..9a25e770abd8 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index d8ee7c28c83b..546cb243fd09 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -33,7 +33,6 @@ CONFIG_MIPS_MALTA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index fc8a42477840..bc3246b2c808 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33CONFIG_MIPS_SIM=y 33CONFIG_MIPS_SIM=y
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 2da27ece70c7..4981ce425d82 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig
index cb2aeb20721e..adca5f7ba533 100644
--- a/arch/mips/configs/msp71xx_defconfig
+++ b/arch/mips/configs/msp71xx_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
deleted file mode 100644
index 20946b8141a3..000000000000
--- a/arch/mips/configs/ocelot_3_defconfig
+++ /dev/null
@@ -1,1280 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20
4# Tue Feb 20 21:47:35 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11CONFIG_ZONE_DMA=y
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set
26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set
36CONFIG_MOMENCO_OCELOT_3=y
37# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set
40# CONFIG_PNX8550_STB810 is not set
41# CONFIG_DDB5477 is not set
42# CONFIG_MACH_VR41XX is not set
43# CONFIG_PMC_YOSEMITE is not set
44# CONFIG_QEMU is not set
45# CONFIG_MARKEINS is not set
46# CONFIG_SGI_IP22 is not set
47# CONFIG_SGI_IP27 is not set
48# CONFIG_SGI_IP32 is not set
49# CONFIG_SIBYTE_BIGSUR is not set
50# CONFIG_SIBYTE_SWARM is not set
51# CONFIG_SIBYTE_SENTOSA is not set
52# CONFIG_SIBYTE_RHONE is not set
53# CONFIG_SIBYTE_CARMEL is not set
54# CONFIG_SIBYTE_PTSWARM is not set
55# CONFIG_SIBYTE_LITTLESUR is not set
56# CONFIG_SIBYTE_CRHINE is not set
57# CONFIG_SIBYTE_CRHONE is not set
58# CONFIG_SNI_RM is not set
59# CONFIG_TOSHIBA_JMR3927 is not set
60# CONFIG_TOSHIBA_RBTX4927 is not set
61# CONFIG_TOSHIBA_RBTX4938 is not set
62CONFIG_RWSEM_GENERIC_SPINLOCK=y
63# CONFIG_ARCH_HAS_ILOG2_U32 is not set
64# CONFIG_ARCH_HAS_ILOG2_U64 is not set
65CONFIG_GENERIC_FIND_NEXT_BIT=y
66CONFIG_GENERIC_HWEIGHT=y
67CONFIG_GENERIC_CALIBRATE_DELAY=y
68CONFIG_GENERIC_TIME=y
69CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
70# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
71CONFIG_DMA_NONCOHERENT=y
72CONFIG_DMA_NEED_PCI_MAP_STATE=y
73CONFIG_CPU_BIG_ENDIAN=y
74# CONFIG_CPU_LITTLE_ENDIAN is not set
75CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
76CONFIG_IRQ_CPU=y
77CONFIG_IRQ_CPU_RM7K=y
78CONFIG_IRQ_MV64340=y
79CONFIG_PCI_MARVELL=y
80CONFIG_SWAP_IO_SPACE=y
81CONFIG_BOOT_ELF32=y
82CONFIG_MIPS_L1_CACHE_SHIFT=5
83
84#
85# CPU selection
86#
87# CONFIG_CPU_MIPS32_R1 is not set
88# CONFIG_CPU_MIPS32_R2 is not set
89# CONFIG_CPU_MIPS64_R1 is not set
90# CONFIG_CPU_MIPS64_R2 is not set
91# CONFIG_CPU_R3000 is not set
92# CONFIG_CPU_TX39XX is not set
93# CONFIG_CPU_VR41XX is not set
94# CONFIG_CPU_R4300 is not set
95# CONFIG_CPU_R4X00 is not set
96# CONFIG_CPU_TX49XX is not set
97# CONFIG_CPU_R5000 is not set
98# CONFIG_CPU_R5432 is not set
99# CONFIG_CPU_R6000 is not set
100# CONFIG_CPU_NEVADA is not set
101# CONFIG_CPU_R8000 is not set
102# CONFIG_CPU_R10000 is not set
103# CONFIG_CPU_RM7000 is not set
104CONFIG_CPU_RM9000=y
105# CONFIG_CPU_SB1 is not set
106CONFIG_SYS_HAS_CPU_RM9000=y
107CONFIG_WEAK_ORDERING=y
108CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
109CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
110CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
111CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
112
113#
114# Kernel type
115#
116CONFIG_32BIT=y
117# CONFIG_64BIT is not set
118CONFIG_PAGE_SIZE_4KB=y
119# CONFIG_PAGE_SIZE_8KB is not set
120# CONFIG_PAGE_SIZE_16KB is not set
121# CONFIG_PAGE_SIZE_64KB is not set
122CONFIG_BOARD_SCACHE=y
123CONFIG_RM7000_CPU_SCACHE=y
124CONFIG_CPU_HAS_PREFETCH=y
125CONFIG_MIPS_MT_DISABLED=y
126# CONFIG_MIPS_MT_SMP is not set
127# CONFIG_MIPS_MT_SMTC is not set
128# CONFIG_MIPS_VPE_LOADER is not set
129# CONFIG_64BIT_PHYS_ADDR is not set
130CONFIG_CPU_HAS_LLSC=y
131CONFIG_CPU_HAS_SYNC=y
132CONFIG_GENERIC_HARDIRQS=y
133CONFIG_GENERIC_IRQ_PROBE=y
134CONFIG_CPU_SUPPORTS_HIGHMEM=y
135CONFIG_ARCH_FLATMEM_ENABLE=y
136CONFIG_SELECT_MEMORY_MODEL=y
137CONFIG_FLATMEM_MANUAL=y
138# CONFIG_DISCONTIGMEM_MANUAL is not set
139# CONFIG_SPARSEMEM_MANUAL is not set
140CONFIG_FLATMEM=y
141CONFIG_FLAT_NODE_MEM_MAP=y
142# CONFIG_SPARSEMEM_STATIC is not set
143CONFIG_SPLIT_PTLOCK_CPUS=4
144# CONFIG_RESOURCES_64BIT is not set
145CONFIG_ZONE_DMA_FLAG=1
146# CONFIG_HZ_48 is not set
147# CONFIG_HZ_100 is not set
148# CONFIG_HZ_128 is not set
149# CONFIG_HZ_250 is not set
150# CONFIG_HZ_256 is not set
151CONFIG_HZ_1000=y
152# CONFIG_HZ_1024 is not set
153CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
154CONFIG_HZ=1000
155CONFIG_PREEMPT_NONE=y
156# CONFIG_PREEMPT_VOLUNTARY is not set
157# CONFIG_PREEMPT is not set
158# CONFIG_KEXEC is not set
159CONFIG_LOCKDEP_SUPPORT=y
160CONFIG_STACKTRACE_SUPPORT=y
161CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
162
163#
164# Code maturity level options
165#
166CONFIG_EXPERIMENTAL=y
167CONFIG_BROKEN_ON_SMP=y
168CONFIG_INIT_ENV_ARG_LIMIT=32
169
170#
171# General setup
172#
173CONFIG_LOCALVERSION=""
174CONFIG_LOCALVERSION_AUTO=y
175CONFIG_SWAP=y
176CONFIG_SYSVIPC=y
177# CONFIG_IPC_NS is not set
178CONFIG_SYSVIPC_SYSCTL=y
179# CONFIG_POSIX_MQUEUE is not set
180# CONFIG_BSD_PROCESS_ACCT is not set
181# CONFIG_TASKSTATS is not set
182# CONFIG_UTS_NS is not set
183# CONFIG_AUDIT is not set
184CONFIG_IKCONFIG=y
185CONFIG_IKCONFIG_PROC=y
186CONFIG_SYSFS_DEPRECATED=y
187CONFIG_RELAY=y
188# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
189CONFIG_SYSCTL=y
190CONFIG_EMBEDDED=y
191CONFIG_SYSCTL_SYSCALL=y
192CONFIG_KALLSYMS=y
193# CONFIG_KALLSYMS_EXTRA_PASS is not set
194CONFIG_HOTPLUG=y
195CONFIG_PRINTK=y
196CONFIG_BUG=y
197CONFIG_ELF_CORE=y
198CONFIG_BASE_FULL=y
199CONFIG_FUTEX=y
200CONFIG_EPOLL=y
201CONFIG_SHMEM=y
202CONFIG_SLAB=y
203CONFIG_VM_EVENT_COUNTERS=y
204CONFIG_RT_MUTEXES=y
205# CONFIG_TINY_SHMEM is not set
206CONFIG_BASE_SMALL=0
207# CONFIG_SLOB is not set
208
209#
210# Loadable module support
211#
212CONFIG_MODULES=y
213CONFIG_MODULE_UNLOAD=y
214# CONFIG_MODULE_FORCE_UNLOAD is not set
215CONFIG_MODVERSIONS=y
216# CONFIG_MODULE_SRCVERSION_ALL is not set
217CONFIG_KMOD=y
218
219#
220# Block layer
221#
222CONFIG_BLOCK=y
223# CONFIG_LBD is not set
224# CONFIG_BLK_DEV_IO_TRACE is not set
225# CONFIG_LSF is not set
226
227#
228# IO Schedulers
229#
230CONFIG_IOSCHED_NOOP=y
231CONFIG_IOSCHED_AS=y
232CONFIG_IOSCHED_DEADLINE=y
233CONFIG_IOSCHED_CFQ=y
234CONFIG_DEFAULT_AS=y
235# CONFIG_DEFAULT_DEADLINE is not set
236# CONFIG_DEFAULT_CFQ is not set
237# CONFIG_DEFAULT_NOOP is not set
238CONFIG_DEFAULT_IOSCHED="anticipatory"
239
240#
241# Bus options (PCI, PCMCIA, EISA, ISA, TC)
242#
243CONFIG_HW_HAS_PCI=y
244CONFIG_PCI=y
245CONFIG_MMU=y
246
247#
248# PCCARD (PCMCIA/CardBus) support
249#
250# CONFIG_PCCARD is not set
251
252#
253# PCI Hotplug Support
254#
255# CONFIG_HOTPLUG_PCI is not set
256
257#
258# Executable file formats
259#
260CONFIG_BINFMT_ELF=y
261# CONFIG_BINFMT_MISC is not set
262CONFIG_TRAD_SIGNALS=y
263
264#
265# Power management options
266#
267CONFIG_PM=y
268# CONFIG_PM_LEGACY is not set
269# CONFIG_PM_DEBUG is not set
270# CONFIG_PM_SYSFS_DEPRECATED is not set
271
272#
273# Networking
274#
275CONFIG_NET=y
276
277#
278# Networking options
279#
280# CONFIG_NETDEBUG is not set
281CONFIG_PACKET=y
282# CONFIG_PACKET_MMAP is not set
283CONFIG_UNIX=y
284CONFIG_XFRM=y
285# CONFIG_XFRM_USER is not set
286# CONFIG_XFRM_SUB_POLICY is not set
287CONFIG_XFRM_MIGRATE=y
288CONFIG_NET_KEY=y
289CONFIG_NET_KEY_MIGRATE=y
290CONFIG_INET=y
291# CONFIG_IP_MULTICAST is not set
292# CONFIG_IP_ADVANCED_ROUTER is not set
293CONFIG_IP_FIB_HASH=y
294CONFIG_IP_PNP=y
295CONFIG_IP_PNP_DHCP=y
296CONFIG_IP_PNP_BOOTP=y
297# CONFIG_IP_PNP_RARP is not set
298# CONFIG_NET_IPIP is not set
299# CONFIG_NET_IPGRE is not set
300# CONFIG_ARPD is not set
301# CONFIG_SYN_COOKIES is not set
302# CONFIG_INET_AH is not set
303# CONFIG_INET_ESP is not set
304# CONFIG_INET_IPCOMP is not set
305# CONFIG_INET_XFRM_TUNNEL is not set
306CONFIG_INET_TUNNEL=m
307CONFIG_INET_XFRM_MODE_TRANSPORT=m
308CONFIG_INET_XFRM_MODE_TUNNEL=m
309CONFIG_INET_XFRM_MODE_BEET=m
310CONFIG_INET_DIAG=y
311CONFIG_INET_TCP_DIAG=y
312# CONFIG_TCP_CONG_ADVANCED is not set
313CONFIG_TCP_CONG_CUBIC=y
314CONFIG_DEFAULT_TCP_CONG="cubic"
315CONFIG_TCP_MD5SIG=y
316
317#
318# IP: Virtual Server Configuration
319#
320# CONFIG_IP_VS is not set
321CONFIG_IPV6=m
322# CONFIG_IPV6_PRIVACY is not set
323CONFIG_IPV6_ROUTER_PREF=y
324CONFIG_IPV6_ROUTE_INFO=y
325# CONFIG_INET6_AH is not set
326# CONFIG_INET6_ESP is not set
327# CONFIG_INET6_IPCOMP is not set
328CONFIG_IPV6_MIP6=y
329# CONFIG_INET6_XFRM_TUNNEL is not set
330# CONFIG_INET6_TUNNEL is not set
331CONFIG_INET6_XFRM_MODE_TRANSPORT=m
332CONFIG_INET6_XFRM_MODE_TUNNEL=m
333CONFIG_INET6_XFRM_MODE_BEET=m
334CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
335CONFIG_IPV6_SIT=m
336# CONFIG_IPV6_TUNNEL is not set
337CONFIG_IPV6_MULTIPLE_TABLES=y
338CONFIG_IPV6_SUBTREES=y
339CONFIG_NETWORK_SECMARK=y
340CONFIG_NETFILTER=y
341# CONFIG_NETFILTER_DEBUG is not set
342
343#
344# Core Netfilter Configuration
345#
346CONFIG_NETFILTER_NETLINK=m
347CONFIG_NETFILTER_NETLINK_QUEUE=m
348CONFIG_NETFILTER_NETLINK_LOG=m
349CONFIG_NF_CONNTRACK_ENABLED=m
350CONFIG_NF_CONNTRACK_SUPPORT=y
351# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set
352CONFIG_NF_CONNTRACK=m
353CONFIG_NF_CT_ACCT=y
354CONFIG_NF_CONNTRACK_MARK=y
355CONFIG_NF_CONNTRACK_SECMARK=y
356CONFIG_NF_CONNTRACK_EVENTS=y
357CONFIG_NF_CT_PROTO_GRE=m
358CONFIG_NF_CT_PROTO_SCTP=m
359CONFIG_NF_CONNTRACK_AMANDA=m
360CONFIG_NF_CONNTRACK_FTP=m
361CONFIG_NF_CONNTRACK_H323=m
362CONFIG_NF_CONNTRACK_IRC=m
363# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
364CONFIG_NF_CONNTRACK_PPTP=m
365CONFIG_NF_CONNTRACK_SANE=m
366CONFIG_NF_CONNTRACK_SIP=m
367CONFIG_NF_CONNTRACK_TFTP=m
368CONFIG_NF_CT_NETLINK=m
369CONFIG_NETFILTER_XTABLES=m
370CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
371CONFIG_NETFILTER_XT_TARGET_MARK=m
372CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
373CONFIG_NETFILTER_XT_TARGET_NFLOG=m
374CONFIG_NETFILTER_XT_TARGET_SECMARK=m
375CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
376CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
377CONFIG_NETFILTER_XT_MATCH_COMMENT=m
378CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
379CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
380CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
381CONFIG_NETFILTER_XT_MATCH_DCCP=m
382CONFIG_NETFILTER_XT_MATCH_DSCP=m
383CONFIG_NETFILTER_XT_MATCH_ESP=m
384CONFIG_NETFILTER_XT_MATCH_HELPER=m
385CONFIG_NETFILTER_XT_MATCH_LENGTH=m
386CONFIG_NETFILTER_XT_MATCH_LIMIT=m
387CONFIG_NETFILTER_XT_MATCH_MAC=m
388CONFIG_NETFILTER_XT_MATCH_MARK=m
389CONFIG_NETFILTER_XT_MATCH_POLICY=m
390CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
391CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
392CONFIG_NETFILTER_XT_MATCH_QUOTA=m
393CONFIG_NETFILTER_XT_MATCH_REALM=m
394CONFIG_NETFILTER_XT_MATCH_SCTP=m
395CONFIG_NETFILTER_XT_MATCH_STATE=m
396CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
397CONFIG_NETFILTER_XT_MATCH_STRING=m
398CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
399CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
400
401#
402# IP: Netfilter Configuration
403#
404CONFIG_NF_CONNTRACK_IPV4=m
405CONFIG_NF_CONNTRACK_PROC_COMPAT=y
406# CONFIG_IP_NF_QUEUE is not set
407# CONFIG_IP_NF_IPTABLES is not set
408# CONFIG_IP_NF_ARPTABLES is not set
409
410#
411# IPv6: Netfilter Configuration (EXPERIMENTAL)
412#
413CONFIG_NF_CONNTRACK_IPV6=m
414# CONFIG_IP6_NF_QUEUE is not set
415# CONFIG_IP6_NF_IPTABLES is not set
416
417#
418# DCCP Configuration (EXPERIMENTAL)
419#
420# CONFIG_IP_DCCP is not set
421
422#
423# SCTP Configuration (EXPERIMENTAL)
424#
425# CONFIG_IP_SCTP is not set
426
427#
428# TIPC Configuration (EXPERIMENTAL)
429#
430# CONFIG_TIPC is not set
431# CONFIG_ATM is not set
432# CONFIG_BRIDGE is not set
433# CONFIG_VLAN_8021Q is not set
434# CONFIG_DECNET is not set
435# CONFIG_LLC2 is not set
436# CONFIG_IPX is not set
437# CONFIG_ATALK is not set
438# CONFIG_X25 is not set
439# CONFIG_LAPB is not set
440# CONFIG_ECONET is not set
441# CONFIG_WAN_ROUTER is not set
442
443#
444# QoS and/or fair queueing
445#
446# CONFIG_NET_SCHED is not set
447CONFIG_NET_CLS_ROUTE=y
448
449#
450# Network testing
451#
452# CONFIG_NET_PKTGEN is not set
453# CONFIG_HAMRADIO is not set
454# CONFIG_IRDA is not set
455# CONFIG_BT is not set
456CONFIG_IEEE80211=m
457# CONFIG_IEEE80211_DEBUG is not set
458CONFIG_IEEE80211_CRYPT_WEP=m
459CONFIG_IEEE80211_CRYPT_CCMP=m
460CONFIG_IEEE80211_SOFTMAC=m
461# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
462CONFIG_WIRELESS_EXT=y
463CONFIG_FIB_RULES=y
464
465#
466# Device Drivers
467#
468
469#
470# Generic Driver Options
471#
472CONFIG_STANDALONE=y
473CONFIG_PREVENT_FIRMWARE_BUILD=y
474CONFIG_FW_LOADER=m
475# CONFIG_SYS_HYPERVISOR is not set
476
477#
478# Connector - unified userspace <-> kernelspace linker
479#
480CONFIG_CONNECTOR=m
481
482#
483# Memory Technology Devices (MTD)
484#
485# CONFIG_MTD is not set
486
487#
488# Parallel port support
489#
490# CONFIG_PARPORT is not set
491
492#
493# Plug and Play support
494#
495# CONFIG_PNPACPI is not set
496
497#
498# Block devices
499#
500# CONFIG_BLK_CPQ_DA is not set
501# CONFIG_BLK_CPQ_CISS_DA is not set
502# CONFIG_BLK_DEV_DAC960 is not set
503# CONFIG_BLK_DEV_UMEM is not set
504# CONFIG_BLK_DEV_COW_COMMON is not set
505CONFIG_BLK_DEV_LOOP=y
506# CONFIG_BLK_DEV_CRYPTOLOOP is not set
507# CONFIG_BLK_DEV_NBD is not set
508# CONFIG_BLK_DEV_SX8 is not set
509# CONFIG_BLK_DEV_RAM is not set
510# CONFIG_BLK_DEV_INITRD is not set
511# CONFIG_CDROM_PKTCDVD is not set
512CONFIG_ATA_OVER_ETH=m
513
514#
515# Misc devices
516#
517CONFIG_SGI_IOC4=m
518# CONFIG_TIFM_CORE is not set
519
520#
521# ATA/ATAPI/MFM/RLL support
522#
523# CONFIG_IDE is not set
524
525#
526# SCSI device support
527#
528CONFIG_RAID_ATTRS=m
529CONFIG_SCSI=m
530CONFIG_SCSI_TGT=m
531CONFIG_SCSI_NETLINK=y
532CONFIG_SCSI_PROC_FS=y
533
534#
535# SCSI support type (disk, tape, CD-ROM)
536#
537# CONFIG_BLK_DEV_SD is not set
538# CONFIG_CHR_DEV_ST is not set
539# CONFIG_CHR_DEV_OSST is not set
540# CONFIG_BLK_DEV_SR is not set
541# CONFIG_CHR_DEV_SG is not set
542# CONFIG_CHR_DEV_SCH is not set
543
544#
545# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
546#
547# CONFIG_SCSI_MULTI_LUN is not set
548# CONFIG_SCSI_CONSTANTS is not set
549# CONFIG_SCSI_LOGGING is not set
550CONFIG_SCSI_SCAN_ASYNC=y
551
552#
553# SCSI Transports
554#
555# CONFIG_SCSI_SPI_ATTRS is not set
556CONFIG_SCSI_FC_ATTRS=m
557CONFIG_SCSI_ISCSI_ATTRS=m
558CONFIG_SCSI_SAS_ATTRS=m
559CONFIG_SCSI_SAS_LIBSAS=m
560# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
561
562#
563# SCSI low-level drivers
564#
565CONFIG_ISCSI_TCP=m
566# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
567# CONFIG_SCSI_3W_9XXX is not set
568# CONFIG_SCSI_ACARD is not set
569# CONFIG_SCSI_AACRAID is not set
570# CONFIG_SCSI_AIC7XXX is not set
571# CONFIG_SCSI_AIC7XXX_OLD is not set
572# CONFIG_SCSI_AIC79XX is not set
573CONFIG_SCSI_AIC94XX=m
574# CONFIG_AIC94XX_DEBUG is not set
575# CONFIG_SCSI_DPT_I2O is not set
576# CONFIG_SCSI_ARCMSR is not set
577# CONFIG_MEGARAID_NEWGEN is not set
578# CONFIG_MEGARAID_LEGACY is not set
579# CONFIG_MEGARAID_SAS is not set
580# CONFIG_SCSI_HPTIOP is not set
581# CONFIG_SCSI_DMX3191D is not set
582# CONFIG_SCSI_FUTURE_DOMAIN is not set
583# CONFIG_SCSI_IPS is not set
584# CONFIG_SCSI_INITIO is not set
585# CONFIG_SCSI_INIA100 is not set
586# CONFIG_SCSI_STEX is not set
587# CONFIG_SCSI_SYM53C8XX_2 is not set
588# CONFIG_SCSI_QLOGIC_1280 is not set
589# CONFIG_SCSI_QLA_FC is not set
590# CONFIG_SCSI_QLA_ISCSI is not set
591# CONFIG_SCSI_LPFC is not set
592# CONFIG_SCSI_DC395x is not set
593# CONFIG_SCSI_DC390T is not set
594# CONFIG_SCSI_NSP32 is not set
595# CONFIG_SCSI_DEBUG is not set
596# CONFIG_SCSI_SRP is not set
597
598#
599# Serial ATA (prod) and Parallel ATA (experimental) drivers
600#
601# CONFIG_ATA is not set
602
603#
604# Multi-device support (RAID and LVM)
605#
606# CONFIG_MD is not set
607
608#
609# Fusion MPT device support
610#
611# CONFIG_FUSION is not set
612# CONFIG_FUSION_SPI is not set
613# CONFIG_FUSION_FC is not set
614# CONFIG_FUSION_SAS is not set
615
616#
617# IEEE 1394 (FireWire) support
618#
619# CONFIG_IEEE1394 is not set
620
621#
622# I2O device support
623#
624# CONFIG_I2O is not set
625
626#
627# Network device support
628#
629CONFIG_NETDEVICES=y
630# CONFIG_DUMMY is not set
631# CONFIG_BONDING is not set
632# CONFIG_EQUALIZER is not set
633CONFIG_TUN=m
634
635#
636# ARCnet devices
637#
638# CONFIG_ARCNET is not set
639
640#
641# PHY device support
642#
643CONFIG_PHYLIB=m
644
645#
646# MII PHY device drivers
647#
648CONFIG_MARVELL_PHY=m
649CONFIG_DAVICOM_PHY=m
650CONFIG_QSEMI_PHY=m
651CONFIG_LXT_PHY=m
652CONFIG_CICADA_PHY=m
653CONFIG_VITESSE_PHY=m
654CONFIG_SMSC_PHY=m
655# CONFIG_BROADCOM_PHY is not set
656# CONFIG_FIXED_PHY is not set
657
658#
659# Ethernet (10 or 100Mbit)
660#
661CONFIG_NET_ETHERNET=y
662CONFIG_MII=y
663# CONFIG_HAPPYMEAL is not set
664# CONFIG_SUNGEM is not set
665# CONFIG_CASSINI is not set
666# CONFIG_NET_VENDOR_3COM is not set
667# CONFIG_DM9000 is not set
668
669#
670# Tulip family network device support
671#
672# CONFIG_NET_TULIP is not set
673# CONFIG_HP100 is not set
674CONFIG_NET_PCI=y
675# CONFIG_PCNET32 is not set
676# CONFIG_AMD8111_ETH is not set
677# CONFIG_ADAPTEC_STARFIRE is not set
678# CONFIG_B44 is not set
679# CONFIG_FORCEDETH is not set
680# CONFIG_DGRS is not set
681# CONFIG_EEPRO100 is not set
682CONFIG_E100=y
683# CONFIG_FEALNX is not set
684# CONFIG_NATSEMI is not set
685# CONFIG_NE2K_PCI is not set
686# CONFIG_8139CP is not set
687# CONFIG_8139TOO is not set
688# CONFIG_SIS900 is not set
689# CONFIG_EPIC100 is not set
690# CONFIG_SUNDANCE is not set
691# CONFIG_TLAN is not set
692# CONFIG_VIA_RHINE is not set
693# CONFIG_SC92031 is not set
694
695#
696# Ethernet (1000 Mbit)
697#
698# CONFIG_ACENIC is not set
699# CONFIG_DL2K is not set
700# CONFIG_E1000 is not set
701# CONFIG_NS83820 is not set
702# CONFIG_HAMACHI is not set
703# CONFIG_YELLOWFIN is not set
704# CONFIG_R8169 is not set
705# CONFIG_SIS190 is not set
706# CONFIG_SKGE is not set
707# CONFIG_SKY2 is not set
708# CONFIG_SK98LIN is not set
709# CONFIG_VIA_VELOCITY is not set
710# CONFIG_TIGON3 is not set
711# CONFIG_BNX2 is not set
712CONFIG_MV643XX_ETH=y
713CONFIG_QLA3XXX=m
714# CONFIG_ATL1 is not set
715
716#
717# Ethernet (10000 Mbit)
718#
719# CONFIG_CHELSIO_T1 is not set
720CONFIG_CHELSIO_T3=m
721# CONFIG_IXGB is not set
722# CONFIG_S2IO is not set
723# CONFIG_MYRI10GE is not set
724CONFIG_NETXEN_NIC=m
725
726#
727# Token Ring devices
728#
729# CONFIG_TR is not set
730
731#
732# Wireless LAN (non-hamradio)
733#
734# CONFIG_NET_RADIO is not set
735
736#
737# Wan interfaces
738#
739# CONFIG_WAN is not set
740# CONFIG_FDDI is not set
741# CONFIG_HIPPI is not set
742CONFIG_PPP=m
743# CONFIG_PPP_MULTILINK is not set
744# CONFIG_PPP_FILTER is not set
745CONFIG_PPP_ASYNC=m
746CONFIG_PPP_SYNC_TTY=m
747CONFIG_PPP_DEFLATE=m
748# CONFIG_PPP_BSDCOMP is not set
749CONFIG_PPP_MPPE=m
750CONFIG_PPPOE=m
751# CONFIG_SLIP is not set
752CONFIG_SLHC=m
753# CONFIG_NET_FC is not set
754# CONFIG_SHAPER is not set
755# CONFIG_NETCONSOLE is not set
756# CONFIG_NETPOLL is not set
757# CONFIG_NET_POLL_CONTROLLER is not set
758
759#
760# ISDN subsystem
761#
762# CONFIG_ISDN is not set
763
764#
765# Telephony Support
766#
767# CONFIG_PHONE is not set
768
769#
770# Input device support
771#
772CONFIG_INPUT=y
773# CONFIG_INPUT_FF_MEMLESS is not set
774
775#
776# Userland interfaces
777#
778# CONFIG_INPUT_MOUSEDEV is not set
779# CONFIG_INPUT_JOYDEV is not set
780# CONFIG_INPUT_TSDEV is not set
781# CONFIG_INPUT_EVDEV is not set
782# CONFIG_INPUT_EVBUG is not set
783
784#
785# Input Device Drivers
786#
787# CONFIG_INPUT_KEYBOARD is not set
788# CONFIG_INPUT_MOUSE is not set
789# CONFIG_INPUT_JOYSTICK is not set
790# CONFIG_INPUT_TOUCHSCREEN is not set
791# CONFIG_INPUT_MISC is not set
792
793#
794# Hardware I/O ports
795#
796CONFIG_SERIO=y
797# CONFIG_SERIO_I8042 is not set
798# CONFIG_SERIO_SERPORT is not set
799# CONFIG_SERIO_PCIPS2 is not set
800# CONFIG_SERIO_LIBPS2 is not set
801# CONFIG_SERIO_RAW is not set
802# CONFIG_GAMEPORT is not set
803
804#
805# Character devices
806#
807CONFIG_VT=y
808CONFIG_VT_CONSOLE=y
809CONFIG_HW_CONSOLE=y
810CONFIG_VT_HW_CONSOLE_BINDING=y
811# CONFIG_SERIAL_NONSTANDARD is not set
812
813#
814# Serial drivers
815#
816CONFIG_SERIAL_8250=y
817CONFIG_SERIAL_8250_CONSOLE=y
818CONFIG_SERIAL_8250_PCI=y
819CONFIG_SERIAL_8250_NR_UARTS=4
820CONFIG_SERIAL_8250_RUNTIME_UARTS=4
821# CONFIG_SERIAL_8250_EXTENDED is not set
822
823#
824# Non-8250 serial port support
825#
826CONFIG_SERIAL_CORE=y
827CONFIG_SERIAL_CORE_CONSOLE=y
828# CONFIG_SERIAL_JSM is not set
829CONFIG_UNIX98_PTYS=y
830CONFIG_LEGACY_PTYS=y
831CONFIG_LEGACY_PTY_COUNT=256
832
833#
834# IPMI
835#
836# CONFIG_IPMI_HANDLER is not set
837
838#
839# Watchdog Cards
840#
841# CONFIG_WATCHDOG is not set
842# CONFIG_HW_RANDOM is not set
843CONFIG_RTC=y
844# CONFIG_DTLK is not set
845# CONFIG_R3964 is not set
846# CONFIG_APPLICOM is not set
847# CONFIG_DRM is not set
848# CONFIG_RAW_DRIVER is not set
849
850#
851# TPM devices
852#
853# CONFIG_TCG_TPM is not set
854
855#
856# I2C support
857#
858# CONFIG_I2C is not set
859
860#
861# SPI support
862#
863# CONFIG_SPI is not set
864# CONFIG_SPI_MASTER is not set
865
866#
867# Dallas's 1-wire bus
868#
869# CONFIG_W1 is not set
870
871#
872# Hardware Monitoring support
873#
874# CONFIG_HWMON is not set
875# CONFIG_HWMON_VID is not set
876
877#
878# Multimedia devices
879#
880# CONFIG_VIDEO_DEV is not set
881
882#
883# Digital Video Broadcasting Devices
884#
885# CONFIG_DVB is not set
886
887#
888# Graphics support
889#
890# CONFIG_FIRMWARE_EDID is not set
891CONFIG_FB=y
892# CONFIG_FB_CFB_FILLRECT is not set
893# CONFIG_FB_CFB_COPYAREA is not set
894# CONFIG_FB_CFB_IMAGEBLIT is not set
895# CONFIG_FB_SVGALIB is not set
896# CONFIG_FB_MACMODES is not set
897# CONFIG_FB_BACKLIGHT is not set
898CONFIG_FB_MODE_HELPERS=y
899# CONFIG_FB_TILEBLITTING is not set
900# CONFIG_FB_CIRRUS is not set
901# CONFIG_FB_PM2 is not set
902# CONFIG_FB_CYBER2000 is not set
903# CONFIG_FB_ASILIANT is not set
904# CONFIG_FB_IMSTT is not set
905# CONFIG_FB_S1D13XXX is not set
906# CONFIG_FB_NVIDIA is not set
907# CONFIG_FB_RIVA is not set
908# CONFIG_FB_MATROX is not set
909# CONFIG_FB_RADEON is not set
910# CONFIG_FB_ATY128 is not set
911# CONFIG_FB_ATY is not set
912# CONFIG_FB_S3 is not set
913# CONFIG_FB_SAVAGE is not set
914# CONFIG_FB_SIS is not set
915# CONFIG_FB_NEOMAGIC is not set
916# CONFIG_FB_KYRO is not set
917# CONFIG_FB_3DFX is not set
918# CONFIG_FB_VOODOO1 is not set
919# CONFIG_FB_SMIVGX is not set
920# CONFIG_FB_TRIDENT is not set
921# CONFIG_FB_VIRTUAL is not set
922
923#
924# Console display driver support
925#
926# CONFIG_VGA_CONSOLE is not set
927CONFIG_DUMMY_CONSOLE=y
928CONFIG_FRAMEBUFFER_CONSOLE=y
929# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
930# CONFIG_FONTS is not set
931CONFIG_FONT_8x8=y
932CONFIG_FONT_8x16=y
933
934#
935# Logo configuration
936#
937CONFIG_LOGO=y
938CONFIG_LOGO_LINUX_MONO=y
939CONFIG_LOGO_LINUX_VGA16=y
940CONFIG_LOGO_LINUX_CLUT224=y
941# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
942
943#
944# Sound
945#
946# CONFIG_SOUND is not set
947
948#
949# HID Devices
950#
951CONFIG_HID=y
952# CONFIG_HID_DEBUG is not set
953
954#
955# USB support
956#
957CONFIG_USB_ARCH_HAS_HCD=y
958CONFIG_USB_ARCH_HAS_OHCI=y
959CONFIG_USB_ARCH_HAS_EHCI=y
960# CONFIG_USB is not set
961
962#
963# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
964#
965
966#
967# USB Gadget Support
968#
969# CONFIG_USB_GADGET is not set
970
971#
972# MMC/SD Card support
973#
974# CONFIG_MMC is not set
975
976#
977# LED devices
978#
979# CONFIG_NEW_LEDS is not set
980
981#
982# LED drivers
983#
984
985#
986# LED Triggers
987#
988
989#
990# InfiniBand support
991#
992# CONFIG_INFINIBAND is not set
993
994#
995# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
996#
997
998#
999# Real Time Clock
1000#
1001# CONFIG_RTC_CLASS is not set
1002
1003#
1004# DMA Engine support
1005#
1006# CONFIG_DMA_ENGINE is not set
1007
1008#
1009# DMA Clients
1010#
1011
1012#
1013# DMA Devices
1014#
1015
1016#
1017# Auxiliary Display support
1018#
1019
1020#
1021# Virtualization
1022#
1023
1024#
1025# File systems
1026#
1027CONFIG_EXT2_FS=y
1028# CONFIG_EXT2_FS_XATTR is not set
1029# CONFIG_EXT2_FS_XIP is not set
1030CONFIG_EXT3_FS=m
1031CONFIG_EXT3_FS_XATTR=y
1032# CONFIG_EXT3_FS_POSIX_ACL is not set
1033# CONFIG_EXT3_FS_SECURITY is not set
1034# CONFIG_EXT4DEV_FS is not set
1035CONFIG_JBD=m
1036# CONFIG_JBD_DEBUG is not set
1037CONFIG_FS_MBCACHE=y
1038CONFIG_REISERFS_FS=m
1039# CONFIG_REISERFS_CHECK is not set
1040# CONFIG_REISERFS_PROC_INFO is not set
1041# CONFIG_REISERFS_FS_XATTR is not set
1042# CONFIG_JFS_FS is not set
1043CONFIG_FS_POSIX_ACL=y
1044CONFIG_XFS_FS=m
1045# CONFIG_XFS_QUOTA is not set
1046# CONFIG_XFS_SECURITY is not set
1047# CONFIG_XFS_POSIX_ACL is not set
1048# CONFIG_XFS_RT is not set
1049# CONFIG_GFS2_FS is not set
1050# CONFIG_OCFS2_FS is not set
1051# CONFIG_MINIX_FS is not set
1052# CONFIG_ROMFS_FS is not set
1053CONFIG_INOTIFY=y
1054CONFIG_INOTIFY_USER=y
1055# CONFIG_QUOTA is not set
1056CONFIG_DNOTIFY=y
1057CONFIG_AUTOFS_FS=y
1058CONFIG_AUTOFS4_FS=m
1059CONFIG_FUSE_FS=m
1060CONFIG_GENERIC_ACL=y
1061
1062#
1063# CD-ROM/DVD Filesystems
1064#
1065# CONFIG_ISO9660_FS is not set
1066# CONFIG_UDF_FS is not set
1067
1068#
1069# DOS/FAT/NT Filesystems
1070#
1071# CONFIG_MSDOS_FS is not set
1072# CONFIG_VFAT_FS is not set
1073# CONFIG_NTFS_FS is not set
1074
1075#
1076# Pseudo filesystems
1077#
1078CONFIG_PROC_FS=y
1079CONFIG_PROC_KCORE=y
1080CONFIG_PROC_SYSCTL=y
1081CONFIG_SYSFS=y
1082CONFIG_TMPFS=y
1083CONFIG_TMPFS_POSIX_ACL=y
1084# CONFIG_HUGETLB_PAGE is not set
1085CONFIG_RAMFS=y
1086CONFIG_CONFIGFS_FS=m
1087
1088#
1089# Miscellaneous filesystems
1090#
1091# CONFIG_ADFS_FS is not set
1092# CONFIG_AFFS_FS is not set
1093# CONFIG_HFS_FS is not set
1094# CONFIG_HFSPLUS_FS is not set
1095# CONFIG_BEFS_FS is not set
1096# CONFIG_BFS_FS is not set
1097CONFIG_EFS_FS=y
1098CONFIG_CRAMFS=y
1099# CONFIG_VXFS_FS is not set
1100# CONFIG_HPFS_FS is not set
1101# CONFIG_QNX4FS_FS is not set
1102# CONFIG_SYSV_FS is not set
1103# CONFIG_UFS_FS is not set
1104
1105#
1106# Network File Systems
1107#
1108CONFIG_NFS_FS=y
1109CONFIG_NFS_V3=y
1110# CONFIG_NFS_V3_ACL is not set
1111# CONFIG_NFS_V4 is not set
1112# CONFIG_NFS_DIRECTIO is not set
1113CONFIG_NFSD=y
1114CONFIG_NFSD_V3=y
1115# CONFIG_NFSD_V3_ACL is not set
1116# CONFIG_NFSD_V4 is not set
1117# CONFIG_NFSD_TCP is not set
1118CONFIG_ROOT_NFS=y
1119CONFIG_LOCKD=y
1120CONFIG_LOCKD_V4=y
1121CONFIG_EXPORTFS=y
1122CONFIG_NFS_COMMON=y
1123CONFIG_SUNRPC=y
1124# CONFIG_RPCSEC_GSS_KRB5 is not set
1125# CONFIG_RPCSEC_GSS_SPKM3 is not set
1126CONFIG_SMB_FS=m
1127# CONFIG_SMB_NLS_DEFAULT is not set
1128# CONFIG_CIFS is not set
1129# CONFIG_NCP_FS is not set
1130# CONFIG_CODA_FS is not set
1131# CONFIG_AFS_FS is not set
1132# CONFIG_9P_FS is not set
1133
1134#
1135# Partition Types
1136#
1137# CONFIG_PARTITION_ADVANCED is not set
1138CONFIG_MSDOS_PARTITION=y
1139
1140#
1141# Native Language Support
1142#
1143CONFIG_NLS=m
1144CONFIG_NLS_DEFAULT="iso8859-1"
1145# CONFIG_NLS_CODEPAGE_437 is not set
1146# CONFIG_NLS_CODEPAGE_737 is not set
1147# CONFIG_NLS_CODEPAGE_775 is not set
1148# CONFIG_NLS_CODEPAGE_850 is not set
1149# CONFIG_NLS_CODEPAGE_852 is not set
1150# CONFIG_NLS_CODEPAGE_855 is not set
1151# CONFIG_NLS_CODEPAGE_857 is not set
1152# CONFIG_NLS_CODEPAGE_860 is not set
1153# CONFIG_NLS_CODEPAGE_861 is not set
1154# CONFIG_NLS_CODEPAGE_862 is not set
1155# CONFIG_NLS_CODEPAGE_863 is not set
1156# CONFIG_NLS_CODEPAGE_864 is not set
1157# CONFIG_NLS_CODEPAGE_865 is not set
1158# CONFIG_NLS_CODEPAGE_866 is not set
1159# CONFIG_NLS_CODEPAGE_869 is not set
1160# CONFIG_NLS_CODEPAGE_936 is not set
1161# CONFIG_NLS_CODEPAGE_950 is not set
1162# CONFIG_NLS_CODEPAGE_932 is not set
1163# CONFIG_NLS_CODEPAGE_949 is not set
1164# CONFIG_NLS_CODEPAGE_874 is not set
1165# CONFIG_NLS_ISO8859_8 is not set
1166# CONFIG_NLS_CODEPAGE_1250 is not set
1167# CONFIG_NLS_CODEPAGE_1251 is not set
1168# CONFIG_NLS_ASCII is not set
1169# CONFIG_NLS_ISO8859_1 is not set
1170# CONFIG_NLS_ISO8859_2 is not set
1171# CONFIG_NLS_ISO8859_3 is not set
1172# CONFIG_NLS_ISO8859_4 is not set
1173# CONFIG_NLS_ISO8859_5 is not set
1174# CONFIG_NLS_ISO8859_6 is not set
1175# CONFIG_NLS_ISO8859_7 is not set
1176# CONFIG_NLS_ISO8859_9 is not set
1177# CONFIG_NLS_ISO8859_13 is not set
1178# CONFIG_NLS_ISO8859_14 is not set
1179# CONFIG_NLS_ISO8859_15 is not set
1180# CONFIG_NLS_KOI8_R is not set
1181# CONFIG_NLS_KOI8_U is not set
1182# CONFIG_NLS_UTF8 is not set
1183
1184#
1185# Distributed Lock Manager
1186#
1187CONFIG_DLM=m
1188CONFIG_DLM_TCP=y
1189# CONFIG_DLM_SCTP is not set
1190# CONFIG_DLM_DEBUG is not set
1191
1192#
1193# Profiling support
1194#
1195# CONFIG_PROFILING is not set
1196
1197#
1198# Kernel hacking
1199#
1200CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1201# CONFIG_PRINTK_TIME is not set
1202CONFIG_ENABLE_MUST_CHECK=y
1203# CONFIG_MAGIC_SYSRQ is not set
1204# CONFIG_UNUSED_SYMBOLS is not set
1205# CONFIG_DEBUG_FS is not set
1206# CONFIG_HEADERS_CHECK is not set
1207# CONFIG_DEBUG_KERNEL is not set
1208CONFIG_LOG_BUF_SHIFT=14
1209CONFIG_CROSSCOMPILE=y
1210CONFIG_CMDLINE="ip=any root=nfs"
1211
1212#
1213# Security options
1214#
1215# CONFIG_KEYS is not set
1216# CONFIG_SECURITY is not set
1217
1218#
1219# Cryptographic options
1220#
1221CONFIG_CRYPTO=y
1222CONFIG_CRYPTO_ALGAPI=y
1223CONFIG_CRYPTO_BLKCIPHER=m
1224CONFIG_CRYPTO_HASH=y
1225CONFIG_CRYPTO_MANAGER=y
1226CONFIG_CRYPTO_HMAC=y
1227CONFIG_CRYPTO_XCBC=m
1228CONFIG_CRYPTO_NULL=m
1229CONFIG_CRYPTO_MD4=m
1230CONFIG_CRYPTO_MD5=y
1231CONFIG_CRYPTO_SHA1=m
1232CONFIG_CRYPTO_SHA256=m
1233CONFIG_CRYPTO_SHA512=m
1234CONFIG_CRYPTO_WP512=m
1235CONFIG_CRYPTO_TGR192=m
1236CONFIG_CRYPTO_GF128MUL=m
1237CONFIG_CRYPTO_ECB=m
1238CONFIG_CRYPTO_CBC=m
1239CONFIG_CRYPTO_PCBC=m
1240CONFIG_CRYPTO_LRW=m
1241CONFIG_CRYPTO_DES=m
1242CONFIG_CRYPTO_FCRYPT=m
1243CONFIG_CRYPTO_BLOWFISH=m
1244CONFIG_CRYPTO_TWOFISH=m
1245CONFIG_CRYPTO_TWOFISH_COMMON=m
1246CONFIG_CRYPTO_SERPENT=m
1247CONFIG_CRYPTO_AES=m
1248CONFIG_CRYPTO_CAST5=m
1249CONFIG_CRYPTO_CAST6=m
1250CONFIG_CRYPTO_TEA=m
1251CONFIG_CRYPTO_ARC4=m
1252CONFIG_CRYPTO_KHAZAD=m
1253CONFIG_CRYPTO_ANUBIS=m
1254CONFIG_CRYPTO_DEFLATE=m
1255CONFIG_CRYPTO_MICHAEL_MIC=m
1256CONFIG_CRYPTO_CRC32C=m
1257CONFIG_CRYPTO_CAMELLIA=m
1258# CONFIG_CRYPTO_TEST is not set
1259
1260#
1261# Hardware crypto devices
1262#
1263
1264#
1265# Library routines
1266#
1267CONFIG_BITREVERSE=y
1268CONFIG_CRC_CCITT=m
1269CONFIG_CRC16=m
1270CONFIG_CRC32=y
1271CONFIG_LIBCRC32C=m
1272CONFIG_ZLIB_INFLATE=y
1273CONFIG_ZLIB_DEFLATE=m
1274CONFIG_TEXTSEARCH=y
1275CONFIG_TEXTSEARCH_KMP=m
1276CONFIG_TEXTSEARCH_BM=m
1277CONFIG_TEXTSEARCH_FSM=m
1278CONFIG_PLIST=y
1279CONFIG_HAS_IOMEM=y
1280CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index 492c9abfd943..e1db1fb80cd0 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35CONFIG_MOMENCO_OCELOT=y 35CONFIG_MOMENCO_OCELOT=y
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 22fb01bc6a7a..0028aef0af9d 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_PB1100=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index b0abaef4ce56..8a1d5888739c 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_PB1500=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index ddb173ae50ea..5581ad2ca411 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -34,7 +34,6 @@ CONFIG_MIPS_PB1550=y
34# CONFIG_MIPS_SIM is not set 34# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 35# CONFIG_MOMENCO_JAGUAR_ATX is not set
36# CONFIG_MOMENCO_OCELOT is not set 36# CONFIG_MOMENCO_OCELOT is not set
37# CONFIG_MOMENCO_OCELOT_3 is not set
38# CONFIG_MOMENCO_OCELOT_G is not set 37# CONFIG_MOMENCO_OCELOT_G is not set
39# CONFIG_MIPS_XXS1500 is not set 38# CONFIG_MIPS_XXS1500 is not set
40# CONFIG_PNX8550_JBS is not set 39# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 2c2a8c8dca69..821c1cee5639 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39CONFIG_PNX8550_JBS=y 38CONFIG_PNX8550_JBS=y
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig
index b435d63deab9..0e8bd92b38cf 100644
--- a/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/arch/mips/configs/pnx8550-stb810_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index cfe1f5a0a20f..6cca105832ca 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/rbhma4200_defconfig b/arch/mips/configs/rbhma4200_defconfig
index 76b939fad78e..20a38526d483 100644
--- a/arch/mips/configs/rbhma4200_defconfig
+++ b/arch/mips/configs/rbhma4200_defconfig
@@ -31,7 +31,6 @@ CONFIG_MIPS=y
31# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
32# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
33# CONFIG_MOMENCO_OCELOT is not set 33# CONFIG_MOMENCO_OCELOT is not set
34# CONFIG_MOMENCO_OCELOT_3 is not set
35# CONFIG_MIPS_XXS1500 is not set 34# CONFIG_MIPS_XXS1500 is not set
36# CONFIG_PNX8550_JBS is not set 35# CONFIG_PNX8550_JBS is not set
37# CONFIG_PNX8550_STB810 is not set 36# CONFIG_PNX8550_STB810 is not set
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index 2c9e7e493a1b..5dbb250f71c7 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -21,7 +21,6 @@ CONFIG_ZONE_DMA=y
21# CONFIG_WR_PPMC is not set 21# CONFIG_WR_PPMC is not set
22# CONFIG_MIPS_SIM is not set 22# CONFIG_MIPS_SIM is not set
23# CONFIG_MOMENCO_OCELOT is not set 23# CONFIG_MOMENCO_OCELOT is not set
24# CONFIG_MOMENCO_OCELOT_3 is not set
25# CONFIG_PNX8550_JBS is not set 24# CONFIG_PNX8550_JBS is not set
26# CONFIG_PNX8550_STB810 is not set 25# CONFIG_PNX8550_STB810 is not set
27# CONFIG_DDB5477 is not set 26# CONFIG_DDB5477 is not set
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 9d731409c730..1a67a85aabbb 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 55fa6731c111..98a914092258 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index f80c61a54653..69c08b24c82a 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -33,7 +33,6 @@ CONFIG_MIPS_SEAD=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig
index d5e4e3e3769b..5d4fc0e4f729 100644
--- a/arch/mips/configs/tb0219_defconfig
+++ b/arch/mips/configs/tb0219_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index 8743f6dfd7ed..1b92b48de051 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index eab47f2ac829..5b77c7a5d83a 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index d32e4cd55ee4..94a4f94a8b24 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index 95986e37382c..e38bd9b0eadc 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -33,7 +33,6 @@ CONFIG_WR_PPMC=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index c1e5a128cfa6..f1cdb12f7925 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index bf18baf2fbc2..b3b6e58058f6 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -33,7 +33,6 @@ CONFIG_ZONE_DMA=y
33# CONFIG_MIPS_SIM is not set 33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MOMENCO_OCELOT is not set 35# CONFIG_MOMENCO_OCELOT is not set
36# CONFIG_MOMENCO_OCELOT_3 is not set
37# CONFIG_MOMENCO_OCELOT_G is not set 36# CONFIG_MOMENCO_OCELOT_G is not set
38# CONFIG_MIPS_XXS1500 is not set 37# CONFIG_MIPS_XXS1500 is not set
39# CONFIG_PNX8550_JBS is not set 38# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 4b40015a66d2..961594cb5214 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -49,7 +49,6 @@ obj-$(CONFIG_I8259) += i8259.o
49obj-$(CONFIG_IRQ_CPU) += irq_cpu.o 49obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
50obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o 50obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
51obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o 51obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
52obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o
53obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o 52obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o
54 53
55obj-$(CONFIG_32BIT) += scall32-o32.o 54obj-$(CONFIG_32BIT) += scall32-o32.o
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
deleted file mode 100644
index 3dd561832e4c..000000000000
--- a/arch/mips/kernel/irq-mv6434x.c
+++ /dev/null
@@ -1,111 +0,0 @@
1/*
2 * Copyright 2002 Momentum Computer
3 * Author: mdharm@momenco.com
4 * Copyright (C) 2004, 06 Ralf Baechle <ralf@linux-mips.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/interrupt.h>
13#include <linux/kernel.h>
14#include <linux/kernel_stat.h>
15#include <linux/mv643xx.h>
16#include <linux/sched.h>
17
18#include <asm/io.h>
19#include <asm/irq.h>
20#include <asm/marvell.h>
21
22static unsigned int irq_base;
23
24static inline int ls1bit32(unsigned int x)
25{
26 int b = 31, s;
27
28 s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
29 s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
30 s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
31 s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
32 s = 1; if (x << 1 == 0) s = 0; b -= s;
33
34 return b;
35}
36
37/* mask off an interrupt -- 1 is enable, 0 is disable */
38static inline void mask_mv64340_irq(unsigned int irq)
39{
40 uint32_t value;
41
42 if (irq < (irq_base + 32)) {
43 value = MV_READ(MV64340_INTERRUPT0_MASK_0_LOW);
44 value &= ~(1 << (irq - irq_base));
45 MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
46 } else {
47 value = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
48 value &= ~(1 << (irq - irq_base - 32));
49 MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
50 }
51}
52
53/* unmask an interrupt -- 1 is enable, 0 is disable */
54static inline void unmask_mv64340_irq(unsigned int irq)
55{
56 uint32_t value;
57
58 if (irq < (irq_base + 32)) {
59 value = MV_READ(MV64340_INTERRUPT0_MASK_0_LOW);
60 value |= 1 << (irq - irq_base);
61 MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
62 } else {
63 value = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
64 value |= 1 << (irq - irq_base - 32);
65 MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
66 }
67}
68
69/*
70 * Interrupt handler for interrupts coming from the Marvell chip.
71 * It could be built in ethernet ports etc...
72 */
73void ll_mv64340_irq(void)
74{
75 unsigned int irq_src_low, irq_src_high;
76 unsigned int irq_mask_low, irq_mask_high;
77
78 /* read the interrupt status registers */
79 irq_mask_low = MV_READ(MV64340_INTERRUPT0_MASK_0_LOW);
80 irq_mask_high = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
81 irq_src_low = MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_LOW);
82 irq_src_high = MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_HIGH);
83
84 /* mask for just the interrupts we want */
85 irq_src_low &= irq_mask_low;
86 irq_src_high &= irq_mask_high;
87
88 if (irq_src_low)
89 do_IRQ(ls1bit32(irq_src_low) + irq_base);
90 else
91 do_IRQ(ls1bit32(irq_src_high) + irq_base + 32);
92}
93
94struct irq_chip mv64340_irq_type = {
95 .name = "MV-64340",
96 .ack = mask_mv64340_irq,
97 .mask = mask_mv64340_irq,
98 .mask_ack = mask_mv64340_irq,
99 .unmask = unmask_mv64340_irq,
100};
101
102void __init mv64340_irq_init(unsigned int base)
103{
104 int i;
105
106 for (i = base; i < base + 64; i++)
107 set_irq_chip_and_handler(i, &mv64340_irq_type,
108 handle_level_irq);
109
110 irq_base = base;
111}
diff --git a/arch/mips/momentum/ocelot_3/Makefile b/arch/mips/momentum/ocelot_3/Makefile
deleted file mode 100644
index d5a090a85a15..000000000000
--- a/arch/mips/momentum/ocelot_3/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for Momentum Computer's Ocelot-3 board.
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8obj-y += irq.o platform.o prom.o reset.o setup.o
diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c
deleted file mode 100644
index 3862d1d1add4..000000000000
--- a/arch/mips/momentum/ocelot_3/irq.c
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * Copyright (C) 2000 RidgeRun, Inc.
3 * Author: RidgeRun, Inc.
4 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
8 * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
9 *
10 * Copyright 2004 PMC-Sierra
11 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
21 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
25 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 *
33 * Copyright (C) 2004 MontaVista Software Inc.
34 * Author: Manish Lachwani, mlachwani@mvista.com
35 *
36 */
37#include <linux/errno.h>
38#include <linux/init.h>
39#include <linux/kernel_stat.h>
40#include <linux/module.h>
41#include <linux/signal.h>
42#include <linux/sched.h>
43#include <linux/types.h>
44#include <linux/interrupt.h>
45#include <linux/ioport.h>
46#include <linux/timex.h>
47#include <linux/slab.h>
48#include <linux/random.h>
49#include <asm/bitops.h>
50#include <asm/bootinfo.h>
51#include <asm/io.h>
52#include <asm/irq.h>
53#include <asm/mipsregs.h>
54#include <asm/system.h>
55
56static struct irqaction cascade_mv64340 = {
57 no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
58};
59
60void __init arch_init_irq(void)
61{
62 /*
63 * Clear all of the interrupts while we change the able around a bit.
64 * int-handler is not on bootstrap
65 */
66 clear_c0_status(ST0_IM | ST0_BEV);
67
68 rm7k_cpu_irq_init();
69
70 /* set up the cascading interrupts */
71 setup_irq(8, &cascade_mv64340); /* unmask intControl IM8, IRQ 9 */
72 mv64340_irq_init(16);
73
74 set_c0_status(ST0_IM); /* IE in the status register */
75
76}
77
78asmlinkage void plat_irq_dispatch(void)
79{
80 unsigned int pending = read_c0_cause() & read_c0_status();
81
82 if (pending & STATUSF_IP0)
83 do_IRQ(0);
84 else if (pending & STATUSF_IP1)
85 do_IRQ(1);
86 else if (pending & STATUSF_IP2)
87 do_IRQ(2);
88 else if (pending & STATUSF_IP3)
89 do_IRQ(3);
90 else if (pending & STATUSF_IP4)
91 do_IRQ(4);
92 else if (pending & STATUSF_IP5)
93 do_IRQ(5);
94 else if (pending & STATUSF_IP6)
95 do_IRQ(6);
96 else if (pending & STATUSF_IP7)
97 do_IRQ(7);
98 else {
99 /*
100 * Now look at the extended interrupts
101 */
102 pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
103
104 if (pending & STATUSF_IP8)
105 ll_mv64340_irq();
106 else
107 spurious_interrupt();
108 }
109}
diff --git a/arch/mips/momentum/ocelot_3/ocelot_3_fpga.h b/arch/mips/momentum/ocelot_3/ocelot_3_fpga.h
deleted file mode 100644
index 5710a9029f1c..000000000000
--- a/arch/mips/momentum/ocelot_3/ocelot_3_fpga.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * Ocelot-3 Board Register Definitions
3 *
4 * (C) 2002 Momentum Computer Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Louis Hamilton, Red Hat, Inc.
27 * hamilton@redhat.com [MIPS64 modifications]
28 *
29 * Copyright (C) 2004 MontaVista Software Inc.
30 * Author: Manish Lachwani, mlachwani@mvista.com
31 */
32
33#ifndef __OCELOT_3_FPGA_H__
34#define __OCELOT_3_FPGA_H__
35
36#define OCELOT_3_REG_BOARDREV 0x0
37#define OCELOT_3_REG_FPGA_REV 0x1
38#define OCELOT_3_REG_FPGA_TYPE 0x2
39#define OCELOT_3_REG_RESET_STATUS 0x3
40#define OCELOT_3_REG_BOARD_STATUS 0x4
41#define OCELOT_3_REG_CPCI_ID 0x5
42#define OCELOT_3_REG_SET 0x6
43#define OCELOT_3_REG_CLR 0x7
44#define OCELOT_3_REG_EEPROM_MODE 0x9
45#define OCELOT_3_REG_INTMASK 0xa
46#define OCELOT_3_REG_INTSTAT 0xb
47#define OCELOT_3_REG_UART_INTMASK 0xc
48#define OCELOT_3_REG_UART_INTSTAT 0xd
49#define OCELOT_3_REG_INTSET 0xe
50#define OCELOT_3_REG_INTCLR 0xf
51
52extern unsigned long ocelot_fpga_base;
53
54#define __FPGA_REG_TO_ADDR(reg) \
55 ((void *) ocelot_fpga_base + OCELOT_3_REG_##reg)
56#define OCELOT_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg))
57#define OCELOT_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg))
58
59#endif
diff --git a/arch/mips/momentum/ocelot_3/platform.c b/arch/mips/momentum/ocelot_3/platform.c
deleted file mode 100644
index cb63c82ef650..000000000000
--- a/arch/mips/momentum/ocelot_3/platform.c
+++ /dev/null
@@ -1,252 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006, 07 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 Dale Farnsworth (dale@farnsworth.org)
8 */
9#include <linux/delay.h>
10#include <linux/if_ether.h>
11#include <linux/init.h>
12#include <linux/ioport.h>
13#include <linux/module.h>
14#include <linux/mv643xx.h>
15#include <linux/platform_device.h>
16#include <linux/serial_8250.h>
17
18#include "ocelot_3_fpga.h"
19
20#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
21
22static struct resource mv643xx_eth_shared_resources[] = {
23 [0] = {
24 .name = "ethernet shared base",
25 .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
26 .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
27 MV643XX_ETH_SHARED_REGS_SIZE - 1,
28 .flags = IORESOURCE_MEM,
29 },
30};
31
32static struct platform_device mv643xx_eth_shared_device = {
33 .name = MV643XX_ETH_SHARED_NAME,
34 .id = 0,
35 .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
36 .resource = mv643xx_eth_shared_resources,
37};
38
39#define MV_SRAM_BASE 0xfe000000UL
40#define MV_SRAM_SIZE (256 * 1024)
41
42#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
43#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
44
45#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
46#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
47
48#define MV64x60_IRQ_ETH_0 48
49#define MV64x60_IRQ_ETH_1 49
50#define MV64x60_IRQ_ETH_2 50
51
52static struct resource mv64x60_eth0_resources[] = {
53 [0] = {
54 .name = "eth0 irq",
55 .start = MV64x60_IRQ_ETH_0,
56 .end = MV64x60_IRQ_ETH_0,
57 .flags = IORESOURCE_IRQ,
58 },
59};
60
61static struct mv643xx_eth_platform_data eth0_pd = {
62 .port_number = 0,
63
64 .tx_sram_addr = MV_SRAM_BASE_ETH0,
65 .tx_sram_size = MV_SRAM_TXRING_SIZE,
66 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
67
68 .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
69 .rx_sram_size = MV_SRAM_RXRING_SIZE,
70 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
71};
72
73static struct platform_device eth0_device = {
74 .name = MV643XX_ETH_NAME,
75 .id = 0,
76 .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
77 .resource = mv64x60_eth0_resources,
78 .dev = {
79 .platform_data = &eth0_pd,
80 },
81};
82
83static struct resource mv64x60_eth1_resources[] = {
84 [0] = {
85 .name = "eth1 irq",
86 .start = MV64x60_IRQ_ETH_1,
87 .end = MV64x60_IRQ_ETH_1,
88 .flags = IORESOURCE_IRQ,
89 },
90};
91
92static struct mv643xx_eth_platform_data eth1_pd = {
93 .port_number = 1,
94
95 .tx_sram_addr = MV_SRAM_BASE_ETH1,
96 .tx_sram_size = MV_SRAM_TXRING_SIZE,
97 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
98
99 .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
100 .rx_sram_size = MV_SRAM_RXRING_SIZE,
101 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
102};
103
104static struct platform_device eth1_device = {
105 .name = MV643XX_ETH_NAME,
106 .id = 1,
107 .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
108 .resource = mv64x60_eth1_resources,
109 .dev = {
110 .platform_data = &eth1_pd,
111 },
112};
113
114static struct resource mv64x60_eth2_resources[] = {
115 [0] = {
116 .name = "eth2 irq",
117 .start = MV64x60_IRQ_ETH_2,
118 .end = MV64x60_IRQ_ETH_2,
119 .flags = IORESOURCE_IRQ,
120 },
121};
122
123static struct mv643xx_eth_platform_data eth2_pd = {
124 .port_number = 2,
125};
126
127static struct platform_device eth2_device = {
128 .name = MV643XX_ETH_NAME,
129 .id = 2,
130 .num_resources = ARRAY_SIZE(mv64x60_eth2_resources),
131 .resource = mv64x60_eth2_resources,
132 .dev = {
133 .platform_data = &eth2_pd,
134 },
135};
136
137static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
138 &mv643xx_eth_shared_device,
139 &eth0_device,
140 &eth1_device,
141 &eth2_device,
142};
143
144static u8 __init exchange_bit(u8 val, u8 cs)
145{
146 /* place the data */
147 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
148 udelay(1);
149
150 /* turn the clock on */
151 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
152 udelay(1);
153
154 /* turn the clock off and read-strobe */
155 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
156
157 /* return the data */
158 return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
159}
160
161static void __init get_mac(char dest[6])
162{
163 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
164 int i,j;
165
166 for (i = 0; i < 12; i++)
167 exchange_bit(read_opcode[i], 1);
168
169 for (j = 0; j < 6; j++) {
170 dest[j] = 0;
171 for (i = 0; i < 8; i++) {
172 dest[j] <<= 1;
173 dest[j] |= exchange_bit(0, 1);
174 }
175 }
176
177 /* turn off CS */
178 exchange_bit(0,0);
179}
180
181/*
182 * Copy and increment ethernet MAC address by a small value.
183 *
184 * This is useful for systems where the only one MAC address is stored in
185 * non-volatile memory for multiple ports.
186 */
187static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
188 unsigned int add)
189{
190 int i;
191
192 BUG_ON(add >= 256);
193
194 for (i = ETH_ALEN; i >= 0; i--) {
195 dst[i] = src[i] + add;
196 add = dst[i] < src[i]; /* compute carry */
197 }
198
199 WARN_ON(add);
200}
201
202static int __init mv643xx_eth_add_pds(void)
203{
204 unsigned char mac[ETH_ALEN];
205 int ret;
206
207 get_mac(mac);
208 eth_mac_add(eth0_pd.mac_addr, mac, 0);
209 eth_mac_add(eth1_pd.mac_addr, mac, 1);
210 eth_mac_add(eth2_pd.mac_addr, mac, 2);
211 ret = platform_add_devices(mv643xx_eth_pd_devs,
212 ARRAY_SIZE(mv643xx_eth_pd_devs));
213
214 return ret;
215}
216
217device_initcall(mv643xx_eth_add_pds);
218
219#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
220
221#define OCELOT3_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
222
223static struct plat_serial8250_port uart8250_data[] = {
224 {
225 .membase = (signed long) 0xfd000020,
226 .irq = 6,
227 .uartclk = 20000000,
228 .iotype = UPIO_MEM,
229 .flags = OCELOT3_UART_FLAGS,
230 .regshift = 2,
231 },
232 { },
233};
234
235static struct platform_device uart8250_device = {
236 .name = "serial8250",
237 .id = PLAT8250_DEV_PLATFORM,
238 .dev = {
239 .platform_data = uart8250_data,
240 },
241};
242
243static int __init uart8250_init(void)
244{
245 return platform_device_register(&uart8250_device);
246}
247
248module_init(uart8250_init);
249
250MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
251MODULE_LICENSE("GPL");
252MODULE_DESCRIPTION("8250 UART probe driver for the Ocelot 3");
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c
deleted file mode 100644
index 8e02df63578a..000000000000
--- a/arch/mips/momentum/ocelot_3/prom.c
+++ /dev/null
@@ -1,189 +0,0 @@
1/*
2 * Copyright 2002 Momentum Computer Inc.
3 * Author: Matthew Dharm <mdharm@momenco.com>
4 *
5 * Louis Hamilton, Red Hat, Inc.
6 * hamilton@redhat.com [MIPS64 modifications]
7 *
8 * Copyright 2004 PMC-Sierra
9 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
10 *
11 * Based on Ocelot Linux port, which is
12 * Copyright 2001 MontaVista Software Inc.
13 * Author: jsun@mvista.com or jsun@junsun.net
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * Copyright (C) 2004 MontaVista Software Inc.
21 * Author: Manish Lachwani, mlachwani@mvista.com
22 *
23 */
24#include <linux/init.h>
25#include <linux/bootmem.h>
26#include <linux/mv643xx.h>
27
28#include <asm/addrspace.h>
29#include <asm/bootinfo.h>
30#include <asm/pmon.h>
31#include "ocelot_3_fpga.h"
32
33struct callvectors* debug_vectors;
34extern unsigned long marvell_base;
35extern unsigned long cpu_clock;
36
37const char *get_system_type(void)
38{
39 return "Momentum Ocelot-3";
40}
41
42#ifdef CONFIG_64BIT
43
44unsigned long signext(unsigned long addr)
45{
46 addr &= 0xffffffff;
47 return (unsigned long)((int)addr);
48}
49
50void *get_arg(unsigned long args, int arc)
51{
52 unsigned long ul;
53 unsigned char *puc, uc;
54
55 args += (arc * 4);
56 ul = (unsigned long)signext(args);
57 puc = (unsigned char *)ul;
58 if (puc == 0)
59 return (void *)0;
60
61#ifdef CONFIG_CPU_LITTLE_ENDIAN
62 uc = *puc++;
63 ul = (unsigned long)uc;
64 uc = *puc++;
65 ul |= (((unsigned long)uc) << 8);
66 uc = *puc++;
67 ul |= (((unsigned long)uc) << 16);
68 uc = *puc++;
69 ul |= (((unsigned long)uc) << 24);
70#else /* CONFIG_CPU_LITTLE_ENDIAN */
71 uc = *puc++;
72 ul = ((unsigned long)uc) << 24;
73 uc = *puc++;
74 ul |= (((unsigned long)uc) << 16);
75 uc = *puc++;
76 ul |= (((unsigned long)uc) << 8);
77 uc = *puc++;
78 ul |= ((unsigned long)uc);
79#endif /* CONFIG_CPU_LITTLE_ENDIAN */
80 ul = signext(ul);
81 return (void *)ul;
82}
83
84char *arg64(unsigned long addrin, int arg_index)
85{
86 unsigned long args;
87 char *p;
88
89 args = signext(addrin);
90 p = (char *)get_arg(args, arg_index);
91
92 return p;
93}
94#endif /* CONFIG_64BIT */
95
96void __init prom_init(void)
97{
98 int argc = fw_arg0;
99 char **arg = (char **) fw_arg1;
100 char **env = (char **) fw_arg2;
101 struct callvectors *cv = (struct callvectors *) fw_arg3;
102 int i;
103
104#ifdef CONFIG_64BIT
105 char *ptr;
106 printk("prom_init - MIPS64\n");
107
108 /* save the PROM vectors for debugging use */
109 debug_vectors = (struct callvectors *)signext((unsigned long)cv);
110
111 /* arg[0] is "g", the rest is boot parameters */
112 arcs_cmdline[0] = '\0';
113
114 for (i = 1; i < argc; i++) {
115 ptr = (char *)arg64((unsigned long)arg, i);
116 if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >=
117 sizeof(arcs_cmdline))
118 break;
119 strcat(arcs_cmdline, ptr);
120 strcat(arcs_cmdline, " ");
121 }
122 i = 0;
123
124 while (1) {
125 ptr = (char *)arg64((unsigned long)env, i);
126 if (! ptr)
127 break;
128
129 if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
130 marvell_base = simple_strtol(ptr + strlen("gtbase="),
131 NULL, 16);
132
133 if ((marvell_base & 0xffffffff00000000) == 0)
134 marvell_base |= 0xffffffff00000000;
135
136 printk("marvell_base set to 0x%016lx\n", marvell_base);
137 }
138 if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
139 cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
140 NULL, 10);
141 printk("cpu_clock set to %d\n", cpu_clock);
142 }
143 i++;
144 }
145 printk("arcs_cmdline: %s\n", arcs_cmdline);
146
147#else /* CONFIG_64BIT */
148
149 /* save the PROM vectors for debugging use */
150 debug_vectors = cv;
151
152 /* arg[0] is "g", the rest is boot parameters */
153 arcs_cmdline[0] = '\0';
154 for (i = 1; i < argc; i++) {
155 if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
156 >= sizeof(arcs_cmdline))
157 break;
158 strcat(arcs_cmdline, arg[i]);
159 strcat(arcs_cmdline, " ");
160 }
161
162 while (*env) {
163 if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
164 marvell_base = simple_strtol(*env + strlen("gtbase="),
165 NULL, 16);
166 }
167 if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
168 cpu_clock = simple_strtol(*env + strlen("cpuclock="),
169 NULL, 10);
170 }
171 env++;
172 }
173#endif /* CONFIG_64BIT */
174
175 mips_machgroup = MACH_GROUP_MOMENCO;
176 mips_machtype = MACH_MOMENCO_OCELOT_3;
177
178#ifndef CONFIG_64BIT
179 debug_vectors->printf("Booting Linux kernel...\n");
180#endif
181}
182
183void __init prom_free_prom_memory(void)
184{
185}
186
187void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
188{
189}
diff --git a/arch/mips/momentum/ocelot_3/reset.c b/arch/mips/momentum/ocelot_3/reset.c
deleted file mode 100644
index 9d86d2468376..000000000000
--- a/arch/mips/momentum/ocelot_3/reset.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * Copyright (C) 1997, 01, 05 Ralf Baechle
8 * Copyright 2001 MontaVista Software Inc.
9 * Author: jsun@mvista.com or jsun@junsun.net
10 *
11 * Copyright (C) 2002 Momentum Computer Inc.
12 * Author: Matthew Dharm <mdharm@momenco.com>
13 *
14 * Louis Hamilton, Red Hat, Inc.
15 * hamilton@redhat.com [MIPS64 modifications]
16 *
17 * Copyright 2004 PMC-Sierra
18 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
19 *
20 * Copyright (C) 2004 MontaVista Software Inc.
21 * Author: Manish Lachwani, mlachwani@mvista.com
22 */
23#include <linux/sched.h>
24#include <linux/mm.h>
25#include <linux/delay.h>
26#include <asm/io.h>
27#include <asm/pgtable.h>
28#include <asm/processor.h>
29#include <asm/reboot.h>
30#include <asm/system.h>
31
32void momenco_ocelot_restart(char *command)
33{
34 /* base address of timekeeper portion of part */
35 void *nvram = (void *) 0xfc807000L;
36
37 /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */
38 writeb(0x84, nvram + 0xff7);
39
40 /* wait for the watchdog to go off */
41 mdelay(100+(1000/16));
42
43 /* if the watchdog fails for some reason, let people know */
44 printk(KERN_NOTICE "Watchdog reset failed\n");
45}
46
47void momenco_ocelot_halt(void)
48{
49 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
50 while (1)
51 __asm__(".set\tmips3\n\t"
52 "wait\n\t"
53 ".set\tmips0");
54}
55
56void momenco_ocelot_power_off(void)
57{
58 momenco_ocelot_halt();
59}
diff --git a/arch/mips/momentum/ocelot_3/setup.c b/arch/mips/momentum/ocelot_3/setup.c
deleted file mode 100644
index ff0829f81116..000000000000
--- a/arch/mips/momentum/ocelot_3/setup.c
+++ /dev/null
@@ -1,398 +0,0 @@
1/*
2 * setup.c
3 *
4 * BRIEF MODULE DESCRIPTION
5 * Momentum Computer Ocelot-3 board dependent boot routines
6 *
7 * Copyright (C) 1996, 1997, 01, 05 - 06 Ralf Baechle
8 * Copyright (C) 2000 RidgeRun, Inc.
9 * Copyright (C) 2001 Red Hat, Inc.
10 * Copyright (C) 2002 Momentum Computer
11 *
12 * Author: Matthew Dharm, Momentum Computer
13 * mdharm@momenco.com
14 *
15 * Louis Hamilton, Red Hat, Inc.
16 * hamilton@redhat.com [MIPS64 modifications]
17 *
18 * Author: RidgeRun, Inc.
19 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
20 *
21 * Copyright 2001 MontaVista Software Inc.
22 * Author: jsun@mvista.com or jsun@junsun.net
23 *
24 * Copyright 2004 PMC-Sierra
25 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
26 *
27 * Copyright (C) 2004 MontaVista Software Inc.
28 * Author: Manish Lachwani, mlachwani@mvista.com
29 *
30 * This program is free software; you can redistribute it and/or modify it
31 * under the terms of the GNU General Public License as published by the
32 * Free Software Foundation; either version 2 of the License, or (at your
33 * option) any later version.
34 *
35 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
36 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
37 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
38 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
39 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
40 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
41 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
42 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
44 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 * You should have received a copy of the GNU General Public License along
47 * with this program; if not, write to the Free Software Foundation, Inc.,
48 * 675 Mass Ave, Cambridge, MA 02139, USA.
49 */
50#include <linux/init.h>
51#include <linux/kernel.h>
52#include <linux/types.h>
53#include <linux/mc146818rtc.h>
54#include <linux/ioport.h>
55#include <linux/interrupt.h>
56#include <linux/pci.h>
57#include <linux/timex.h>
58#include <linux/bootmem.h>
59#include <linux/mv643xx.h>
60#include <linux/pm.h>
61#include <linux/bcd.h>
62
63#include <asm/time.h>
64#include <asm/page.h>
65#include <asm/bootinfo.h>
66#include <asm/io.h>
67#include <asm/irq.h>
68#include <asm/pci.h>
69#include <asm/processor.h>
70#include <asm/reboot.h>
71#include <asm/mc146818rtc.h>
72#include <asm/tlbflush.h>
73#include "ocelot_3_fpga.h"
74
75/* Marvell Discovery Register Base */
76unsigned long marvell_base = (signed)0xf4000000;
77
78/* CPU clock */
79unsigned long cpu_clock;
80
81/* RTC/NVRAM */
82unsigned char* rtc_base = (unsigned char*)(signed)0xfc800000;
83
84/* FPGA Base */
85unsigned long ocelot_fpga_base = (signed)0xfc000000;
86
87/* Serial base */
88unsigned long uart_base = (signed)0xfd000000;
89
90/*
91 * Marvell Discovery SRAM. This is one place where Ethernet
92 * Tx and Rx descriptors can be placed to improve performance
93 */
94extern unsigned long mv64340_sram_base;
95
96/* These functions are used for rebooting or halting the machine*/
97extern void momenco_ocelot_restart(char *command);
98extern void momenco_ocelot_halt(void);
99extern void momenco_ocelot_power_off(void);
100
101void momenco_time_init(void);
102static char reset_reason;
103
104void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
105 unsigned long entryhi, unsigned long pagemask);
106
107static inline unsigned long ENTRYLO(unsigned long paddr)
108{
109 return ((paddr & PAGE_MASK) |
110 (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL |
111 _CACHE_UNCACHED)) >> 6;
112}
113
114void __init bus_error_init(void)
115{
116 /* nothing */
117}
118
119/*
120 * setup code for a handoff from a version 2 PMON 2000 PROM
121 */
122void setup_wired_tlb_entries(void)
123{
124 write_c0_wired(0);
125 local_flush_tlb_all();
126
127 /* marvell and extra space */
128 add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), (signed)0xf4000000, PM_64K);
129
130 /* fpga, rtc, and uart */
131 add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), (signed)0xfc000000, PM_16M);
132}
133
134unsigned long m48t37y_get_time(void)
135{
136 unsigned int year, month, day, hour, min, sec;
137 unsigned long flags;
138
139 spin_lock_irqsave(&rtc_lock, flags);
140 /* stop the update */
141 rtc_base[0x7ff8] = 0x40;
142
143 year = BCD2BIN(rtc_base[0x7fff]);
144 year += BCD2BIN(rtc_base[0x7ff1]) * 100;
145
146 month = BCD2BIN(rtc_base[0x7ffe]);
147
148 day = BCD2BIN(rtc_base[0x7ffd]);
149
150 hour = BCD2BIN(rtc_base[0x7ffb]);
151 min = BCD2BIN(rtc_base[0x7ffa]);
152 sec = BCD2BIN(rtc_base[0x7ff9]);
153
154 /* start the update */
155 rtc_base[0x7ff8] = 0x00;
156 spin_unlock_irqrestore(&rtc_lock, flags);
157
158 return mktime(year, month, day, hour, min, sec);
159}
160
161int m48t37y_set_time(unsigned long sec)
162{
163 struct rtc_time tm;
164 unsigned long flags;
165
166 /* convert to a more useful format -- note months count from 0 */
167 to_tm(sec, &tm);
168 tm.tm_mon += 1;
169
170 spin_lock_irqsave(&rtc_lock, flags);
171 /* enable writing */
172 rtc_base[0x7ff8] = 0x80;
173
174 /* year */
175 rtc_base[0x7fff] = BIN2BCD(tm.tm_year % 100);
176 rtc_base[0x7ff1] = BIN2BCD(tm.tm_year / 100);
177
178 /* month */
179 rtc_base[0x7ffe] = BIN2BCD(tm.tm_mon);
180
181 /* day */
182 rtc_base[0x7ffd] = BIN2BCD(tm.tm_mday);
183
184 /* hour/min/sec */
185 rtc_base[0x7ffb] = BIN2BCD(tm.tm_hour);
186 rtc_base[0x7ffa] = BIN2BCD(tm.tm_min);
187 rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec);
188
189 /* day of week -- not really used, but let's keep it up-to-date */
190 rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1);
191
192 /* disable writing */
193 rtc_base[0x7ff8] = 0x00;
194 spin_unlock_irqrestore(&rtc_lock, flags);
195
196 return 0;
197}
198
199void __init plat_timer_setup(struct irqaction *irq)
200{
201 setup_irq(7, irq); /* Timer interrupt, unmask status IM7 */
202}
203
204void momenco_time_init(void)
205{
206 setup_wired_tlb_entries();
207
208 /*
209 * Ocelot-3 board has been built with both
210 * the Rm7900 and the Rm7065C
211 */
212 mips_hpt_frequency = cpu_clock / 2;
213
214 rtc_mips_get_time = m48t37y_get_time;
215 rtc_mips_set_time = m48t37y_set_time;
216}
217
218/*
219 * PCI Support for Ocelot-3
220 */
221
222/* Bus #0 IO and MEM space */
223#define OCELOT_3_PCI_IO_0_START 0xe0000000
224#define OCELOT_3_PCI_IO_0_SIZE 0x08000000
225#define OCELOT_3_PCI_MEM_0_START 0xc0000000
226#define OCELOT_3_PCI_MEM_0_SIZE 0x10000000
227
228/* Bus #1 IO and MEM space */
229#define OCELOT_3_PCI_IO_1_START 0xe8000000
230#define OCELOT_3_PCI_IO_1_SIZE 0x08000000
231#define OCELOT_3_PCI_MEM_1_START 0xd0000000
232#define OCELOT_3_PCI_MEM_1_SIZE 0x10000000
233
234static struct resource mv_pci_io_mem0_resource = {
235 .name = "MV64340 PCI0 IO MEM",
236 .start = OCELOT_3_PCI_IO_0_START,
237 .end = OCELOT_3_PCI_IO_0_START + OCELOT_3_PCI_IO_0_SIZE - 1,
238 .flags = IORESOURCE_IO,
239};
240
241static struct resource mv_pci_io_mem1_resource = {
242 .name = "MV64340 PCI1 IO MEM",
243 .start = OCELOT_3_PCI_IO_1_START,
244 .end = OCELOT_3_PCI_IO_1_START + OCELOT_3_PCI_IO_1_SIZE - 1,
245 .flags = IORESOURCE_IO,
246};
247
248static struct resource mv_pci_mem0_resource = {
249 .name = "MV64340 PCI0 MEM",
250 .start = OCELOT_3_PCI_MEM_0_START,
251 .end = OCELOT_3_PCI_MEM_0_START + OCELOT_3_PCI_MEM_0_SIZE - 1,
252 .flags = IORESOURCE_MEM,
253};
254
255static struct resource mv_pci_mem1_resource = {
256 .name = "MV64340 PCI1 MEM",
257 .start = OCELOT_3_PCI_MEM_1_START,
258 .end = OCELOT_3_PCI_MEM_1_START + OCELOT_3_PCI_MEM_1_SIZE - 1,
259 .flags = IORESOURCE_MEM,
260};
261
262static struct mv_pci_controller mv_bus0_controller = {
263 .pcic = {
264 .pci_ops = &mv_pci_ops,
265 .mem_resource = &mv_pci_mem0_resource,
266 .io_resource = &mv_pci_io_mem0_resource,
267 },
268 .config_addr = MV64340_PCI_0_CONFIG_ADDR,
269 .config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG,
270};
271
272static struct mv_pci_controller mv_bus1_controller = {
273 .pcic = {
274 .pci_ops = &mv_pci_ops,
275 .mem_resource = &mv_pci_mem1_resource,
276 .io_resource = &mv_pci_io_mem1_resource,
277 },
278 .config_addr = MV64340_PCI_1_CONFIG_ADDR,
279 .config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG,
280};
281
282static __init int __init ja_pci_init(void)
283{
284 uint32_t enable;
285 extern int pci_probe_only;
286
287 /* PMON will assign PCI resources */
288 pci_probe_only = 1;
289
290 enable = ~MV_READ(MV64340_BASE_ADDR_ENABLE);
291 /*
292 * We require at least one enabled I/O or PCI memory window or we
293 * will ignore this PCI bus. We ignore PCI windows 1, 2 and 3.
294 */
295 if (enable & (0x01 << 9) || enable & (0x01 << 10))
296 register_pci_controller(&mv_bus0_controller.pcic);
297
298 if (enable & (0x01 << 14) || enable & (0x01 << 15))
299 register_pci_controller(&mv_bus1_controller.pcic);
300
301 ioport_resource.end = OCELOT_3_PCI_IO_0_START + OCELOT_3_PCI_IO_0_SIZE +
302 OCELOT_3_PCI_IO_1_SIZE - 1;
303
304 iomem_resource.end = OCELOT_3_PCI_MEM_0_START + OCELOT_3_PCI_MEM_0_SIZE +
305 OCELOT_3_PCI_MEM_1_SIZE - 1;
306
307 set_io_port_base(OCELOT_3_PCI_IO_0_START); /* mips_io_port_base */
308
309 return 0;
310}
311
312arch_initcall(ja_pci_init);
313
314void __init plat_mem_setup(void)
315{
316 unsigned int tmpword;
317
318 board_time_init = momenco_time_init;
319
320 _machine_restart = momenco_ocelot_restart;
321 _machine_halt = momenco_ocelot_halt;
322 pm_power_off = momenco_ocelot_power_off;
323
324 /* Wired TLB entries */
325 setup_wired_tlb_entries();
326
327 /* shut down ethernet ports, just to be sure our memory doesn't get
328 * corrupted by random ethernet traffic.
329 */
330 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
331 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
332 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
333 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
334 do {}
335 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
336 do {}
337 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
338 do {}
339 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
340 do {}
341 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
342 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0),
343 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
344 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1),
345 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
346
347 /* Turn off the Bit-Error LED */
348 OCELOT_FPGA_WRITE(0x80, CLR);
349
350 tmpword = OCELOT_FPGA_READ(BOARDREV);
351 if (tmpword < 26)
352 printk("Momenco Ocelot-3: Board Assembly Rev. %c\n",
353 'A'+tmpword);
354 else
355 printk("Momenco Ocelot-3: Board Assembly Revision #0x%x\n",
356 tmpword);
357
358 tmpword = OCELOT_FPGA_READ(FPGA_REV);
359 printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15);
360 tmpword = OCELOT_FPGA_READ(RESET_STATUS);
361 printk("Reset reason: 0x%x\n", tmpword);
362 switch (tmpword) {
363 case 0x1:
364 printk(" - Power-up reset\n");
365 break;
366 case 0x2:
367 printk(" - Push-button reset\n");
368 break;
369 case 0x4:
370 printk(" - cPCI bus reset\n");
371 break;
372 case 0x8:
373 printk(" - Watchdog reset\n");
374 break;
375 case 0x10:
376 printk(" - Software reset\n");
377 break;
378 default:
379 printk(" - Unknown reset cause\n");
380 }
381 reset_reason = tmpword;
382 OCELOT_FPGA_WRITE(0xff, RESET_STATUS);
383
384 tmpword = OCELOT_FPGA_READ(CPCI_ID);
385 printk("cPCI ID register: 0x%02x\n", tmpword);
386 printk(" - Slot number: %d\n", tmpword & 0x1f);
387 printk(" - PCI bus present: %s\n", tmpword & 0x40 ? "yes" : "no");
388 printk(" - System Slot: %s\n", tmpword & 0x20 ? "yes" : "no");
389
390 tmpword = OCELOT_FPGA_READ(BOARD_STATUS);
391 printk("Board Status register: 0x%02x\n", tmpword);
392 printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent");
393 printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent");
394 printk(" - L3 cache size: %d MB\n", (1<<((tmpword&12) >> 2))&~1);
395
396 /* Support for 128 MB memory */
397 add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM);
398}
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index cfebf58c8dc6..f26ede001a0b 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -9,7 +9,6 @@ obj-y += pci.o pci-dac.o
9# 9#
10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o 10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o 11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
12obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
13obj-$(CONFIG_MIPS_MSC) += ops-msc.o 12obj-$(CONFIG_MIPS_MSC) += ops-msc.o
14obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o 13obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
15obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o 14obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
@@ -29,7 +28,6 @@ obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
29obj-$(CONFIG_LEMOTE_FULONG) += fixup-lm2e.o ops-bonito64.o 28obj-$(CONFIG_LEMOTE_FULONG) += fixup-lm2e.o ops-bonito64.o
30obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o 29obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
31obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o 30obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o
32obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o
33obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o 31obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o
34obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o 32obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o
35obj-$(CONFIG_PMC_MSP7120_FPGA) += fixup-pmcmsp.o ops-pmcmsp.o 33obj-$(CONFIG_PMC_MSP7120_FPGA) += fixup-pmcmsp.o ops-pmcmsp.o
diff --git a/arch/mips/pci/fixup-ocelot3.c b/arch/mips/pci/fixup-ocelot3.c
deleted file mode 100644
index 702f997b8673..000000000000
--- a/arch/mips/pci/fixup-ocelot3.c
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004 Montavista Software Inc.
7 * Author: Manish Lachwani (mlachwani@mvista.com)
8 *
9 * Looking at the schematics for the Ocelot-3 board, there are
10 * two PCI busses and each bus has two PCI slots.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <asm/mipsregs.h>
16
17/*
18 * Do platform specific device initialization at
19 * pci_enable_device() time
20 */
21int pcibios_plat_dev_init(struct pci_dev *dev)
22{
23 return 0;
24}
25
26int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
27{
28 int bus = dev->bus->number;
29
30 if (bus == 0 && slot == 1)
31 return 2; /* PCI-X A */
32 if (bus == 0 && slot == 2)
33 return 3; /* PCI-X B */
34 if (bus == 1 && slot == 1)
35 return 4; /* PCI A */
36 if (bus == 1 && slot == 2)
37 return 5; /* PCI B */
38
39return 0;
40 panic("Whooops in pcibios_map_irq");
41}
diff --git a/arch/mips/pci/ops-marvell.c b/arch/mips/pci/ops-marvell.c
deleted file mode 100644
index 1ac5c59199d1..000000000000
--- a/arch/mips/pci/ops-marvell.c
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
7 */
8#include <linux/kernel.h>
9#include <linux/types.h>
10#include <linux/pci.h>
11
12#include <asm/marvell.h>
13
14static int mv_read_config(struct pci_bus *bus, unsigned int devfn,
15 int where, int size, u32 * val)
16{
17 struct mv_pci_controller *mvbc = bus->sysdata;
18 unsigned long address_reg, data_reg;
19 u32 address;
20
21 address_reg = mvbc->config_addr;
22 data_reg = mvbc->config_vreg;
23
24 /* Accessing device 31 crashes those Marvells. Since years.
25 Will they ever make sane controllers ... */
26 if (PCI_SLOT(devfn) == 31)
27 return PCIBIOS_DEVICE_NOT_FOUND;
28
29 address = (bus->number << 16) | (devfn << 8) |
30 (where & 0xfc) | 0x80000000;
31
32 /* start the configuration cycle */
33 MV_WRITE(address_reg, address);
34
35 switch (size) {
36 case 1:
37 *val = MV_READ_8(data_reg + (where & 0x3));
38 break;
39
40 case 2:
41 *val = MV_READ_16(data_reg + (where & 0x3));
42 break;
43
44 case 4:
45 *val = MV_READ(data_reg);
46 break;
47 }
48
49 return PCIBIOS_SUCCESSFUL;
50}
51
52static int mv_write_config(struct pci_bus *bus, unsigned int devfn,
53 int where, int size, u32 val)
54{
55 struct mv_pci_controller *mvbc = bus->sysdata;
56 unsigned long address_reg, data_reg;
57 u32 address;
58
59 address_reg = mvbc->config_addr;
60 data_reg = mvbc->config_vreg;
61
62 /* Accessing device 31 crashes those Marvells. Since years.
63 Will they ever make sane controllers ... */
64 if (PCI_SLOT(devfn) == 31)
65 return PCIBIOS_DEVICE_NOT_FOUND;
66
67 address = (bus->number << 16) | (devfn << 8) |
68 (where & 0xfc) | 0x80000000;
69
70 /* start the configuration cycle */
71 MV_WRITE(address_reg, address);
72
73 switch (size) {
74 case 1:
75 MV_WRITE_8(data_reg + (where & 0x3), val);
76 break;
77
78 case 2:
79 MV_WRITE_16(data_reg + (where & 0x3), val);
80 break;
81
82 case 4:
83 MV_WRITE(data_reg, val);
84 break;
85 }
86
87 return PCIBIOS_SUCCESSFUL;
88}
89
90struct pci_ops mv_pci_ops = {
91 .read = mv_read_config,
92 .write = mv_write_config
93};