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authorRusty Russell <rusty@rustcorp.com.au>2009-09-24 11:34:50 -0400
committerRusty Russell <rusty@rustcorp.com.au>2009-09-23 20:04:51 -0400
commit55b8cab49dd43d227f0dd49e3524406fdc46d37b (patch)
treed12ddec7ae2ee5f0dd2d8dbea84ec834a0f42c53 /arch/mips
parent7ce1df49e1b1b004ff15fb0af9a02c6b1ff71f70 (diff)
cpumask: use mm_cpumask() wrapper: mips
Makes code futureproof against the impending change to mm->cpu_vm_mask. It's also a chance to use the new cpumask_ ops which take a pointer (the older ones are deprecated, but there's no hurry for arch code). Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/mmu_context.h10
-rw-r--r--arch/mips/mm/c-octeon.c2
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index d3bea88d8744..d9743536a621 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -178,8 +178,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
178 * Mark current->active_mm as not "active" anymore. 178 * Mark current->active_mm as not "active" anymore.
179 * We don't want to mislead possible IPI tlb flush routines. 179 * We don't want to mislead possible IPI tlb flush routines.
180 */ 180 */
181 cpu_clear(cpu, prev->cpu_vm_mask); 181 cpumask_clear_cpu(cpu, mm_cpumask(prev));
182 cpu_set(cpu, next->cpu_vm_mask); 182 cpumask_set_cpu(cpu, mm_cpumask(next));
183 183
184 local_irq_restore(flags); 184 local_irq_restore(flags);
185} 185}
@@ -235,8 +235,8 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
235 TLBMISS_HANDLER_SETUP_PGD(next->pgd); 235 TLBMISS_HANDLER_SETUP_PGD(next->pgd);
236 236
237 /* mark mmu ownership change */ 237 /* mark mmu ownership change */
238 cpu_clear(cpu, prev->cpu_vm_mask); 238 cpumask_clear_cpu(cpu, mm_cpumask(prev));
239 cpu_set(cpu, next->cpu_vm_mask); 239 cpumask_set_cpu(cpu, mm_cpumask(next));
240 240
241 local_irq_restore(flags); 241 local_irq_restore(flags);
242} 242}
@@ -258,7 +258,7 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
258 258
259 local_irq_save(flags); 259 local_irq_save(flags);
260 260
261 if (cpu_isset(cpu, mm->cpu_vm_mask)) { 261 if (cpumask_test_cpu(cpu, mm_cpumask(mm))) {
262 get_new_mmu_context(mm, cpu); 262 get_new_mmu_context(mm, cpu);
263#ifdef CONFIG_MIPS_MT_SMTC 263#ifdef CONFIG_MIPS_MT_SMTC
264 /* See comments for similar code above */ 264 /* See comments for similar code above */
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index 10ab69f7183f..94e05e5733c1 100644
--- a/arch/mips/mm/c-octeon.c
+++ b/arch/mips/mm/c-octeon.c
@@ -79,7 +79,7 @@ static void octeon_flush_icache_all_cores(struct vm_area_struct *vma)
79 * cores it has been used on 79 * cores it has been used on
80 */ 80 */
81 if (vma) 81 if (vma)
82 mask = vma->vm_mm->cpu_vm_mask; 82 mask = *mm_cpumask(vma->vm_mm);
83 else 83 else
84 mask = cpu_online_map; 84 mask = cpu_online_map;
85 cpu_clear(cpu, mask); 85 cpu_clear(cpu, mask);