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authorLinus Torvalds <torvalds@linux-foundation.org>2013-07-09 21:24:39 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-09 21:24:39 -0400
commit496322bc91e35007ed754184dcd447a02b6dd685 (patch)
treef5298d0a74c0a6e65c0e98050b594b8d020904c1 /arch/mips
parent2e17c5a97e231f3cb426f4b7895eab5be5c5442e (diff)
parent56e0ef527b184b3de2d7f88c6190812b2b2ac6bf (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller: "This is a re-do of the net-next pull request for the current merge window. The only difference from the one I made the other day is that this has Eliezer's interface renames and the timeout handling changes made based upon your feedback, as well as a few bug fixes that have trickeled in. Highlights: 1) Low latency device polling, eliminating the cost of interrupt handling and context switches. Allows direct polling of a network device from socket operations, such as recvmsg() and poll(). Currently ixgbe, mlx4, and bnx2x support this feature. Full high level description, performance numbers, and design in commit 0a4db187a999 ("Merge branch 'll_poll'") From Eliezer Tamir. 2) With the routing cache removed, ip_check_mc_rcu() gets exercised more than ever before in the case where we have lots of multicast addresses. Use a hash table instead of a simple linked list, from Eric Dumazet. 3) Add driver for Atheros CQA98xx 802.11ac wireless devices, from Bartosz Markowski, Janusz Dziedzic, Kalle Valo, Marek Kwaczynski, Marek Puzyniak, Michal Kazior, and Sujith Manoharan. 4) Support reporting the TUN device persist flag to userspace, from Pavel Emelyanov. 5) Allow controlling network device VF link state using netlink, from Rony Efraim. 6) Support GRE tunneling in openvswitch, from Pravin B Shelar. 7) Adjust SOCK_MIN_RCVBUF and SOCK_MIN_SNDBUF for modern times, from Daniel Borkmann and Eric Dumazet. 8) Allow controlling of TCP quickack behavior on a per-route basis, from Cong Wang. 9) Several bug fixes and improvements to vxlan from Stephen Hemminger, Pravin B Shelar, and Mike Rapoport. In particular, support receiving on multiple UDP ports. 10) Major cleanups, particular in the area of debugging and cookie lifetime handline, to the SCTP protocol code. From Daniel Borkmann. 11) Allow packets to cross network namespaces when traversing tunnel devices. From Nicolas Dichtel. 12) Allow monitoring netlink traffic via AF_PACKET sockets, in a manner akin to how we monitor real network traffic via ptype_all. From Daniel Borkmann. 13) Several bug fixes and improvements for the new alx device driver, from Johannes Berg. 14) Fix scalability issues in the netem packet scheduler's time queue, by using an rbtree. From Eric Dumazet. 15) Several bug fixes in TCP loss recovery handling, from Yuchung Cheng. 16) Add support for GSO segmentation of MPLS packets, from Simon Horman. 17) Make network notifiers have a real data type for the opaque pointer that's passed into them. Use this to properly handle network device flag changes in arp_netdev_event(). From Jiri Pirko and Timo Teräs. 18) Convert several drivers over to module_pci_driver(), from Peter Huewe. 19) tcp_fixup_rcvbuf() can loop 500 times over loopback, just use a O(1) calculation instead. From Eric Dumazet. 20) Support setting of explicit tunnel peer addresses in ipv6, just like ipv4. From Nicolas Dichtel. 21) Protect x86 BPF JIT against spraying attacks, from Eric Dumazet. 22) Prevent a single high rate flow from overruning an individual cpu during RX packet processing via selective flow shedding. From Willem de Bruijn. 23) Don't use spinlocks in TCP md5 signing fast paths, from Eric Dumazet. 24) Don't just drop GSO packets which are above the TBF scheduler's burst limit, chop them up so they are in-bounds instead. Also from Eric Dumazet. 25) VLAN offloads are missed when configured on top of a bridge, fix from Vlad Yasevich. 26) Support IPV6 in ping sockets. From Lorenzo Colitti. 27) Receive flow steering targets should be updated at poll() time too, from David Majnemer. 28) Fix several corner case regressions in PMTU/redirect handling due to the routing cache removal, from Timo Teräs. 29) We have to be mindful of ipv4 mapped ipv6 sockets in upd_v6_push_pending_frames(). From Hannes Frederic Sowa. 30) Fix L2TP sequence number handling bugs, from James Chapman." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1214 commits) drivers/net: caif: fix wrong rtnl_is_locked() usage drivers/net: enic: release rtnl_lock on error-path vhost-net: fix use-after-free in vhost_net_flush net: mv643xx_eth: do not use port number as platform device id net: sctp: confirm route during forward progress virtio_net: fix race in RX VQ processing virtio: support unlocked queue poll net/cadence/macb: fix bug/typo in extracting gem_irq_read_clear bit Documentation: Fix references to defunct linux-net@vger.kernel.org net/fs: change busy poll time accounting net: rename low latency sockets functions to busy poll bridge: fix some kernel warning in multicast timer sfc: Fix memory leak when discarding scattered packets sit: fix tunnel update via netlink dt:net:stmmac: Add dt specific phy reset callback support. dt:net:stmmac: Add support to dwmac version 3.610 and 3.710 dt:net:stmmac: Allocate platform data only if its NULL. net:stmmac: fix memleak in the open method ipv6: rt6_check_neigh should successfully verify neigh if no NUD information are available net: ipv6: fix wrong ping_v6_sendmsg return value ...
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/bcm63xx/boards/board_bcm963xx.c4
-rw-r--r--arch/mips/bcm63xx/dev-enet.c181
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h7
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h122
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h93
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h2
-rw-r--r--arch/mips/include/uapi/asm/socket.h2
-rw-r--r--arch/mips/txx9/generic/setup_tx4939.c3
8 files changed, 389 insertions, 25 deletions
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index a9505c4867e8..9c0ddafafb6c 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -845,6 +845,10 @@ int __init board_register_devices(void)
845 !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) 845 !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
846 bcm63xx_enet_register(1, &board.enet1); 846 bcm63xx_enet_register(1, &board.enet1);
847 847
848 if (board.has_enetsw &&
849 !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
850 bcm63xx_enetsw_register(&board.enetsw);
851
848 if (board.has_usbd) 852 if (board.has_usbd)
849 bcm63xx_usbd_register(&board.usbd); 853 bcm63xx_usbd_register(&board.usbd);
850 854
diff --git a/arch/mips/bcm63xx/dev-enet.c b/arch/mips/bcm63xx/dev-enet.c
index 39c23366c5c7..52bc01df9bfe 100644
--- a/arch/mips/bcm63xx/dev-enet.c
+++ b/arch/mips/bcm63xx/dev-enet.c
@@ -9,16 +9,60 @@
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/export.h>
12#include <bcm63xx_dev_enet.h> 13#include <bcm63xx_dev_enet.h>
13#include <bcm63xx_io.h> 14#include <bcm63xx_io.h>
14#include <bcm63xx_regs.h> 15#include <bcm63xx_regs.h>
15 16
17#ifdef BCMCPU_RUNTIME_DETECT
18static const unsigned long bcm6348_regs_enetdmac[] = {
19 [ENETDMAC_CHANCFG] = ENETDMAC_CHANCFG_REG,
20 [ENETDMAC_IR] = ENETDMAC_IR_REG,
21 [ENETDMAC_IRMASK] = ENETDMAC_IRMASK_REG,
22 [ENETDMAC_MAXBURST] = ENETDMAC_MAXBURST_REG,
23};
24
25static const unsigned long bcm6345_regs_enetdmac[] = {
26 [ENETDMAC_CHANCFG] = ENETDMA_6345_CHANCFG_REG,
27 [ENETDMAC_IR] = ENETDMA_6345_IR_REG,
28 [ENETDMAC_IRMASK] = ENETDMA_6345_IRMASK_REG,
29 [ENETDMAC_MAXBURST] = ENETDMA_6345_MAXBURST_REG,
30 [ENETDMAC_BUFALLOC] = ENETDMA_6345_BUFALLOC_REG,
31 [ENETDMAC_RSTART] = ENETDMA_6345_RSTART_REG,
32 [ENETDMAC_FC] = ENETDMA_6345_FC_REG,
33 [ENETDMAC_LEN] = ENETDMA_6345_LEN_REG,
34};
35
36const unsigned long *bcm63xx_regs_enetdmac;
37EXPORT_SYMBOL(bcm63xx_regs_enetdmac);
38
39static __init void bcm63xx_enetdmac_regs_init(void)
40{
41 if (BCMCPU_IS_6345())
42 bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac;
43 else
44 bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
45}
46#else
47static __init void bcm63xx_enetdmac_regs_init(void) { }
48#endif
49
16static struct resource shared_res[] = { 50static struct resource shared_res[] = {
17 { 51 {
18 .start = -1, /* filled at runtime */ 52 .start = -1, /* filled at runtime */
19 .end = -1, /* filled at runtime */ 53 .end = -1, /* filled at runtime */
20 .flags = IORESOURCE_MEM, 54 .flags = IORESOURCE_MEM,
21 }, 55 },
56 {
57 .start = -1, /* filled at runtime */
58 .end = -1, /* filled at runtime */
59 .flags = IORESOURCE_MEM,
60 },
61 {
62 .start = -1, /* filled at runtime */
63 .end = -1, /* filled at runtime */
64 .flags = IORESOURCE_MEM,
65 },
22}; 66};
23 67
24static struct platform_device bcm63xx_enet_shared_device = { 68static struct platform_device bcm63xx_enet_shared_device = {
@@ -94,6 +138,71 @@ static struct platform_device bcm63xx_enet1_device = {
94 }, 138 },
95}; 139};
96 140
141static struct resource enetsw_res[] = {
142 {
143 /* start & end filled at runtime */
144 .flags = IORESOURCE_MEM,
145 },
146 {
147 /* start filled at runtime */
148 .flags = IORESOURCE_IRQ,
149 },
150 {
151 /* start filled at runtime */
152 .flags = IORESOURCE_IRQ,
153 },
154};
155
156static struct bcm63xx_enetsw_platform_data enetsw_pd;
157
158static struct platform_device bcm63xx_enetsw_device = {
159 .name = "bcm63xx_enetsw",
160 .num_resources = ARRAY_SIZE(enetsw_res),
161 .resource = enetsw_res,
162 .dev = {
163 .platform_data = &enetsw_pd,
164 },
165};
166
167static int __init register_shared(void)
168{
169 int ret, chan_count;
170
171 if (shared_device_registered)
172 return 0;
173
174 bcm63xx_enetdmac_regs_init();
175
176 shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
177 shared_res[0].end = shared_res[0].start;
178 if (BCMCPU_IS_6345())
179 shared_res[0].end += (RSET_6345_ENETDMA_SIZE) - 1;
180 else
181 shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
182
183 if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
184 chan_count = 32;
185 else if (BCMCPU_IS_6345())
186 chan_count = 8;
187 else
188 chan_count = 16;
189
190 shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
191 shared_res[1].end = shared_res[1].start;
192 shared_res[1].end += RSET_ENETDMAC_SIZE(chan_count) - 1;
193
194 shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
195 shared_res[2].end = shared_res[2].start;
196 shared_res[2].end += RSET_ENETDMAS_SIZE(chan_count) - 1;
197
198 ret = platform_device_register(&bcm63xx_enet_shared_device);
199 if (ret)
200 return ret;
201 shared_device_registered = 1;
202
203 return 0;
204}
205
97int __init bcm63xx_enet_register(int unit, 206int __init bcm63xx_enet_register(int unit,
98 const struct bcm63xx_enet_platform_data *pd) 207 const struct bcm63xx_enet_platform_data *pd)
99{ 208{
@@ -104,22 +213,12 @@ int __init bcm63xx_enet_register(int unit,
104 if (unit > 1) 213 if (unit > 1)
105 return -ENODEV; 214 return -ENODEV;
106 215
107 if (unit == 1 && BCMCPU_IS_6338()) 216 if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345()))
108 return -ENODEV; 217 return -ENODEV;
109 218
110 if (!shared_device_registered) { 219 ret = register_shared();
111 shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA); 220 if (ret)
112 shared_res[0].end = shared_res[0].start; 221 return ret;
113 if (BCMCPU_IS_6338())
114 shared_res[0].end += (RSET_ENETDMA_SIZE / 2) - 1;
115 else
116 shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
117
118 ret = platform_device_register(&bcm63xx_enet_shared_device);
119 if (ret)
120 return ret;
121 shared_device_registered = 1;
122 }
123 222
124 if (unit == 0) { 223 if (unit == 0) {
125 enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0); 224 enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
@@ -155,8 +254,62 @@ int __init bcm63xx_enet_register(int unit,
155 dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY); 254 dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
156 } 255 }
157 256
257 dpd->dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
258 dpd->dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
259 if (BCMCPU_IS_6345()) {
260 dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_CHAINING_MASK;
261 dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_WRAP_EN_MASK;
262 dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_FLOWC_EN_MASK;
263 dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK;
264 dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK;
265 dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH;
266 dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT;
267 } else {
268 dpd->dma_has_sram = true;
269 dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
270 }
271
158 ret = platform_device_register(pdev); 272 ret = platform_device_register(pdev);
159 if (ret) 273 if (ret)
160 return ret; 274 return ret;
161 return 0; 275 return 0;
162} 276}
277
278int __init
279bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd)
280{
281 int ret;
282
283 if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
284 return -ENODEV;
285
286 ret = register_shared();
287 if (ret)
288 return ret;
289
290 enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW);
291 enetsw_res[0].end = enetsw_res[0].start;
292 enetsw_res[0].end += RSET_ENETSW_SIZE - 1;
293 enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0);
294 enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0);
295 if (!enetsw_res[2].start)
296 enetsw_res[2].start = -1;
297
298 memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
299
300 if (BCMCPU_IS_6328())
301 enetsw_pd.num_ports = ENETSW_PORTS_6328;
302 else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
303 enetsw_pd.num_ports = ENETSW_PORTS_6368;
304
305 enetsw_pd.dma_has_sram = true;
306 enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
307 enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
308 enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
309
310 ret = platform_device_register(&bcm63xx_enetsw_device);
311 if (ret)
312 return ret;
313
314 return 0;
315}
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
index 336228990808..e6e65dc7d502 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -173,7 +173,10 @@ enum bcm63xx_regs_set {
173#define BCM_6358_RSET_SPI_SIZE 1804 173#define BCM_6358_RSET_SPI_SIZE 1804
174#define BCM_6368_RSET_SPI_SIZE 1804 174#define BCM_6368_RSET_SPI_SIZE 1804
175#define RSET_ENET_SIZE 2048 175#define RSET_ENET_SIZE 2048
176#define RSET_ENETDMA_SIZE 2048 176#define RSET_ENETDMA_SIZE 256
177#define RSET_6345_ENETDMA_SIZE 64
178#define RSET_ENETDMAC_SIZE(chans) (16 * (chans))
179#define RSET_ENETDMAS_SIZE(chans) (16 * (chans))
177#define RSET_ENETSW_SIZE 65536 180#define RSET_ENETSW_SIZE 65536
178#define RSET_UART_SIZE 24 181#define RSET_UART_SIZE 24
179#define RSET_UDC_SIZE 256 182#define RSET_UDC_SIZE 256
@@ -298,7 +301,7 @@ enum bcm63xx_regs_set {
298#define BCM_6345_USBDMA_BASE (0xfffe2800) 301#define BCM_6345_USBDMA_BASE (0xfffe2800)
299#define BCM_6345_ENET0_BASE (0xfffe1800) 302#define BCM_6345_ENET0_BASE (0xfffe1800)
300#define BCM_6345_ENETDMA_BASE (0xfffe2800) 303#define BCM_6345_ENETDMA_BASE (0xfffe2800)
301#define BCM_6345_ENETDMAC_BASE (0xfffe2900) 304#define BCM_6345_ENETDMAC_BASE (0xfffe2840)
302#define BCM_6345_ENETDMAS_BASE (0xfffe2a00) 305#define BCM_6345_ENETDMAS_BASE (0xfffe2a00)
303#define BCM_6345_ENETSW_BASE (0xdeadbeef) 306#define BCM_6345_ENETSW_BASE (0xdeadbeef)
304#define BCM_6345_PCMCIA_BASE (0xfffe2028) 307#define BCM_6345_PCMCIA_BASE (0xfffe2028)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
index d53f611184b9..753953e86242 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
@@ -4,6 +4,8 @@
4#include <linux/if_ether.h> 4#include <linux/if_ether.h>
5#include <linux/init.h> 5#include <linux/init.h>
6 6
7#include <bcm63xx_regs.h>
8
7/* 9/*
8 * on board ethernet platform data 10 * on board ethernet platform data
9 */ 11 */
@@ -37,9 +39,129 @@ struct bcm63xx_enet_platform_data {
37 int phy_id, int reg), 39 int phy_id, int reg),
38 void (*mii_write)(struct net_device *dev, 40 void (*mii_write)(struct net_device *dev,
39 int phy_id, int reg, int val)); 41 int phy_id, int reg, int val));
42
43 /* DMA channel enable mask */
44 u32 dma_chan_en_mask;
45
46 /* DMA channel interrupt mask */
47 u32 dma_chan_int_mask;
48
49 /* DMA engine has internal SRAM */
50 bool dma_has_sram;
51
52 /* DMA channel register width */
53 unsigned int dma_chan_width;
54
55 /* DMA descriptor shift */
56 unsigned int dma_desc_shift;
57};
58
59/*
60 * on board ethernet switch platform data
61 */
62#define ENETSW_MAX_PORT 8
63#define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
64#define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
65
66#define ENETSW_RGMII_PORT0 4
67
68struct bcm63xx_enetsw_port {
69 int used;
70 int phy_id;
71
72 int bypass_link;
73 int force_speed;
74 int force_duplex_full;
75
76 const char *name;
77};
78
79struct bcm63xx_enetsw_platform_data {
80 char mac_addr[ETH_ALEN];
81 int num_ports;
82 struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
83
84 /* DMA channel enable mask */
85 u32 dma_chan_en_mask;
86
87 /* DMA channel interrupt mask */
88 u32 dma_chan_int_mask;
89
90 /* DMA channel register width */
91 unsigned int dma_chan_width;
92
93 /* DMA engine has internal SRAM */
94 bool dma_has_sram;
40}; 95};
41 96
42int __init bcm63xx_enet_register(int unit, 97int __init bcm63xx_enet_register(int unit,
43 const struct bcm63xx_enet_platform_data *pd); 98 const struct bcm63xx_enet_platform_data *pd);
44 99
100int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
101
102enum bcm63xx_regs_enetdmac {
103 ENETDMAC_CHANCFG,
104 ENETDMAC_IR,
105 ENETDMAC_IRMASK,
106 ENETDMAC_MAXBURST,
107 ENETDMAC_BUFALLOC,
108 ENETDMAC_RSTART,
109 ENETDMAC_FC,
110 ENETDMAC_LEN,
111};
112
113static inline unsigned long bcm63xx_enetdmacreg(enum bcm63xx_regs_enetdmac reg)
114{
115#ifdef BCMCPU_RUNTIME_DETECT
116 extern const unsigned long *bcm63xx_regs_enetdmac;
117
118 return bcm63xx_regs_enetdmac[reg];
119#else
120#ifdef CONFIG_BCM63XX_CPU_6345
121 switch (reg) {
122 case ENETDMAC_CHANCFG:
123 return ENETDMA_6345_CHANCFG_REG;
124 case ENETDMAC_IR:
125 return ENETDMA_6345_IR_REG;
126 case ENETDMAC_IRMASK:
127 return ENETDMA_6345_IRMASK_REG;
128 case ENETDMAC_MAXBURST:
129 return ENETDMA_6345_MAXBURST_REG;
130 case ENETDMAC_BUFALLOC:
131 return ENETDMA_6345_BUFALLOC_REG;
132 case ENETDMAC_RSTART:
133 return ENETDMA_6345_RSTART_REG;
134 case ENETDMAC_FC:
135 return ENETDMA_6345_FC_REG;
136 case ENETDMAC_LEN:
137 return ENETDMA_6345_LEN_REG;
138 }
139#endif
140#if defined(CONFIG_BCM63XX_CPU_6328) || \
141 defined(CONFIG_BCM63XX_CPU_6338) || \
142 defined(CONFIG_BCM63XX_CPU_6348) || \
143 defined(CONFIG_BCM63XX_CPU_6358) || \
144 defined(CONFIG_BCM63XX_CPU_6362) || \
145 defined(CONFIG_BCM63XX_CPU_6368)
146 switch (reg) {
147 case ENETDMAC_CHANCFG:
148 return ENETDMAC_CHANCFG_REG;
149 case ENETDMAC_IR:
150 return ENETDMAC_IR_REG;
151 case ENETDMAC_IRMASK:
152 return ENETDMAC_IRMASK_REG;
153 case ENETDMAC_MAXBURST:
154 return ENETDMAC_MAXBURST_REG;
155 case ENETDMAC_BUFALLOC:
156 case ENETDMAC_RSTART:
157 case ENETDMAC_FC:
158 case ENETDMAC_LEN:
159 return 0;
160 }
161#endif
162#endif
163 return 0;
164}
165
166
45#endif /* ! BCM63XX_DEV_ENET_H_ */ 167#endif /* ! BCM63XX_DEV_ENET_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 3203fe49b34d..eff7ca7d12b0 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -727,6 +727,8 @@
727/************************************************************************* 727/*************************************************************************
728 * _REG relative to RSET_ENETDMA 728 * _REG relative to RSET_ENETDMA
729 *************************************************************************/ 729 *************************************************************************/
730#define ENETDMA_CHAN_WIDTH 0x10
731#define ENETDMA_6345_CHAN_WIDTH 0x40
730 732
731/* Controller Configuration Register */ 733/* Controller Configuration Register */
732#define ENETDMA_CFG_REG (0x0) 734#define ENETDMA_CFG_REG (0x0)
@@ -782,31 +784,56 @@
782/* State Ram Word 4 */ 784/* State Ram Word 4 */
783#define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10) 785#define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10)
784 786
787/* Broadcom 6345 ENET DMA definitions */
788#define ENETDMA_6345_CHANCFG_REG (0x00)
789
790#define ENETDMA_6345_MAXBURST_REG (0x40)
791
792#define ENETDMA_6345_RSTART_REG (0x08)
793
794#define ENETDMA_6345_LEN_REG (0x0C)
795
796#define ENETDMA_6345_IR_REG (0x14)
797
798#define ENETDMA_6345_IRMASK_REG (0x18)
799
800#define ENETDMA_6345_FC_REG (0x1C)
801
802#define ENETDMA_6345_BUFALLOC_REG (0x20)
803
804/* Shift down for EOP, SOP and WRAP bits */
805#define ENETDMA_6345_DESC_SHIFT (3)
785 806
786/************************************************************************* 807/*************************************************************************
787 * _REG relative to RSET_ENETDMAC 808 * _REG relative to RSET_ENETDMAC
788 *************************************************************************/ 809 *************************************************************************/
789 810
790/* Channel Configuration register */ 811/* Channel Configuration register */
791#define ENETDMAC_CHANCFG_REG(x) ((x) * 0x10) 812#define ENETDMAC_CHANCFG_REG (0x0)
792#define ENETDMAC_CHANCFG_EN_SHIFT 0 813#define ENETDMAC_CHANCFG_EN_SHIFT 0
793#define ENETDMAC_CHANCFG_EN_MASK (1 << ENETDMAC_CHANCFG_EN_SHIFT) 814#define ENETDMAC_CHANCFG_EN_MASK (1 << ENETDMAC_CHANCFG_EN_SHIFT)
794#define ENETDMAC_CHANCFG_PKTHALT_SHIFT 1 815#define ENETDMAC_CHANCFG_PKTHALT_SHIFT 1
795#define ENETDMAC_CHANCFG_PKTHALT_MASK (1 << ENETDMAC_CHANCFG_PKTHALT_SHIFT) 816#define ENETDMAC_CHANCFG_PKTHALT_MASK (1 << ENETDMAC_CHANCFG_PKTHALT_SHIFT)
796#define ENETDMAC_CHANCFG_BUFHALT_SHIFT 2 817#define ENETDMAC_CHANCFG_BUFHALT_SHIFT 2
797#define ENETDMAC_CHANCFG_BUFHALT_MASK (1 << ENETDMAC_CHANCFG_BUFHALT_SHIFT) 818#define ENETDMAC_CHANCFG_BUFHALT_MASK (1 << ENETDMAC_CHANCFG_BUFHALT_SHIFT)
819#define ENETDMAC_CHANCFG_CHAINING_SHIFT 2
820#define ENETDMAC_CHANCFG_CHAINING_MASK (1 << ENETDMAC_CHANCFG_CHAINING_SHIFT)
821#define ENETDMAC_CHANCFG_WRAP_EN_SHIFT 3
822#define ENETDMAC_CHANCFG_WRAP_EN_MASK (1 << ENETDMAC_CHANCFG_WRAP_EN_SHIFT)
823#define ENETDMAC_CHANCFG_FLOWC_EN_SHIFT 4
824#define ENETDMAC_CHANCFG_FLOWC_EN_MASK (1 << ENETDMAC_CHANCFG_FLOWC_EN_SHIFT)
798 825
799/* Interrupt Control/Status register */ 826/* Interrupt Control/Status register */
800#define ENETDMAC_IR_REG(x) (0x4 + (x) * 0x10) 827#define ENETDMAC_IR_REG (0x4)
801#define ENETDMAC_IR_BUFDONE_MASK (1 << 0) 828#define ENETDMAC_IR_BUFDONE_MASK (1 << 0)
802#define ENETDMAC_IR_PKTDONE_MASK (1 << 1) 829#define ENETDMAC_IR_PKTDONE_MASK (1 << 1)
803#define ENETDMAC_IR_NOTOWNER_MASK (1 << 2) 830#define ENETDMAC_IR_NOTOWNER_MASK (1 << 2)
804 831
805/* Interrupt Mask register */ 832/* Interrupt Mask register */
806#define ENETDMAC_IRMASK_REG(x) (0x8 + (x) * 0x10) 833#define ENETDMAC_IRMASK_REG (0x8)
807 834
808/* Maximum Burst Length */ 835/* Maximum Burst Length */
809#define ENETDMAC_MAXBURST_REG(x) (0xc + (x) * 0x10) 836#define ENETDMAC_MAXBURST_REG (0xc)
810 837
811 838
812/************************************************************************* 839/*************************************************************************
@@ -814,26 +841,76 @@
814 *************************************************************************/ 841 *************************************************************************/
815 842
816/* Ring Start Address register */ 843/* Ring Start Address register */
817#define ENETDMAS_RSTART_REG(x) ((x) * 0x10) 844#define ENETDMAS_RSTART_REG (0x0)
818 845
819/* State Ram Word 2 */ 846/* State Ram Word 2 */
820#define ENETDMAS_SRAM2_REG(x) (0x4 + (x) * 0x10) 847#define ENETDMAS_SRAM2_REG (0x4)
821 848
822/* State Ram Word 3 */ 849/* State Ram Word 3 */
823#define ENETDMAS_SRAM3_REG(x) (0x8 + (x) * 0x10) 850#define ENETDMAS_SRAM3_REG (0x8)
824 851
825/* State Ram Word 4 */ 852/* State Ram Word 4 */
826#define ENETDMAS_SRAM4_REG(x) (0xc + (x) * 0x10) 853#define ENETDMAS_SRAM4_REG (0xc)
827 854
828 855
829/************************************************************************* 856/*************************************************************************
830 * _REG relative to RSET_ENETSW 857 * _REG relative to RSET_ENETSW
831 *************************************************************************/ 858 *************************************************************************/
832 859
860/* Port traffic control */
861#define ENETSW_PTCTRL_REG(x) (0x0 + (x))
862#define ENETSW_PTCTRL_RXDIS_MASK (1 << 0)
863#define ENETSW_PTCTRL_TXDIS_MASK (1 << 1)
864
865/* Switch mode register */
866#define ENETSW_SWMODE_REG (0xb)
867#define ENETSW_SWMODE_FWD_EN_MASK (1 << 1)
868
869/* IMP override Register */
870#define ENETSW_IMPOV_REG (0xe)
871#define ENETSW_IMPOV_FORCE_MASK (1 << 7)
872#define ENETSW_IMPOV_TXFLOW_MASK (1 << 5)
873#define ENETSW_IMPOV_RXFLOW_MASK (1 << 4)
874#define ENETSW_IMPOV_1000_MASK (1 << 3)
875#define ENETSW_IMPOV_100_MASK (1 << 2)
876#define ENETSW_IMPOV_FDX_MASK (1 << 1)
877#define ENETSW_IMPOV_LINKUP_MASK (1 << 0)
878
879/* Port override Register */
880#define ENETSW_PORTOV_REG(x) (0x58 + (x))
881#define ENETSW_PORTOV_ENABLE_MASK (1 << 6)
882#define ENETSW_PORTOV_TXFLOW_MASK (1 << 5)
883#define ENETSW_PORTOV_RXFLOW_MASK (1 << 4)
884#define ENETSW_PORTOV_1000_MASK (1 << 3)
885#define ENETSW_PORTOV_100_MASK (1 << 2)
886#define ENETSW_PORTOV_FDX_MASK (1 << 1)
887#define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
888
889/* MDIO control register */
890#define ENETSW_MDIOC_REG (0xb0)
891#define ENETSW_MDIOC_EXT_MASK (1 << 16)
892#define ENETSW_MDIOC_REG_SHIFT 20
893#define ENETSW_MDIOC_PHYID_SHIFT 25
894#define ENETSW_MDIOC_RD_MASK (1 << 30)
895#define ENETSW_MDIOC_WR_MASK (1 << 31)
896
897/* MDIO data register */
898#define ENETSW_MDIOD_REG (0xb4)
899
900/* Global Management Configuration Register */
901#define ENETSW_GMCR_REG (0x200)
902#define ENETSW_GMCR_RST_MIB_MASK (1 << 0)
903
833/* MIB register */ 904/* MIB register */
834#define ENETSW_MIB_REG(x) (0x2800 + (x) * 4) 905#define ENETSW_MIB_REG(x) (0x2800 + (x) * 4)
835#define ENETSW_MIB_REG_COUNT 47 906#define ENETSW_MIB_REG_COUNT 47
836 907
908/* Jumbo control register port mask register */
909#define ENETSW_JMBCTL_PORT_REG (0x4004)
910
911/* Jumbo control mib good frame register */
912#define ENETSW_JMBCTL_MAXSIZE_REG (0x4008)
913
837 914
838/************************************************************************* 915/*************************************************************************
839 * _REG relative to RSET_OHCI_PRIV 916 * _REG relative to RSET_OHCI_PRIV
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
index 682bcf3b492a..d9aee1a833f3 100644
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -24,6 +24,7 @@ struct board_info {
24 /* enabled feature/device */ 24 /* enabled feature/device */
25 unsigned int has_enet0:1; 25 unsigned int has_enet0:1;
26 unsigned int has_enet1:1; 26 unsigned int has_enet1:1;
27 unsigned int has_enetsw:1;
27 unsigned int has_pci:1; 28 unsigned int has_pci:1;
28 unsigned int has_pccard:1; 29 unsigned int has_pccard:1;
29 unsigned int has_ohci0:1; 30 unsigned int has_ohci0:1;
@@ -36,6 +37,7 @@ struct board_info {
36 /* ethernet config */ 37 /* ethernet config */
37 struct bcm63xx_enet_platform_data enet0; 38 struct bcm63xx_enet_platform_data enet0;
38 struct bcm63xx_enet_platform_data enet1; 39 struct bcm63xx_enet_platform_data enet1;
40 struct bcm63xx_enetsw_platform_data enetsw;
39 41
40 /* USB config */ 42 /* USB config */
41 struct bcm63xx_usbd_platform_data usbd; 43 struct bcm63xx_usbd_platform_data usbd;
diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h
index 3b211507be7f..6a07992ba6c6 100644
--- a/arch/mips/include/uapi/asm/socket.h
+++ b/arch/mips/include/uapi/asm/socket.h
@@ -92,4 +92,6 @@
92 92
93#define SO_SELECT_ERR_QUEUE 45 93#define SO_SELECT_ERR_QUEUE 45
94 94
95#define SO_LL 46
96
95#endif /* _UAPI_ASM_SOCKET_H */ 97#endif /* _UAPI_ASM_SOCKET_H */
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
index 729a50991780..b7eccbd17bf7 100644
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ b/arch/mips/txx9/generic/setup_tx4939.c
@@ -331,7 +331,8 @@ static int tx4939_netdev_event(struct notifier_block *this,
331 unsigned long event, 331 unsigned long event,
332 void *ptr) 332 void *ptr)
333{ 333{
334 struct net_device *dev = ptr; 334 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
335
335 if (event == NETDEV_CHANGE && netif_carrier_ok(dev)) { 336 if (event == NETDEV_CHANGE && netif_carrier_ok(dev)) {
336 __u64 bit = 0; 337 __u64 bit = 0;
337 if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(0)) 338 if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(0))