aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorAaro Koskinen <aaro.koskinen@iki.fi>2013-12-30 18:26:31 -0500
committerRalf Baechle <ralf@linux-mips.org>2014-01-24 16:39:46 -0500
commit41315b6ec108e934884d49f5fde7e1d79b3c42d2 (patch)
treef65fda2c7407f1fa6aa04723ef41177cae61ae9f /arch/mips
parentc330fd90b1b8fa6a8152de27f1252432e39f2dc0 (diff)
MIPS: /proc/cpuinfo: always print the supported ISA
Currently the supported ISA is only printed on the latest architectures. Print it also on legacy platforms. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6295/
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/proc.c39
1 files changed, 19 insertions, 20 deletions
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index db49bfafa329..00d20974b3e7 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -65,26 +65,25 @@ static int show_cpuinfo(struct seq_file *m, void *v)
65 cpu_data[n].watch_reg_masks[i]); 65 cpu_data[n].watch_reg_masks[i]);
66 seq_printf(m, "]\n"); 66 seq_printf(m, "]\n");
67 } 67 }
68 if (cpu_has_mips_r) { 68
69 seq_printf(m, "isa\t\t\t: mips1"); 69 seq_printf(m, "isa\t\t\t: mips1");
70 if (cpu_has_mips_2) 70 if (cpu_has_mips_2)
71 seq_printf(m, "%s", " mips2"); 71 seq_printf(m, "%s", " mips2");
72 if (cpu_has_mips_3) 72 if (cpu_has_mips_3)
73 seq_printf(m, "%s", " mips3"); 73 seq_printf(m, "%s", " mips3");
74 if (cpu_has_mips_4) 74 if (cpu_has_mips_4)
75 seq_printf(m, "%s", " mips4"); 75 seq_printf(m, "%s", " mips4");
76 if (cpu_has_mips_5) 76 if (cpu_has_mips_5)
77 seq_printf(m, "%s", " mips5"); 77 seq_printf(m, "%s", " mips5");
78 if (cpu_has_mips32r1) 78 if (cpu_has_mips32r1)
79 seq_printf(m, "%s", " mips32r1"); 79 seq_printf(m, "%s", " mips32r1");
80 if (cpu_has_mips32r2) 80 if (cpu_has_mips32r2)
81 seq_printf(m, "%s", " mips32r2"); 81 seq_printf(m, "%s", " mips32r2");
82 if (cpu_has_mips64r1) 82 if (cpu_has_mips64r1)
83 seq_printf(m, "%s", " mips64r1"); 83 seq_printf(m, "%s", " mips64r1");
84 if (cpu_has_mips64r2) 84 if (cpu_has_mips64r2)
85 seq_printf(m, "%s", " mips64r2"); 85 seq_printf(m, "%s", " mips64r2");
86 seq_printf(m, "\n"); 86 seq_printf(m, "\n");
87 }
88 87
89 seq_printf(m, "ASEs implemented\t:"); 88 seq_printf(m, "ASEs implemented\t:");
90 if (cpu_has_mips16) seq_printf(m, "%s", " mips16"); 89 if (cpu_has_mips16) seq_printf(m, "%s", " mips16");