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authorJiang Liu <jiang.liu@huawei.com>2012-07-24 05:20:14 -0400
committerBjorn Helgaas <bhelgaas@google.com>2012-08-23 12:11:12 -0400
commit39a3612e03440be5e2dbd02a5672cd4d1dd243c4 (patch)
tree34a82c4a27438b76148069ac197e6f51f023e95d /arch/mips
parent3b87011d9a84777d06b8619b69a8a6b1b4b41959 (diff)
MIPS: PCI: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify MIPS PCIe code. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David Daney <david.daney@cavium.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/pci/pci-octeon.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index 52a1ba70b3b6..c5dfb2c87d44 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -117,16 +117,11 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
117 } 117 }
118 118
119 /* Enable the PCIe normal error reporting */ 119 /* Enable the PCIe normal error reporting */
120 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 120 config = PCI_EXP_DEVCTL_CERE; /* Correctable Error Reporting */
121 if (pos) { 121 config |= PCI_EXP_DEVCTL_NFERE; /* Non-Fatal Error Reporting */
122 /* Update Device Control */ 122 config |= PCI_EXP_DEVCTL_FERE; /* Fatal Error Reporting */
123 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config); 123 config |= PCI_EXP_DEVCTL_URRE; /* Unsupported Request */
124 config |= PCI_EXP_DEVCTL_CERE; /* Correctable Error Reporting */ 124 pcie_capability_set_word(dev, PCI_EXP_DEVCTL, config);
125 config |= PCI_EXP_DEVCTL_NFERE; /* Non-Fatal Error Reporting */
126 config |= PCI_EXP_DEVCTL_FERE; /* Fatal Error Reporting */
127 config |= PCI_EXP_DEVCTL_URRE; /* Unsupported Request */
128 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config);
129 }
130 125
131 /* Find the Advanced Error Reporting capability */ 126 /* Find the Advanced Error Reporting capability */
132 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); 127 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);