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authorDavid Daney <david.daney@cavium.com>2012-07-05 12:12:39 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-07-23 08:54:53 -0400
commit368bec0d4a84f78f8c2be8441916d905a8da73c2 (patch)
tree29fd1d32da4eec4804908ac558469dfe0fe689bb /arch/mips
parent2fd46f47be0f96be700053d6caa8dcb14453a520 (diff)
netdev: octeon_mgmt: Convert to use device tree.
The device tree will supply the register bank base addresses, make register addressing relative to those. PHY connection is now described by the device tree. The OCTEON_IRQ_MII{0,1} symbols are also removed as they are now unused and interfere with the irq_domain used for device tree irq mapping. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3941/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/cavium-octeon/octeon-irq.c2
-rw-r--r--arch/mips/cavium-octeon/octeon-platform.c62
2 files changed, 0 insertions, 64 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 2a661ad35cf7..5fb76aa346be 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -1197,7 +1197,6 @@ static void __init octeon_irq_init_ciu(void)
1197 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq); 1197 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq);
1198 1198
1199 octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq); 1199 octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq);
1200 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MII0, 0, 62, chip, handle_level_irq);
1201 octeon_irq_set_ciu_mapping(OCTEON_IRQ_BOOTDMA, 0, 63, chip, handle_level_irq); 1200 octeon_irq_set_ciu_mapping(OCTEON_IRQ_BOOTDMA, 0, 63, chip, handle_level_irq);
1202 1201
1203 /* CIU_1 */ 1202 /* CIU_1 */
@@ -1206,7 +1205,6 @@ static void __init octeon_irq_init_ciu(void)
1206 1205
1207 octeon_irq_set_ciu_mapping(OCTEON_IRQ_UART2, 1, 16, chip, handle_level_irq); 1206 octeon_irq_set_ciu_mapping(OCTEON_IRQ_UART2, 1, 16, chip, handle_level_irq);
1208 octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB1, 1, 17, chip, handle_level_irq); 1207 octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB1, 1, 17, chip, handle_level_irq);
1209 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MII1, 1, 18, chip, handle_level_irq);
1210 1208
1211 gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio"); 1209 gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio");
1212 if (gpio_node) { 1210 if (gpio_node) {
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index 66cabc2e64c8..0938df10a71c 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -168,68 +168,6 @@ out:
168} 168}
169device_initcall(octeon_rng_device_init); 169device_initcall(octeon_rng_device_init);
170 170
171/* Octeon mgmt port Ethernet interface. */
172static int __init octeon_mgmt_device_init(void)
173{
174 struct platform_device *pd;
175 int ret = 0;
176 int port, num_ports;
177
178 struct resource mgmt_port_resource = {
179 .flags = IORESOURCE_IRQ,
180 .start = -1,
181 .end = -1
182 };
183
184 if (!OCTEON_IS_MODEL(OCTEON_CN56XX) && !OCTEON_IS_MODEL(OCTEON_CN52XX))
185 return 0;
186
187 if (OCTEON_IS_MODEL(OCTEON_CN56XX))
188 num_ports = 1;
189 else
190 num_ports = 2;
191
192 for (port = 0; port < num_ports; port++) {
193 pd = platform_device_alloc("octeon_mgmt", port);
194 if (!pd) {
195 ret = -ENOMEM;
196 goto out;
197 }
198 /* No DMA restrictions */
199 pd->dev.coherent_dma_mask = DMA_BIT_MASK(64);
200 pd->dev.dma_mask = &pd->dev.coherent_dma_mask;
201
202 switch (port) {
203 case 0:
204 mgmt_port_resource.start = OCTEON_IRQ_MII0;
205 break;
206 case 1:
207 mgmt_port_resource.start = OCTEON_IRQ_MII1;
208 break;
209 default:
210 BUG();
211 }
212 mgmt_port_resource.end = mgmt_port_resource.start;
213
214 ret = platform_device_add_resources(pd, &mgmt_port_resource, 1);
215
216 if (ret)
217 goto fail;
218
219 ret = platform_device_add(pd);
220 if (ret)
221 goto fail;
222 }
223 return ret;
224fail:
225 platform_device_put(pd);
226
227out:
228 return ret;
229
230}
231device_initcall(octeon_mgmt_device_init);
232
233#ifdef CONFIG_USB 171#ifdef CONFIG_USB
234 172
235static int __init octeon_ehci_device_init(void) 173static int __init octeon_ehci_device_init(void)