diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-06-16 05:20:37 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-06-16 05:20:37 -0400 |
commit | 3557b18fcbe0e29706214f3c7cc680a7823605eb (patch) | |
tree | 2a70696b78a9e8b5ba38090901301931d395ecfb /arch/mips | |
parent | 4226ab93d8ae3fd895abe45879fe34d489a98718 (diff) | |
parent | 066519068ad2fbe98c7f45552b1f592903a9c8c8 (diff) |
Merge branch 'linus' into x86/ptemask
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/au1000/common/clocks.c | 1 | ||||
-rw-r--r-- | arch/mips/au1000/common/dbdma.c | 11 | ||||
-rw-r--r-- | arch/mips/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/kernel/traps.c | 16 | ||||
-rw-r--r-- | arch/mips/mips-boards/generic/time.c | 19 | ||||
-rw-r--r-- | arch/mips/mm/page.c | 10 | ||||
-rw-r--r-- | arch/mips/mm/tlbex.c | 3 | ||||
-rw-r--r-- | arch/mips/pci/ops-bridge.c | 20 | ||||
-rw-r--r-- | arch/mips/pci/pci-ip27.c | 8 | ||||
-rw-r--r-- | arch/mips/sgi-ip27/ip27-init.c | 22 | ||||
-rw-r--r-- | arch/mips/sgi-ip27/ip27-memory.c | 117 | ||||
-rw-r--r-- | arch/mips/sgi-ip27/ip27-smp.c | 5 | ||||
-rw-r--r-- | arch/mips/sgi-ip27/ip27-timer.c | 27 |
13 files changed, 94 insertions, 166 deletions
diff --git a/arch/mips/au1000/common/clocks.c b/arch/mips/au1000/common/clocks.c index 46f8ee0e2657..043429d17c5f 100644 --- a/arch/mips/au1000/common/clocks.c +++ b/arch/mips/au1000/common/clocks.c | |||
@@ -45,6 +45,7 @@ unsigned int get_au1x00_speed(void) | |||
45 | { | 45 | { |
46 | return au1x00_clock; | 46 | return au1x00_clock; |
47 | } | 47 | } |
48 | EXPORT_SYMBOL(get_au1x00_speed); | ||
48 | 49 | ||
49 | /* | 50 | /* |
50 | * The UART baud base is not known at compile time ... if | 51 | * The UART baud base is not known at compile time ... if |
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index 42d555236de1..601ee9180ee4 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c | |||
@@ -216,6 +216,17 @@ u32 au1xxx_ddma_add_device(dbdev_tab_t *dev) | |||
216 | } | 216 | } |
217 | EXPORT_SYMBOL(au1xxx_ddma_add_device); | 217 | EXPORT_SYMBOL(au1xxx_ddma_add_device); |
218 | 218 | ||
219 | void au1xxx_ddma_del_device(u32 devid) | ||
220 | { | ||
221 | dbdev_tab_t *p = find_dbdev_id(devid); | ||
222 | |||
223 | if (p != NULL) { | ||
224 | memset(p, 0, sizeof(dbdev_tab_t)); | ||
225 | p->dev_id = ~0; | ||
226 | } | ||
227 | } | ||
228 | EXPORT_SYMBOL(au1xxx_ddma_del_device); | ||
229 | |||
219 | /* Allocate a channel and return a non-zero descriptor if successful. */ | 230 | /* Allocate a channel and return a non-zero descriptor if successful. */ |
220 | u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, | 231 | u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, |
221 | void (*callback)(int, void *), void *callparam) | 232 | void (*callback)(int, void *), void *callparam) |
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index cc0244036aec..65e46a6d4178 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile | |||
@@ -30,7 +30,6 @@ obj-$(CONFIG_CPU_LOONGSON2) += r4k_fpu.o r4k_switch.o | |||
30 | obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o | 30 | obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o |
31 | obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o | 31 | obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o |
32 | obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o | 32 | obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o |
33 | obj-$(CONFIG_CPU_R4000) += r4k_fpu.o r4k_switch.o | ||
34 | obj-$(CONFIG_CPU_R4300) += r4k_fpu.o r4k_switch.o | 33 | obj-$(CONFIG_CPU_R4300) += r4k_fpu.o r4k_switch.o |
35 | obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4k_switch.o | 34 | obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4k_switch.o |
36 | obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o | 35 | obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index cb8b0e2c7954..f9165d1a17bf 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -88,15 +88,17 @@ static void show_raw_backtrace(unsigned long reg29) | |||
88 | #ifdef CONFIG_KALLSYMS | 88 | #ifdef CONFIG_KALLSYMS |
89 | printk("\n"); | 89 | printk("\n"); |
90 | #endif | 90 | #endif |
91 | #define IS_KVA01(a) ((((unsigned int)a) & 0xc0000000) == 0x80000000) | 91 | while (!kstack_end(sp)) { |
92 | if (IS_KVA01(sp)) { | 92 | unsigned long __user *p = |
93 | while (!kstack_end(sp)) { | 93 | (unsigned long __user *)(unsigned long)sp++; |
94 | addr = *sp++; | 94 | if (__get_user(addr, p)) { |
95 | if (__kernel_text_address(addr)) | 95 | printk(" (Bad stack address)"); |
96 | print_ip_sym(addr); | 96 | break; |
97 | } | 97 | } |
98 | printk("\n"); | 98 | if (__kernel_text_address(addr)) |
99 | print_ip_sym(addr); | ||
99 | } | 100 | } |
101 | printk("\n"); | ||
100 | } | 102 | } |
101 | 103 | ||
102 | #ifdef CONFIG_KALLSYMS | 104 | #ifdef CONFIG_KALLSYMS |
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 008fd82b5840..fe2cac1b4514 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c | |||
@@ -58,27 +58,8 @@ static int mips_cpu_timer_irq; | |||
58 | static int mips_cpu_perf_irq; | 58 | static int mips_cpu_perf_irq; |
59 | extern int cp0_perfcount_irq; | 59 | extern int cp0_perfcount_irq; |
60 | 60 | ||
61 | DEFINE_PER_CPU(unsigned int, tickcount); | ||
62 | #define tickcount_this_cpu __get_cpu_var(tickcount) | ||
63 | static unsigned long ledbitmask; | ||
64 | |||
65 | static void mips_timer_dispatch(void) | 61 | static void mips_timer_dispatch(void) |
66 | { | 62 | { |
67 | #if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_ATLAS) | ||
68 | /* | ||
69 | * Yes, this is very tacky, won't work as expected with SMTC and | ||
70 | * dyntick will break it, | ||
71 | * but it gives me a nice warm feeling during debug | ||
72 | */ | ||
73 | #define LEDBAR 0xbf000408 | ||
74 | if (tickcount_this_cpu++ >= HZ) { | ||
75 | tickcount_this_cpu = 0; | ||
76 | change_bit(smp_processor_id(), &ledbitmask); | ||
77 | smp_wmb(); /* Make sure every one else sees the change */ | ||
78 | /* This will pick up any recent changes made by other CPU's */ | ||
79 | *(unsigned int *)LEDBAR = ledbitmask; | ||
80 | } | ||
81 | #endif | ||
82 | do_IRQ(mips_cpu_timer_irq); | 63 | do_IRQ(mips_cpu_timer_irq); |
83 | } | 64 | } |
84 | 65 | ||
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c index d827d6144369..cab81f42eee5 100644 --- a/arch/mips/mm/page.c +++ b/arch/mips/mm/page.c | |||
@@ -310,8 +310,8 @@ void __cpuinit build_clear_page(void) | |||
310 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) | 310 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) |
311 | uasm_i_lui(&buf, AT, 0xa000); | 311 | uasm_i_lui(&buf, AT, 0xa000); |
312 | 312 | ||
313 | off = min(8, pref_bias_clear_store / cache_line_size) * | 313 | off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) |
314 | cache_line_size; | 314 | * cache_line_size : 0; |
315 | while (off) { | 315 | while (off) { |
316 | build_clear_pref(&buf, -off); | 316 | build_clear_pref(&buf, -off); |
317 | off -= cache_line_size; | 317 | off -= cache_line_size; |
@@ -454,12 +454,14 @@ void __cpuinit build_copy_page(void) | |||
454 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) | 454 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) |
455 | uasm_i_lui(&buf, AT, 0xa000); | 455 | uasm_i_lui(&buf, AT, 0xa000); |
456 | 456 | ||
457 | off = min(8, pref_bias_copy_load / cache_line_size) * cache_line_size; | 457 | off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) * |
458 | cache_line_size : 0; | ||
458 | while (off) { | 459 | while (off) { |
459 | build_copy_load_pref(&buf, -off); | 460 | build_copy_load_pref(&buf, -off); |
460 | off -= cache_line_size; | 461 | off -= cache_line_size; |
461 | } | 462 | } |
462 | off = min(8, pref_bias_copy_store / cache_line_size) * cache_line_size; | 463 | off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) * |
464 | cache_line_size : 0; | ||
463 | while (off) { | 465 | while (off) { |
464 | build_copy_store_pref(&buf, -off); | 466 | build_copy_store_pref(&buf, -off); |
465 | off -= cache_line_size; | 467 | off -= cache_line_size; |
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 382738ca8a0b..76da73a5ab3c 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -224,8 +224,9 @@ static u32 final_handler[64] __cpuinitdata; | |||
224 | static void __cpuinit __maybe_unused build_tlb_probe_entry(u32 **p) | 224 | static void __cpuinit __maybe_unused build_tlb_probe_entry(u32 **p) |
225 | { | 225 | { |
226 | switch (current_cpu_type()) { | 226 | switch (current_cpu_type()) { |
227 | /* Found by experiment: R4600 v2.0 needs this, too. */ | 227 | /* Found by experiment: R4600 v2.0/R4700 needs this, too. */ |
228 | case CPU_R4600: | 228 | case CPU_R4600: |
229 | case CPU_R4700: | ||
229 | case CPU_R5000: | 230 | case CPU_R5000: |
230 | case CPU_R5000A: | 231 | case CPU_R5000A: |
231 | case CPU_NEVADA: | 232 | case CPU_NEVADA: |
diff --git a/arch/mips/pci/ops-bridge.c b/arch/mips/pci/ops-bridge.c index 1fa09929cd7a..b46b3e211775 100644 --- a/arch/mips/pci/ops-bridge.c +++ b/arch/mips/pci/ops-bridge.c | |||
@@ -14,6 +14,22 @@ | |||
14 | #include <asm/sn/sn0/hub.h> | 14 | #include <asm/sn/sn0/hub.h> |
15 | 15 | ||
16 | /* | 16 | /* |
17 | * Most of the IOC3 PCI config register aren't present | ||
18 | * we emulate what is needed for a normal PCI enumeration | ||
19 | */ | ||
20 | static u32 emulate_ioc3_cfg(int where, int size) | ||
21 | { | ||
22 | if (size == 1 && where == 0x3d) | ||
23 | return 0x01; | ||
24 | else if (size == 2 && where == 0x3c) | ||
25 | return 0x0100; | ||
26 | else if (size == 4 && where == 0x3c) | ||
27 | return 0x00000100; | ||
28 | |||
29 | return 0; | ||
30 | } | ||
31 | |||
32 | /* | ||
17 | * The Bridge ASIC supports both type 0 and type 1 access. Type 1 is | 33 | * The Bridge ASIC supports both type 0 and type 1 access. Type 1 is |
18 | * not really documented, so right now I can't write code which uses it. | 34 | * not really documented, so right now I can't write code which uses it. |
19 | * Therefore we use type 0 accesses for now even though they won't work | 35 | * Therefore we use type 0 accesses for now even though they won't work |
@@ -64,7 +80,7 @@ oh_my_gawd: | |||
64 | * generic PCI code a chance to look at the wrong register. | 80 | * generic PCI code a chance to look at the wrong register. |
65 | */ | 81 | */ |
66 | if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) { | 82 | if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) { |
67 | *value = 0; | 83 | *value = emulate_ioc3_cfg(where, size); |
68 | return PCIBIOS_SUCCESSFUL; | 84 | return PCIBIOS_SUCCESSFUL; |
69 | } | 85 | } |
70 | 86 | ||
@@ -127,7 +143,7 @@ oh_my_gawd: | |||
127 | * generic PCI code a chance to look at the wrong register. | 143 | * generic PCI code a chance to look at the wrong register. |
128 | */ | 144 | */ |
129 | if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) { | 145 | if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) { |
130 | *value = 0; | 146 | *value = emulate_ioc3_cfg(where, size); |
131 | return PCIBIOS_SUCCESSFUL; | 147 | return PCIBIOS_SUCCESSFUL; |
132 | } | 148 | } |
133 | 149 | ||
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index bb64828a92fe..a18516925cdd 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c | |||
@@ -47,6 +47,9 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid) | |||
47 | static int num_bridges = 0; | 47 | static int num_bridges = 0; |
48 | bridge_t *bridge; | 48 | bridge_t *bridge; |
49 | int slot; | 49 | int slot; |
50 | extern int pci_probe_only; | ||
51 | |||
52 | pci_probe_only = 1; | ||
50 | 53 | ||
51 | printk("a bridge\n"); | 54 | printk("a bridge\n"); |
52 | 55 | ||
@@ -100,6 +103,11 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid) | |||
100 | */ | 103 | */ |
101 | bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | | 104 | bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | |
102 | BRIDGE_CTRL_MEM_SWAP; | 105 | BRIDGE_CTRL_MEM_SWAP; |
106 | #ifdef CONFIG_PAGE_SIZE_4KB | ||
107 | bridge->b_wid_control &= ~BRIDGE_CTRL_PAGE_SIZE; | ||
108 | #else /* 16kB or larger */ | ||
109 | bridge->b_wid_control |= BRIDGE_CTRL_PAGE_SIZE; | ||
110 | #endif | ||
103 | 111 | ||
104 | /* | 112 | /* |
105 | * Hmm... IRIX sets additional bits in the address which | 113 | * Hmm... IRIX sets additional bits in the address which |
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c index 7093e7c573a4..4a500e8cd3cc 100644 --- a/arch/mips/sgi-ip27/ip27-init.c +++ b/arch/mips/sgi-ip27/ip27-init.c | |||
@@ -161,27 +161,6 @@ cnodeid_t get_compact_nodeid(void) | |||
161 | return NASID_TO_COMPACT_NODEID(get_nasid()); | 161 | return NASID_TO_COMPACT_NODEID(get_nasid()); |
162 | } | 162 | } |
163 | 163 | ||
164 | /* Extracted from the IOC3 meta driver. FIXME. */ | ||
165 | static inline void ioc3_sio_init(void) | ||
166 | { | ||
167 | struct ioc3 *ioc3; | ||
168 | nasid_t nid; | ||
169 | long loops; | ||
170 | |||
171 | nid = get_nasid(); | ||
172 | ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base; | ||
173 | |||
174 | ioc3->sscr_a = 0; /* PIO mode for uarta. */ | ||
175 | ioc3->sscr_b = 0; /* PIO mode for uartb. */ | ||
176 | ioc3->sio_iec = ~0; | ||
177 | ioc3->sio_ies = (SIO_IR_SA_INT | SIO_IR_SB_INT); | ||
178 | |||
179 | loops=1000000; while(loops--); | ||
180 | ioc3->sregs.uarta.iu_fcr = 0; | ||
181 | ioc3->sregs.uartb.iu_fcr = 0; | ||
182 | loops=1000000; while(loops--); | ||
183 | } | ||
184 | |||
185 | static inline void ioc3_eth_init(void) | 164 | static inline void ioc3_eth_init(void) |
186 | { | 165 | { |
187 | struct ioc3 *ioc3; | 166 | struct ioc3 *ioc3; |
@@ -234,7 +213,6 @@ void __init plat_mem_setup(void) | |||
234 | panic("Kernel compiled for N mode."); | 213 | panic("Kernel compiled for N mode."); |
235 | #endif | 214 | #endif |
236 | 215 | ||
237 | ioc3_sio_init(); | ||
238 | ioc3_eth_init(); | 216 | ioc3_eth_init(); |
239 | per_cpu_init(); | 217 | per_cpu_init(); |
240 | 218 | ||
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index bf438d02366e..42cd10956306 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c | |||
@@ -33,10 +33,6 @@ | |||
33 | #define SLOT_PFNSHIFT (SLOT_SHIFT - PAGE_SHIFT) | 33 | #define SLOT_PFNSHIFT (SLOT_SHIFT - PAGE_SHIFT) |
34 | #define PFN_NASIDSHFT (NASID_SHFT - PAGE_SHIFT) | 34 | #define PFN_NASIDSHFT (NASID_SHFT - PAGE_SHIFT) |
35 | 35 | ||
36 | #define SLOT_IGNORED 0xffff | ||
37 | |||
38 | static short __initdata slot_lastfilled_cache[MAX_COMPACT_NODES]; | ||
39 | static unsigned short __initdata slot_psize_cache[MAX_COMPACT_NODES][MAX_MEM_SLOTS]; | ||
40 | static struct bootmem_data __initdata plat_node_bdata[MAX_COMPACT_NODES]; | 36 | static struct bootmem_data __initdata plat_node_bdata[MAX_COMPACT_NODES]; |
41 | 37 | ||
42 | struct node_data *__node_data[MAX_COMPACT_NODES]; | 38 | struct node_data *__node_data[MAX_COMPACT_NODES]; |
@@ -267,51 +263,6 @@ static pfn_t __init slot_getbasepfn(cnodeid_t cnode, int slot) | |||
267 | return ((pfn_t)nasid << PFN_NASIDSHFT) | (slot << SLOT_PFNSHIFT); | 263 | return ((pfn_t)nasid << PFN_NASIDSHFT) | (slot << SLOT_PFNSHIFT); |
268 | } | 264 | } |
269 | 265 | ||
270 | /* | ||
271 | * Return the number of pages of memory provided by the given slot | ||
272 | * on the specified node. | ||
273 | */ | ||
274 | static pfn_t __init slot_getsize(cnodeid_t node, int slot) | ||
275 | { | ||
276 | return (pfn_t) slot_psize_cache[node][slot]; | ||
277 | } | ||
278 | |||
279 | /* | ||
280 | * Return highest slot filled | ||
281 | */ | ||
282 | static int __init node_getlastslot(cnodeid_t node) | ||
283 | { | ||
284 | return (int) slot_lastfilled_cache[node]; | ||
285 | } | ||
286 | |||
287 | /* | ||
288 | * Return the pfn of the last free page of memory on a node. | ||
289 | */ | ||
290 | static pfn_t __init node_getmaxclick(cnodeid_t node) | ||
291 | { | ||
292 | pfn_t slot_psize; | ||
293 | int slot; | ||
294 | |||
295 | /* | ||
296 | * Start at the top slot. When we find a slot with memory in it, | ||
297 | * that's the winner. | ||
298 | */ | ||
299 | for (slot = (MAX_MEM_SLOTS - 1); slot >= 0; slot--) { | ||
300 | if ((slot_psize = slot_getsize(node, slot))) { | ||
301 | if (slot_psize == SLOT_IGNORED) | ||
302 | continue; | ||
303 | /* Return the basepfn + the slot size, minus 1. */ | ||
304 | return slot_getbasepfn(node, slot) + slot_psize - 1; | ||
305 | } | ||
306 | } | ||
307 | |||
308 | /* | ||
309 | * If there's no memory on the node, return 0. This is likely | ||
310 | * to cause problems. | ||
311 | */ | ||
312 | return 0; | ||
313 | } | ||
314 | |||
315 | static pfn_t __init slot_psize_compute(cnodeid_t node, int slot) | 266 | static pfn_t __init slot_psize_compute(cnodeid_t node, int slot) |
316 | { | 267 | { |
317 | nasid_t nasid; | 268 | nasid_t nasid; |
@@ -404,13 +355,13 @@ static void __init mlreset(void) | |||
404 | static void __init szmem(void) | 355 | static void __init szmem(void) |
405 | { | 356 | { |
406 | pfn_t slot_psize, slot0sz = 0, nodebytes; /* Hack to detect problem configs */ | 357 | pfn_t slot_psize, slot0sz = 0, nodebytes; /* Hack to detect problem configs */ |
407 | int slot, ignore; | 358 | int slot; |
408 | cnodeid_t node; | 359 | cnodeid_t node; |
409 | 360 | ||
410 | num_physpages = 0; | 361 | num_physpages = 0; |
411 | 362 | ||
412 | for_each_online_node(node) { | 363 | for_each_online_node(node) { |
413 | ignore = nodebytes = 0; | 364 | nodebytes = 0; |
414 | for (slot = 0; slot < MAX_MEM_SLOTS; slot++) { | 365 | for (slot = 0; slot < MAX_MEM_SLOTS; slot++) { |
415 | slot_psize = slot_psize_compute(node, slot); | 366 | slot_psize = slot_psize_compute(node, slot); |
416 | if (slot == 0) | 367 | if (slot == 0) |
@@ -420,21 +371,20 @@ static void __init szmem(void) | |||
420 | * kernel text. | 371 | * kernel text. |
421 | */ | 372 | */ |
422 | nodebytes += (1LL << SLOT_SHIFT); | 373 | nodebytes += (1LL << SLOT_SHIFT); |
374 | |||
375 | if (!slot_psize) | ||
376 | continue; | ||
377 | |||
423 | if ((nodebytes >> PAGE_SHIFT) * (sizeof(struct page)) > | 378 | if ((nodebytes >> PAGE_SHIFT) * (sizeof(struct page)) > |
424 | (slot0sz << PAGE_SHIFT)) | 379 | (slot0sz << PAGE_SHIFT)) { |
425 | ignore = 1; | ||
426 | if (ignore && slot_psize) { | ||
427 | printk("Ignoring slot %d onwards on node %d\n", | 380 | printk("Ignoring slot %d onwards on node %d\n", |
428 | slot, node); | 381 | slot, node); |
429 | slot_psize_cache[node][slot] = SLOT_IGNORED; | ||
430 | slot = MAX_MEM_SLOTS; | 382 | slot = MAX_MEM_SLOTS; |
431 | continue; | 383 | continue; |
432 | } | 384 | } |
433 | num_physpages += slot_psize; | 385 | num_physpages += slot_psize; |
434 | slot_psize_cache[node][slot] = | 386 | add_active_range(node, slot_getbasepfn(node, slot), |
435 | (unsigned short) slot_psize; | 387 | slot_getbasepfn(node, slot) + slot_psize); |
436 | if (slot_psize) | ||
437 | slot_lastfilled_cache[node] = slot; | ||
438 | } | 388 | } |
439 | } | 389 | } |
440 | } | 390 | } |
@@ -442,18 +392,20 @@ static void __init szmem(void) | |||
442 | static void __init node_mem_init(cnodeid_t node) | 392 | static void __init node_mem_init(cnodeid_t node) |
443 | { | 393 | { |
444 | pfn_t slot_firstpfn = slot_getbasepfn(node, 0); | 394 | pfn_t slot_firstpfn = slot_getbasepfn(node, 0); |
445 | pfn_t slot_lastpfn = slot_firstpfn + slot_getsize(node, 0); | ||
446 | pfn_t slot_freepfn = node_getfirstfree(node); | 395 | pfn_t slot_freepfn = node_getfirstfree(node); |
447 | struct pglist_data *pd; | ||
448 | unsigned long bootmap_size; | 396 | unsigned long bootmap_size; |
397 | pfn_t start_pfn, end_pfn; | ||
398 | |||
399 | get_pfn_range_for_nid(node, &start_pfn, &end_pfn); | ||
449 | 400 | ||
450 | /* | 401 | /* |
451 | * Allocate the node data structures on the node first. | 402 | * Allocate the node data structures on the node first. |
452 | */ | 403 | */ |
453 | __node_data[node] = __va(slot_freepfn << PAGE_SHIFT); | 404 | __node_data[node] = __va(slot_freepfn << PAGE_SHIFT); |
454 | 405 | ||
455 | pd = NODE_DATA(node); | 406 | NODE_DATA(node)->bdata = &plat_node_bdata[node]; |
456 | pd->bdata = &plat_node_bdata[node]; | 407 | NODE_DATA(node)->node_start_pfn = start_pfn; |
408 | NODE_DATA(node)->node_spanned_pages = end_pfn - start_pfn; | ||
457 | 409 | ||
458 | cpus_clear(hub_data(node)->h_cpus); | 410 | cpus_clear(hub_data(node)->h_cpus); |
459 | 411 | ||
@@ -461,12 +413,12 @@ static void __init node_mem_init(cnodeid_t node) | |||
461 | sizeof(struct hub_data)); | 413 | sizeof(struct hub_data)); |
462 | 414 | ||
463 | bootmap_size = init_bootmem_node(NODE_DATA(node), slot_freepfn, | 415 | bootmap_size = init_bootmem_node(NODE_DATA(node), slot_freepfn, |
464 | slot_firstpfn, slot_lastpfn); | 416 | start_pfn, end_pfn); |
465 | free_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT, | 417 | free_bootmem_with_active_regions(node, end_pfn); |
466 | (slot_lastpfn - slot_firstpfn) << PAGE_SHIFT); | ||
467 | reserve_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT, | 418 | reserve_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT, |
468 | ((slot_freepfn - slot_firstpfn) << PAGE_SHIFT) + bootmap_size, | 419 | ((slot_freepfn - slot_firstpfn) << PAGE_SHIFT) + bootmap_size, |
469 | BOOTMEM_DEFAULT); | 420 | BOOTMEM_DEFAULT); |
421 | sparse_memory_present_with_active_regions(node); | ||
470 | } | 422 | } |
471 | 423 | ||
472 | /* | 424 | /* |
@@ -515,16 +467,15 @@ void __init paging_init(void) | |||
515 | pagetable_init(); | 467 | pagetable_init(); |
516 | 468 | ||
517 | for_each_online_node(node) { | 469 | for_each_online_node(node) { |
518 | pfn_t start_pfn = slot_getbasepfn(node, 0); | 470 | pfn_t start_pfn, end_pfn; |
519 | pfn_t end_pfn = node_getmaxclick(node) + 1; | ||
520 | 471 | ||
521 | zones_size[ZONE_NORMAL] = end_pfn - start_pfn; | 472 | get_pfn_range_for_nid(node, &start_pfn, &end_pfn); |
522 | free_area_init_node(node, NODE_DATA(node), | ||
523 | zones_size, start_pfn, NULL); | ||
524 | 473 | ||
525 | if (end_pfn > max_low_pfn) | 474 | if (end_pfn > max_low_pfn) |
526 | max_low_pfn = end_pfn; | 475 | max_low_pfn = end_pfn; |
527 | } | 476 | } |
477 | zones_size[ZONE_NORMAL] = max_low_pfn; | ||
478 | free_area_init_nodes(zones_size); | ||
528 | } | 479 | } |
529 | 480 | ||
530 | void __init mem_init(void) | 481 | void __init mem_init(void) |
@@ -535,34 +486,10 @@ void __init mem_init(void) | |||
535 | high_memory = (void *) __va(num_physpages << PAGE_SHIFT); | 486 | high_memory = (void *) __va(num_physpages << PAGE_SHIFT); |
536 | 487 | ||
537 | for_each_online_node(node) { | 488 | for_each_online_node(node) { |
538 | unsigned slot, numslots; | ||
539 | struct page *end, *p; | ||
540 | |||
541 | /* | 489 | /* |
542 | * This will free up the bootmem, ie, slot 0 memory. | 490 | * This will free up the bootmem, ie, slot 0 memory. |
543 | */ | 491 | */ |
544 | totalram_pages += free_all_bootmem_node(NODE_DATA(node)); | 492 | totalram_pages += free_all_bootmem_node(NODE_DATA(node)); |
545 | |||
546 | /* | ||
547 | * We need to manually do the other slots. | ||
548 | */ | ||
549 | numslots = node_getlastslot(node); | ||
550 | for (slot = 1; slot <= numslots; slot++) { | ||
551 | p = nid_page_nr(node, slot_getbasepfn(node, slot) - | ||
552 | slot_getbasepfn(node, 0)); | ||
553 | |||
554 | /* | ||
555 | * Free valid memory in current slot. | ||
556 | */ | ||
557 | for (end = p + slot_getsize(node, slot); p < end; p++) { | ||
558 | /* if (!page_is_ram(pgnr)) continue; */ | ||
559 | /* commented out until page_is_ram works */ | ||
560 | ClearPageReserved(p); | ||
561 | init_page_count(p); | ||
562 | __free_page(p); | ||
563 | totalram_pages++; | ||
564 | } | ||
565 | } | ||
566 | } | 493 | } |
567 | 494 | ||
568 | totalram_pages -= setup_zero_pages(); /* This comes from node 0 */ | 495 | totalram_pages -= setup_zero_pages(); /* This comes from node 0 */ |
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c index f15fc93d6b35..ba5cdebeaf0d 100644 --- a/arch/mips/sgi-ip27/ip27-smp.c +++ b/arch/mips/sgi-ip27/ip27-smp.c | |||
@@ -176,11 +176,14 @@ static void ip27_send_ipi_mask(cpumask_t mask, unsigned int action) | |||
176 | static void __cpuinit ip27_init_secondary(void) | 176 | static void __cpuinit ip27_init_secondary(void) |
177 | { | 177 | { |
178 | per_cpu_init(); | 178 | per_cpu_init(); |
179 | local_irq_enable(); | ||
180 | } | 179 | } |
181 | 180 | ||
182 | static void __cpuinit ip27_smp_finish(void) | 181 | static void __cpuinit ip27_smp_finish(void) |
183 | { | 182 | { |
183 | extern void hub_rt_clock_event_init(void); | ||
184 | |||
185 | hub_rt_clock_event_init(); | ||
186 | local_irq_enable(); | ||
184 | } | 187 | } |
185 | 188 | ||
186 | static void __init ip27_cpus_done(void) | 189 | static void __init ip27_cpus_done(void) |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index 9cebc9e7da63..8b4e854af925 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
@@ -160,10 +160,13 @@ static void rt_set_mode(enum clock_event_mode mode, | |||
160 | 160 | ||
161 | int rt_timer_irq; | 161 | int rt_timer_irq; |
162 | 162 | ||
163 | static DEFINE_PER_CPU(struct clock_event_device, hub_rt_clockevent); | ||
164 | static DEFINE_PER_CPU(char [11], hub_rt_name); | ||
165 | |||
163 | static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id) | 166 | static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id) |
164 | { | 167 | { |
165 | struct clock_event_device *cd = dev_id; | ||
166 | unsigned int cpu = smp_processor_id(); | 168 | unsigned int cpu = smp_processor_id(); |
169 | struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu); | ||
167 | int slice = cputoslice(cpu); | 170 | int slice = cputoslice(cpu); |
168 | 171 | ||
169 | /* | 172 | /* |
@@ -192,10 +195,7 @@ struct irqaction hub_rt_irqaction = { | |||
192 | #define NSEC_PER_CYCLE 800 | 195 | #define NSEC_PER_CYCLE 800 |
193 | #define CYCLES_PER_SEC (NSEC_PER_SEC / NSEC_PER_CYCLE) | 196 | #define CYCLES_PER_SEC (NSEC_PER_SEC / NSEC_PER_CYCLE) |
194 | 197 | ||
195 | static DEFINE_PER_CPU(struct clock_event_device, hub_rt_clockevent); | 198 | void __cpuinit hub_rt_clock_event_init(void) |
196 | static DEFINE_PER_CPU(char [11], hub_rt_name); | ||
197 | |||
198 | static void __cpuinit hub_rt_clock_event_init(void) | ||
199 | { | 199 | { |
200 | unsigned int cpu = smp_processor_id(); | 200 | unsigned int cpu = smp_processor_id(); |
201 | struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu); | 201 | struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu); |
@@ -203,17 +203,16 @@ static void __cpuinit hub_rt_clock_event_init(void) | |||
203 | int irq = rt_timer_irq; | 203 | int irq = rt_timer_irq; |
204 | 204 | ||
205 | sprintf(name, "hub-rt %d", cpu); | 205 | sprintf(name, "hub-rt %d", cpu); |
206 | cd->name = "HUB-RT", | 206 | cd->name = name; |
207 | cd->features = CLOCK_EVT_FEAT_ONESHOT, | 207 | cd->features = CLOCK_EVT_FEAT_ONESHOT; |
208 | clockevent_set_clock(cd, CYCLES_PER_SEC); | 208 | clockevent_set_clock(cd, CYCLES_PER_SEC); |
209 | cd->max_delta_ns = clockevent_delta2ns(0xfffffffffffff, cd); | 209 | cd->max_delta_ns = clockevent_delta2ns(0xfffffffffffff, cd); |
210 | cd->min_delta_ns = clockevent_delta2ns(0x300, cd); | 210 | cd->min_delta_ns = clockevent_delta2ns(0x300, cd); |
211 | cd->rating = 200, | 211 | cd->rating = 200; |
212 | cd->irq = irq, | 212 | cd->irq = irq; |
213 | cd->cpumask = cpumask_of_cpu(cpu), | 213 | cd->cpumask = cpumask_of_cpu(cpu); |
214 | cd->rating = 300, | 214 | cd->set_next_event = rt_next_event; |
215 | cd->set_next_event = rt_next_event, | 215 | cd->set_mode = rt_set_mode; |
216 | cd->set_mode = rt_set_mode, | ||
217 | clockevents_register_device(cd); | 216 | clockevents_register_device(cd); |
218 | } | 217 | } |
219 | 218 | ||
@@ -261,6 +260,7 @@ void __init plat_time_init(void) | |||
261 | { | 260 | { |
262 | hub_rt_clocksource_init(); | 261 | hub_rt_clocksource_init(); |
263 | hub_rt_clock_event_global_init(); | 262 | hub_rt_clock_event_global_init(); |
263 | hub_rt_clock_event_init(); | ||
264 | } | 264 | } |
265 | 265 | ||
266 | void __cpuinit cpu_time_init(void) | 266 | void __cpuinit cpu_time_init(void) |
@@ -281,7 +281,6 @@ void __cpuinit cpu_time_init(void) | |||
281 | 281 | ||
282 | printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed); | 282 | printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed); |
283 | 283 | ||
284 | hub_rt_clock_event_init(); | ||
285 | set_c0_status(SRB_TIMOCLK); | 284 | set_c0_status(SRB_TIMOCLK); |
286 | } | 285 | } |
287 | 286 | ||