Merge tag 'for-3.7-rc1' of git://gitorious.org/linux-pwm/linux-pwm

Pull pwm changes from Thierry Reding:
 "All legacy PWM providers have now been moved to the PWM subsystem.
  The plan for 3.8 is to adapt all board files to provide a lookup table
  for PWM devices in order to get rid of the global namespace.
  Subsequently, users of the legacy pwm_request() and pwm_free()
  functions can be migrated to the new pwm_get() and pwm_put()
  functions.  Once this has been completed, the legacy API and the
  compatibility code in the core can be removed.

  In addition to the above, these changes also add support for
  configuring the polarity of a PWM signal (currently only supported on
  ECAP and EHRPWM) and include a much needed rework of the i.MX driver.
  Managed functions to obtain and release a PWM device (devm_pwm_get()
  and devm_pwm_put()) have been added and the pwm-backlight driver has
  been updated to use them.  If the PWM subsystem hasn't been enabled,
  dummy functions are provided that allow the subsystem to safely
  compile out.

  Some common checks on input parameters have been moved to the core and
  removed from the drivers.  Finally, a small fix corrects the
  description of the PWM specifier's second cell in the device tree
  representation."

* tag 'for-3.7-rc1' of git://gitorious.org/linux-pwm/linux-pwm: (23 commits)
  pwm: dt: Fix description of second PWM cell
  pwm: Check for negative duty-cycle and period
  pwm: Add Ingenic JZ4740 support
  MIPS: JZ4740: Export timer API
  pwm: Move PUV3 PWM driver to PWM framework
  unicore32: pwm: Use managed resource allocations
  unicore32: pwm: Remove unnecessary indirection
  unicore32: pwm: Use module_platform_driver()
  unicore32: pwm: Properly remap memory-mapped registers
  pwm-backlight: Use devm_pwm_get() instead of pwm_get()
  pwm: Move AB8500 PWM driver to PWM framework
  pwm: Fix compilation error when CONFIG_PWM is not defined
  pwm: i.MX: fix clock lookup
  pwm: i.MX: use per clock unconditionally
  pwm: i.MX: add devicetree support
  pwm: i.MX: Use module_platform_driver
  pwm: i.MX: add functions to enable/disable pwm.
  pwm: i.MX: remove unnecessary if in pwm_[en|dis]able
  pwm: i.MX: factor out SoC specific functions
  pwm: pwm-tiehrpwm: Add support for configuring polarity of PWM
  ...

10 files changed, 125 insertions, 320 deletions

diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h
index 564ab81d6cdc..163e81db880d 100644
--- a/arch/mips/include/asm/mach-jz4740/platform.h
+++ b/arch/mips/include/asm/mach-jz4740/platform.h
@@ -31,6 +31,7 @@ extern struct platform_device jz4740_pcm_device;
 extern struct platform_device jz4740_codec_device;
 extern struct platform_device jz4740_adc_device;
 extern struct platform_device jz4740_wdt_device;
+extern struct platform_device jz4740_pwm_device;
 
 void jz4740_serial_device_register(void);
 
diff --git a/arch/mips/include/asm/mach-jz4740/timer.h b/arch/mips/include/asm/mach-jz4740/timer.h
index 9baa03ce748c..a7759fb1f73d 100644
--- a/arch/mips/include/asm/mach-jz4740/timer.h
+++ b/arch/mips/include/asm/mach-jz4740/timer.h
@@ -16,7 +16,120 @@
 #ifndef __ASM_MACH_JZ4740_TIMER
 #define __ASM_MACH_JZ4740_TIMER
 
+#define JZ_REG_TIMER_STOP               0x0C
+#define JZ_REG_TIMER_STOP_SET           0x1C
+#define JZ_REG_TIMER_STOP_CLEAR         0x2C
+#define JZ_REG_TIMER_ENABLE             0x00
+#define JZ_REG_TIMER_ENABLE_SET         0x04
+#define JZ_REG_TIMER_ENABLE_CLEAR       0x08
+#define JZ_REG_TIMER_FLAG               0x10
+#define JZ_REG_TIMER_FLAG_SET           0x14
+#define JZ_REG_TIMER_FLAG_CLEAR         0x18
+#define JZ_REG_TIMER_MASK               0x20
+#define JZ_REG_TIMER_MASK_SET           0x24
+#define JZ_REG_TIMER_MASK_CLEAR         0x28
+
+#define JZ_REG_TIMER_DFR(x) (((x) * 0x10) + 0x30)
+#define JZ_REG_TIMER_DHR(x) (((x) * 0x10) + 0x34)
+#define JZ_REG_TIMER_CNT(x) (((x) * 0x10) + 0x38)
+#define JZ_REG_TIMER_CTRL(x) (((x) * 0x10) + 0x3C)
+
+#define JZ_TIMER_IRQ_HALF(x) BIT((x) + 0x10)
+#define JZ_TIMER_IRQ_FULL(x) BIT(x)
+
+#define JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN      BIT(9)
+#define JZ_TIMER_CTRL_PWM_ACTIVE_LOW            BIT(8)
+#define JZ_TIMER_CTRL_PWM_ENABLE                BIT(7)
+#define JZ_TIMER_CTRL_PRESCALE_MASK             0x1c
+#define JZ_TIMER_CTRL_PRESCALE_OFFSET           0x3
+#define JZ_TIMER_CTRL_PRESCALE_1                (0 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_4                (1 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_16               (2 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_64               (3 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_256              (4 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_1024             (5 << 3)
+
+#define JZ_TIMER_CTRL_PRESCALER(x) ((x) << JZ_TIMER_CTRL_PRESCALE_OFFSET)
+
+#define JZ_TIMER_CTRL_SRC_EXT           BIT(2)
+#define JZ_TIMER_CTRL_SRC_RTC           BIT(1)
+#define JZ_TIMER_CTRL_SRC_PCLK          BIT(0)
+
+extern void __iomem *jz4740_timer_base;
+void __init jz4740_timer_init(void);
+
 void jz4740_timer_enable_watchdog(void);
 void jz4740_timer_disable_watchdog(void);
 
+static inline void jz4740_timer_stop(unsigned int timer)
+{
+        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
+}
+
+static inline void jz4740_timer_start(unsigned int timer)
+{
+        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
+}
+
+static inline bool jz4740_timer_is_enabled(unsigned int timer)
+{
+        return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer);
+}
+
+static inline void jz4740_timer_enable(unsigned int timer)
+{
+        writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
+}
+
+static inline void jz4740_timer_disable(unsigned int timer)
+{
+        writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
+}
+
+static inline void jz4740_timer_set_period(unsigned int timer, uint16_t period)
+{
+        writew(period, jz4740_timer_base + JZ_REG_TIMER_DFR(timer));
+}
+
+static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty)
+{
+        writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer));
+}
+
+static inline void jz4740_timer_set_count(unsigned int timer, uint16_t count)
+{
+        writew(count, jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
+}
+
+static inline uint16_t jz4740_timer_get_count(unsigned int timer)
+{
+        return readw(jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
+}
+
+static inline void jz4740_timer_ack_full(unsigned int timer)
+{
+        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
+}
+
+static inline void jz4740_timer_irq_full_enable(unsigned int timer)
+{
+        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
+        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_CLEAR);
+}
+
+static inline void jz4740_timer_irq_full_disable(unsigned int timer)
+{
+        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_SET);
+}
+
+static inline void jz4740_timer_set_ctrl(unsigned int timer, uint16_t ctrl)
+{
+        writew(ctrl, jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
+}
+
+static inline uint16_t jz4740_timer_get_ctrl(unsigned int timer)
+{
+        return readw(jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
+}
+
 #endif
diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig
index 3e7141f0746c..468903053883 100644
--- a/arch/mips/jz4740/Kconfig
+++ b/arch/mips/jz4740/Kconfig
@@ -7,6 +7,3 @@ config JZ4740_QI_LB60
         bool "Qi Hardware Ben NanoNote"
 
 endchoice
-
-config HAVE_PWM
-        bool
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index e44abea9c209..63bad0e491d0 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -5,7 +5,7 @@
 # Object file lists.
 
 obj-y += prom.o irq.o time.o reset.o setup.o dma.o \
-        gpio.o clock.o platform.o timer.o pwm.o serial.o
+        gpio.o clock.o platform.o timer.o serial.o
 
 obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o
 
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 9a3d9de4d04e..43d964d36288 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -437,6 +437,7 @@ static struct platform_device *jz_platform_devices[] __initdata = {
         &jz4740_codec_device,
         &jz4740_rtc_device,
         &jz4740_adc_device,
+        &jz4740_pwm_device,
         &qi_lb60_gpio_keys,
         &qi_lb60_pwm_beeper,
         &qi_lb60_charger_device,
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index e342ed4cbd43..6d14dcdbd908 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -323,3 +323,9 @@ struct platform_device jz4740_wdt_device = {
         .num_resources = ARRAY_SIZE(jz4740_wdt_resources),
         .resource      = jz4740_wdt_resources,
 };
+
+/* PWM */
+struct platform_device jz4740_pwm_device = {
+        .name = "jz4740-pwm",
+        .id   = -1,
+};
diff --git a/arch/mips/jz4740/pwm.c b/arch/mips/jz4740/pwm.c
deleted file mode 100644
index a26a6faec9a6..000000000000
--- a/arch/mips/jz4740/pwm.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- *  JZ4740 platform PWM support
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under  the terms of the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the License, or (at your
- *  option) any later version.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <linux/kernel.h>
-
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/pwm.h>
-#include <linux/gpio.h>
-
-#include <asm/mach-jz4740/gpio.h>
-#include "timer.h"
-
-static struct clk *jz4740_pwm_clk;
-
-DEFINE_MUTEX(jz4740_pwm_mutex);
-
-struct pwm_device {
-        unsigned int id;
-        unsigned int gpio;
-        bool used;
-};
-
-static struct pwm_device jz4740_pwm_list[] = {
-        { 2, JZ_GPIO_PWM2, false },
-        { 3, JZ_GPIO_PWM3, false },
-        { 4, JZ_GPIO_PWM4, false },
-        { 5, JZ_GPIO_PWM5, false },
-        { 6, JZ_GPIO_PWM6, false },
-        { 7, JZ_GPIO_PWM7, false },
-};
-
-struct pwm_device *pwm_request(int id, const char *label)
-{
-        int ret = 0;
-        struct pwm_device *pwm;
-
-        if (id < 2 || id > 7 || !jz4740_pwm_clk)
-                return ERR_PTR(-ENODEV);
-
-        mutex_lock(&jz4740_pwm_mutex);
-
-        pwm = &jz4740_pwm_list[id - 2];
-        if (pwm->used)
-                ret = -EBUSY;
-        else
-                pwm->used = true;
-
-        mutex_unlock(&jz4740_pwm_mutex);
-
-        if (ret)
-                return ERR_PTR(ret);
-
-        ret = gpio_request(pwm->gpio, label);
-
-        if (ret) {
-                printk(KERN_ERR "Failed to request pwm gpio: %d\n", ret);
-                pwm->used = false;
-                return ERR_PTR(ret);
-        }
-
-        jz_gpio_set_function(pwm->gpio, JZ_GPIO_FUNC_PWM);
-
-        jz4740_timer_start(id);
-
-        return pwm;
-}
-
-void pwm_free(struct pwm_device *pwm)
-{
-        pwm_disable(pwm);
-        jz4740_timer_set_ctrl(pwm->id, 0);
-
-        jz_gpio_set_function(pwm->gpio, JZ_GPIO_FUNC_NONE);
-        gpio_free(pwm->gpio);
-
-        jz4740_timer_stop(pwm->id);
-
-        pwm->used = false;
-}
-
-int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
-{
-        unsigned long long tmp;
-        unsigned long period, duty;
-        unsigned int prescaler = 0;
-        unsigned int id = pwm->id;
-        uint16_t ctrl;
-        bool is_enabled;
-
-        if (duty_ns < 0 || duty_ns > period_ns)
-                return -EINVAL;
-
-        tmp = (unsigned long long)clk_get_rate(jz4740_pwm_clk) * period_ns;
-        do_div(tmp, 1000000000);
-        period = tmp;
-
-        while (period > 0xffff && prescaler < 6) {
-                period >>= 2;
-                ++prescaler;
-        }
-
-        if (prescaler == 6)
-                return -EINVAL;
-
-        tmp = (unsigned long long)period * duty_ns;
-        do_div(tmp, period_ns);
-        duty = period - tmp;
-
-        if (duty >= period)
-                duty = period - 1;
-
-        is_enabled = jz4740_timer_is_enabled(id);
-        if (is_enabled)
-                pwm_disable(pwm);
-
-        jz4740_timer_set_count(id, 0);
-        jz4740_timer_set_duty(id, duty);
-        jz4740_timer_set_period(id, period);
-
-        ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) | JZ_TIMER_CTRL_SRC_EXT |
-                JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN;
-
-        jz4740_timer_set_ctrl(id, ctrl);
-
-        if (is_enabled)
-                pwm_enable(pwm);
-
-        return 0;
-}
-
-int pwm_enable(struct pwm_device *pwm)
-{
-        uint32_t ctrl = jz4740_timer_get_ctrl(pwm->id);
-
-        ctrl |= JZ_TIMER_CTRL_PWM_ENABLE;
-        jz4740_timer_set_ctrl(pwm->id, ctrl);
-        jz4740_timer_enable(pwm->id);
-
-        return 0;
-}
-
-void pwm_disable(struct pwm_device *pwm)
-{
-        uint32_t ctrl = jz4740_timer_get_ctrl(pwm->id);
-
-        ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
-        jz4740_timer_disable(pwm->id);
-        jz4740_timer_set_ctrl(pwm->id, ctrl);
-}
-
-static int __init jz4740_pwm_init(void)
-{
-        int ret = 0;
-
-        jz4740_pwm_clk = clk_get(NULL, "ext");
-
-        if (IS_ERR(jz4740_pwm_clk)) {
-                ret = PTR_ERR(jz4740_pwm_clk);
-                jz4740_pwm_clk = NULL;
-        }
-
-        return ret;
-}
-subsys_initcall(jz4740_pwm_init);
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
index f83c2dd07a27..39bb4bbf43e7 100644
--- a/arch/mips/jz4740/time.c
+++ b/arch/mips/jz4740/time.c
@@ -20,10 +20,10 @@
 #include <linux/clockchips.h>
 
 #include <asm/mach-jz4740/irq.h>
+#include <asm/mach-jz4740/timer.h>
 #include <asm/time.h>
 
 #include "clock.h"
-#include "timer.h"
 
 #define TIMER_CLOCKEVENT 0
 #define TIMER_CLOCKSOURCE 1
diff --git a/arch/mips/jz4740/timer.c b/arch/mips/jz4740/timer.c
index 654d5c3900b6..22f11d73a17d 100644
--- a/arch/mips/jz4740/timer.c
+++ b/arch/mips/jz4740/timer.c
@@ -17,11 +17,11 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 
-#include "timer.h"
-
 #include <asm/mach-jz4740/base.h>
+#include <asm/mach-jz4740/timer.h>
 
 void __iomem *jz4740_timer_base;
+EXPORT_SYMBOL_GPL(jz4740_timer_base);
 
 void jz4740_timer_enable_watchdog(void)
 {
diff --git a/arch/mips/jz4740/timer.h b/arch/mips/jz4740/timer.h
deleted file mode 100644
index fca3994f2e6d..000000000000
--- a/arch/mips/jz4740/timer.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- *  JZ4740 platform timer support
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under  the terms of the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the License, or (at your
- *  option) any later version.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef __MIPS_JZ4740_TIMER_H__
-#define __MIPS_JZ4740_TIMER_H__
-
-#include <linux/module.h>
-#include <linux/io.h>
-
-#define JZ_REG_TIMER_STOP               0x0C
-#define JZ_REG_TIMER_STOP_SET           0x1C
-#define JZ_REG_TIMER_STOP_CLEAR         0x2C
-#define JZ_REG_TIMER_ENABLE             0x00
-#define JZ_REG_TIMER_ENABLE_SET         0x04
-#define JZ_REG_TIMER_ENABLE_CLEAR       0x08
-#define JZ_REG_TIMER_FLAG               0x10
-#define JZ_REG_TIMER_FLAG_SET           0x14
-#define JZ_REG_TIMER_FLAG_CLEAR         0x18
-#define JZ_REG_TIMER_MASK               0x20
-#define JZ_REG_TIMER_MASK_SET           0x24
-#define JZ_REG_TIMER_MASK_CLEAR         0x28
-
-#define JZ_REG_TIMER_DFR(x) (((x) * 0x10) + 0x30)
-#define JZ_REG_TIMER_DHR(x) (((x) * 0x10) + 0x34)
-#define JZ_REG_TIMER_CNT(x) (((x) * 0x10) + 0x38)
-#define JZ_REG_TIMER_CTRL(x) (((x) * 0x10) + 0x3C)
-
-#define JZ_TIMER_IRQ_HALF(x) BIT((x) + 0x10)
-#define JZ_TIMER_IRQ_FULL(x) BIT(x)
-
-#define JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN      BIT(9)
-#define JZ_TIMER_CTRL_PWM_ACTIVE_LOW            BIT(8)
-#define JZ_TIMER_CTRL_PWM_ENABLE                BIT(7)
-#define JZ_TIMER_CTRL_PRESCALE_MASK             0x1c
-#define JZ_TIMER_CTRL_PRESCALE_OFFSET           0x3
-#define JZ_TIMER_CTRL_PRESCALE_1                (0 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_4                (1 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_16               (2 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_64               (3 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_256              (4 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_1024             (5 << 3)
-
-#define JZ_TIMER_CTRL_PRESCALER(x) ((x) << JZ_TIMER_CTRL_PRESCALE_OFFSET)
-
-#define JZ_TIMER_CTRL_SRC_EXT           BIT(2)
-#define JZ_TIMER_CTRL_SRC_RTC           BIT(1)
-#define JZ_TIMER_CTRL_SRC_PCLK          BIT(0)
-
-extern void __iomem *jz4740_timer_base;
-void __init jz4740_timer_init(void);
-
-static inline void jz4740_timer_stop(unsigned int timer)
-{
-        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
-}
-
-static inline void jz4740_timer_start(unsigned int timer)
-{
-        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
-}
-
-static inline bool jz4740_timer_is_enabled(unsigned int timer)
-{
-        return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer);
-}
-
-static inline void jz4740_timer_enable(unsigned int timer)
-{
-        writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
-}
-
-static inline void jz4740_timer_disable(unsigned int timer)
-{
-        writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
-}
-
-
-static inline void jz4740_timer_set_period(unsigned int timer, uint16_t period)
-{
-        writew(period, jz4740_timer_base + JZ_REG_TIMER_DFR(timer));
-}
-
-static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty)
-{
-        writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer));
-}
-
-static inline void jz4740_timer_set_count(unsigned int timer, uint16_t count)
-{
-        writew(count, jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
-}
-
-static inline uint16_t jz4740_timer_get_count(unsigned int timer)
-{
-        return readw(jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
-}
-
-static inline void jz4740_timer_ack_full(unsigned int timer)
-{
-        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
-}
-
-static inline void jz4740_timer_irq_full_enable(unsigned int timer)
-{
-        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
-        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_CLEAR);
-}
-
-static inline void jz4740_timer_irq_full_disable(unsigned int timer)
-{
-        writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_SET);
-}
-
-static inline void jz4740_timer_set_ctrl(unsigned int timer, uint16_t ctrl)
-{
-        writew(ctrl, jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
-}
-
-static inline uint16_t jz4740_timer_get_ctrl(unsigned int timer)
-{
-        return readw(jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
-}
-
-#endif