MIPS: ath79: Use a helper function to get system clock rates

The ath79 platform uses similar code to get the
rate of various clocks during init. Separate the
similar code into a new helper function and use
that to avoid code duplication.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5778/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4 files changed, 25 insertions, 11 deletions

diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index 4378d63bc3ed..c8351b46e566 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -400,6 +400,22 @@ void __init ath79_clocks_init(void)
                 (ath79_ref_clk.rate / 1000) % 1000);
 }
 
+unsigned long __init
+ath79_get_sys_clk_rate(const char *id)
+{
+        struct clk *clk;
+        unsigned long rate;
+
+        clk = clk_get(NULL, id);
+        if (IS_ERR(clk))
+                panic("unable to get %s clock, err=%d", id, (int) PTR_ERR(clk));
+
+        rate = clk_get_rate(clk);
+        clk_put(clk);
+
+        return rate;
+}
+
 /*
  * Linux clock API
  */
diff --git a/arch/mips/ath79/common.h b/arch/mips/ath79/common.h
index 561906c2345e..648d2dafbc56 100644
--- a/arch/mips/ath79/common.h
+++ b/arch/mips/ath79/common.h
@@ -21,6 +21,8 @@
 #define ATH79_MEM_SIZE_MAX      (128 * 1024 * 1024)
 
 void ath79_clocks_init(void);
+unsigned long ath79_get_sys_clk_rate(const char *id);
+
 void ath79_ddr_wb_flush(unsigned int reg);
 
 void ath79_gpio_function_enable(u32 mask);
diff --git a/arch/mips/ath79/dev-common.c b/arch/mips/ath79/dev-common.c
index a3a2741d0688..c3b04c929f29 100644
--- a/arch/mips/ath79/dev-common.c
+++ b/arch/mips/ath79/dev-common.c
@@ -81,21 +81,19 @@ static struct platform_device ar933x_uart_device = {
 
 void __init ath79_register_uart(void)
 {
-        struct clk *clk;
+        unsigned long uart_clk_rate;
 
-        clk = clk_get(NULL, "uart");
-        if (IS_ERR(clk))
-                panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
+        uart_clk_rate = ath79_get_sys_clk_rate("uart");
 
         if (soc_is_ar71xx() ||
             soc_is_ar724x() ||
             soc_is_ar913x() ||
             soc_is_ar934x() ||
             soc_is_qca955x()) {
-                ath79_uart_data[0].uartclk = clk_get_rate(clk);
+                ath79_uart_data[0].uartclk = uart_clk_rate;
                 platform_device_register(&ath79_uart_device);
         } else if (soc_is_ar933x()) {
-                ar933x_uart_data.uartclk = clk_get_rate(clk);
+                ar933x_uart_data.uartclk = uart_clk_rate;
                 platform_device_register(&ar933x_uart_device);
         } else {
                 BUG();
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index 80f4ecd42b0d..e3b83456d64e 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -209,13 +209,11 @@ void __init plat_mem_setup(void)
 
 void __init plat_time_init(void)
 {
-        struct clk *clk;
+        unsigned long cpu_clk_rate;
 
-        clk = clk_get(NULL, "cpu");
-        if (IS_ERR(clk))
-                panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
+        cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
 
-        mips_hpt_frequency = clk_get_rate(clk) / 2;
+        mips_hpt_frequency = cpu_clk_rate / 2;
 }
 
 static int __init ath79_setup(void)