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authorAurelien Jarno <aurelien@aurel32.net>2007-09-25 09:40:12 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:02 -0400
commit1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 (patch)
treea274a6e2e56f519900fb35c544ddf279f38ca8d6 /arch/mips
parentea202c632a52c4a83f1bd82d8d06bc8e04f2689a (diff)
[MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this is not a mistake in the code. It originally comes from the OpenWrt patches. Cc: Michael Buesch <mb@bu3sch.de> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Florian Schirmer <jolt@tuxbox.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig14
-rw-r--r--arch/mips/Makefile7
-rw-r--r--arch/mips/bcm47xx/Makefile6
-rw-r--r--arch/mips/bcm47xx/irq.c55
-rw-r--r--arch/mips/bcm47xx/prom.c49
-rw-r--r--arch/mips/bcm47xx/serial.c52
-rw-r--r--arch/mips/bcm47xx/setup.c79
-rw-r--r--arch/mips/bcm47xx/time.c56
-rw-r--r--arch/mips/kernel/cpu-probe.c20
-rw-r--r--arch/mips/kernel/proc.c2
-rw-r--r--arch/mips/mm/tlbex.c2
11 files changed, 342 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a8bdc084e10c..6648f9b914e7 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -44,6 +44,20 @@ config BASLER_EXCITE_PROTOTYPE
44 note that a kernel built with this option selected will not be 44 note that a kernel built with this option selected will not be
45 able to run on normal units. 45 able to run on normal units.
46 46
47config BCM47XX
48 bool "BCM47XX based boards"
49 select DMA_NONCOHERENT
50 select HW_HAS_PCI
51 select IRQ_CPU
52 select SYS_HAS_CPU_MIPS32_R1
53 select SYS_SUPPORTS_32BIT_KERNEL
54 select SYS_SUPPORTS_LITTLE_ENDIAN
55 select SSB
56 select SSB_DRIVER_MIPS
57 select GENERIC_GPIO
58 help
59 Support for BCM47XX based boards
60
47config MIPS_COBALT 61config MIPS_COBALT
48 bool "Cobalt Server" 62 bool "Cobalt Server"
49 select DMA_NONCOHERENT 63 select DMA_NONCOHERENT
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 6dcdbfb15ce3..7b936edd2c16 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -535,6 +535,13 @@ libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
535load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 535load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
536 536
537# 537#
538# Broadcom BCM47XX boards
539#
540core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/
541cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx
542load-$(CONFIG_BCM47XX) := 0xffffffff80001000
543
544#
538# SNI RM 545# SNI RM
539# 546#
540core-$(CONFIG_SNI_RM) += arch/mips/sni/ 547core-$(CONFIG_SNI_RM) += arch/mips/sni/
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile
new file mode 100644
index 000000000000..dc035f90d363
--- /dev/null
+++ b/arch/mips/bcm47xx/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for the BCM47XX specific kernel interface routines
3# under Linux.
4#
5
6obj-y := irq.o prom.o serial.o setup.o time.o
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
new file mode 100644
index 000000000000..325757acd020
--- /dev/null
+++ b/arch/mips/bcm47xx/irq.c
@@ -0,0 +1,55 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#include <linux/types.h>
26#include <linux/interrupt.h>
27#include <linux/irq.h>
28#include <asm/irq_cpu.h>
29
30void plat_irq_dispatch(void)
31{
32 u32 cause;
33
34 cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
35
36 clear_c0_status(cause);
37
38 if (cause & CAUSEF_IP7)
39 do_IRQ(7);
40 if (cause & CAUSEF_IP2)
41 do_IRQ(2);
42 if (cause & CAUSEF_IP3)
43 do_IRQ(3);
44 if (cause & CAUSEF_IP4)
45 do_IRQ(4);
46 if (cause & CAUSEF_IP5)
47 do_IRQ(5);
48 if (cause & CAUSEF_IP6)
49 do_IRQ(6);
50}
51
52void __init arch_init_irq(void)
53{
54 mips_cpu_irq_init();
55}
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
new file mode 100644
index 000000000000..41ac9dd88bde
--- /dev/null
+++ b/arch/mips/bcm47xx/prom.c
@@ -0,0 +1,49 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#include <linux/init.h>
26#include <asm/bootinfo.h>
27
28const char *get_system_type(void)
29{
30 return "Broadcom BCM47XX";
31}
32
33void __init prom_init(void)
34{
35 unsigned long mem;
36
37 /* Figure out memory size by finding aliases */
38 for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) {
39 if (*(unsigned long *)((unsigned long)(prom_init) + mem) ==
40 *(unsigned long *)(prom_init))
41 break;
42 }
43
44 add_memory_region(0, mem, BOOT_MEM_RAM);
45}
46
47void __init prom_free_prom_memory(void)
48{
49}
diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c
new file mode 100644
index 000000000000..59c11afdb2ab
--- /dev/null
+++ b/arch/mips/bcm47xx/serial.c
@@ -0,0 +1,52 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
7 */
8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/serial.h>
12#include <linux/serial_8250.h>
13#include <linux/ssb/ssb.h>
14#include <bcm47xx.h>
15
16static struct plat_serial8250_port uart8250_data[5];
17
18static struct platform_device uart8250_device = {
19 .name = "serial8250",
20 .id = PLAT8250_DEV_PLATFORM,
21 .dev = {
22 .platform_data = uart8250_data,
23 },
24};
25
26static int __init uart8250_init(void)
27{
28 int i;
29 struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);
30
31 memset(&uart8250_data, 0, sizeof(uart8250_data));
32
33 for (i = 0; i < mcore->nr_serial_ports; i++) {
34 struct plat_serial8250_port *p = &(uart8250_data[i]);
35 struct ssb_serial_port *ssb_port = &(mcore->serial_ports[i]);
36
37 p->mapbase = (unsigned int) ssb_port->regs;
38 p->membase = (void *) ssb_port->regs;
39 p->irq = ssb_port->irq + 2;
40 p->uartclk = ssb_port->baud_base;
41 p->regshift = ssb_port->reg_shift;
42 p->iotype = UPIO_MEM;
43 p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
44 }
45 return platform_device_register(&uart8250_device);
46}
47
48module_init(uart8250_init);
49
50MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
51MODULE_LICENSE("GPL");
52MODULE_DESCRIPTION("8250 UART probe driver for the BCM47XX platforms");
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
new file mode 100644
index 000000000000..dfc580aae958
--- /dev/null
+++ b/arch/mips/bcm47xx/setup.c
@@ -0,0 +1,79 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
4 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
5 * Copyright (C) 2006 Michael Buesch <mb@bu3sch.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/types.h>
29#include <linux/ssb/ssb.h>
30#include <asm/reboot.h>
31#include <asm/time.h>
32#include <bcm47xx.h>
33
34struct ssb_bus ssb_bcm47xx;
35EXPORT_SYMBOL(ssb_bcm47xx);
36
37static void bcm47xx_machine_restart(char *command)
38{
39 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
40 local_irq_disable();
41 /* Set the watchdog timer to reset immediately */
42 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
43 while (1)
44 cpu_relax();
45}
46
47static void bcm47xx_machine_halt(void)
48{
49 /* Disable interrupts and watchdog and spin forever */
50 local_irq_disable();
51 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
52 while (1)
53 cpu_relax();
54}
55
56static int bcm47xx_get_invariants(struct ssb_bus *bus,
57 struct ssb_init_invariants *iv)
58{
59 /* TODO: fill ssb_init_invariants using boardtype/boardrev
60 * CFE environment variables.
61 */
62 return 0;
63}
64
65void __init plat_mem_setup(void)
66{
67 int err;
68
69 err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
70 bcm47xx_get_invariants);
71 if (err)
72 panic("Failed to initialize SSB bus (err %d)\n", err);
73
74 _machine_restart = bcm47xx_machine_restart;
75 _machine_halt = bcm47xx_machine_halt;
76 pm_power_off = bcm47xx_machine_halt;
77 board_time_init = bcm47xx_time_init;
78}
79
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
new file mode 100644
index 000000000000..b27d07f29059
--- /dev/null
+++ b/arch/mips/bcm47xx/time.c
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25
26#include <linux/init.h>
27#include <linux/ssb/ssb.h>
28#include <asm/time.h>
29#include <bcm47xx.h>
30
31void __init
32bcm47xx_time_init(void)
33{
34 unsigned long hz;
35
36 /*
37 * Use deterministic values for initial counter interrupt
38 * so that calibrate delay avoids encountering a counter wrap.
39 */
40 write_c0_count(0);
41 write_c0_compare(0xffff);
42
43 hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2;
44 if (!hz)
45 hz = 100000000;
46
47 /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
48 mips_hpt_frequency = hz;
49}
50
51void __init
52plat_timer_setup(struct irqaction *irq)
53{
54 /* Enable the timer interrupt */
55 setup_irq(7, irq);
56}
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 3e004161ebd5..97c03865c06a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -159,6 +159,7 @@ static inline void check_wait(void)
159 case CPU_5KC: 159 case CPU_5KC:
160 case CPU_25KF: 160 case CPU_25KF:
161 case CPU_PR4450: 161 case CPU_PR4450:
162 case CPU_BCM3302:
162 cpu_wait = r4k_wait; 163 cpu_wait = r4k_wait;
163 break; 164 break;
164 165
@@ -793,6 +794,22 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c)
793} 794}
794 795
795 796
797static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
798{
799 decode_configs(c);
800 switch (c->processor_id & 0xff00) {
801 case PRID_IMP_BCM3302:
802 c->cputype = CPU_BCM3302;
803 break;
804 case PRID_IMP_BCM4710:
805 c->cputype = CPU_BCM4710;
806 break;
807 default:
808 c->cputype = CPU_UNKNOWN;
809 break;
810 }
811}
812
796__init void cpu_probe(void) 813__init void cpu_probe(void)
797{ 814{
798 struct cpuinfo_mips *c = &current_cpu_data; 815 struct cpuinfo_mips *c = &current_cpu_data;
@@ -815,6 +832,9 @@ __init void cpu_probe(void)
815 case PRID_COMP_SIBYTE: 832 case PRID_COMP_SIBYTE:
816 cpu_probe_sibyte(c); 833 cpu_probe_sibyte(c);
817 break; 834 break;
835 case PRID_COMP_BROADCOM:
836 cpu_probe_broadcom(c);
837 break;
818 case PRID_COMP_SANDCRAFT: 838 case PRID_COMP_SANDCRAFT:
819 cpu_probe_sandcraft(c); 839 cpu_probe_sandcraft(c);
820 break; 840 break;
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index ec04f5a1a5ea..accd5201d0e1 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -82,6 +82,8 @@ static const char *cpu_name[] = {
82 [CPU_VR4181] = "NEC VR4181", 82 [CPU_VR4181] = "NEC VR4181",
83 [CPU_VR4181A] = "NEC VR4181A", 83 [CPU_VR4181A] = "NEC VR4181A",
84 [CPU_SR71000] = "Sandcraft SR71000", 84 [CPU_SR71000] = "Sandcraft SR71000",
85 [CPU_BCM3302] = "Broadcom BCM3302",
86 [CPU_BCM4710] = "Broadcom BCM4710",
85 [CPU_PR4450] = "Philips PR4450", 87 [CPU_PR4450] = "Philips PR4450",
86 [CPU_LOONGSON2] = "ICT Loongson-2", 88 [CPU_LOONGSON2] = "ICT Loongson-2",
87}; 89};
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 6c425b052442..b2c6b9e47564 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -908,6 +908,8 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
908 case CPU_4KSC: 908 case CPU_4KSC:
909 case CPU_20KC: 909 case CPU_20KC:
910 case CPU_25KF: 910 case CPU_25KF:
911 case CPU_BCM3302:
912 case CPU_BCM4710:
911 case CPU_LOONGSON2: 913 case CPU_LOONGSON2:
912 if (m4kc_tlbp_war()) 914 if (m4kc_tlbp_war())
913 i_nop(p); 915 i_nop(p);