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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-11-22 13:06:44 -0500
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-11-22 13:06:44 -0500
commit0bd2af46839ad6262d25714a6ec0365db9d6b98f (patch)
treedcced72d230d69fd0c5816ac6dd03ab84799a93e /arch/mips
parente138a5d2356729b8752e88520cc1525fae9794ac (diff)
parentf26b90440cd74c78fe10c9bd5160809704a9627c (diff)
Merge ../scsi-rc-fixes-2.6
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig8
-rw-r--r--arch/mips/Makefile17
-rw-r--r--arch/mips/au1000/common/dbdma.c2
-rw-r--r--arch/mips/au1000/common/prom.c2
-rw-r--r--arch/mips/au1000/common/setup.c2
-rw-r--r--arch/mips/au1000/common/time.c106
-rw-r--r--arch/mips/configs/bigsur_defconfig102
-rw-r--r--arch/mips/configs/pnx8550-jbs_defconfig384
-rw-r--r--arch/mips/configs/pnx8550-v2pci_defconfig441
-rw-r--r--arch/mips/configs/tb0287_defconfig182
-rw-r--r--arch/mips/dec/time.c9
-rw-r--r--arch/mips/emma2rh/common/irq_emma2rh.c2
-rw-r--r--arch/mips/emma2rh/markeins/irq_markeins.c4
-rw-r--r--arch/mips/emma2rh/markeins/platform.c88
-rw-r--r--arch/mips/gt64120/common/time.c4
-rw-r--r--arch/mips/gt64120/ev64120/setup.c2
-rw-r--r--arch/mips/gt64120/momenco_ocelot/setup.c3
-rw-r--r--arch/mips/jazz/setup.c2
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c3
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c40
-rw-r--r--arch/mips/kernel/asm-offsets.c2
-rw-r--r--arch/mips/kernel/entry.S3
-rw-r--r--arch/mips/kernel/head.S3
-rw-r--r--arch/mips/kernel/irq.c42
-rw-r--r--arch/mips/kernel/linux32.c4
-rw-r--r--arch/mips/kernel/process.c8
-rw-r--r--arch/mips/kernel/r4k_switch.S5
-rw-r--r--arch/mips/kernel/scall32-o32.S5
-rw-r--r--arch/mips/kernel/scall64-64.S3
-rw-r--r--arch/mips/kernel/scall64-n32.S5
-rw-r--r--arch/mips/kernel/scall64-o32.S5
-rw-r--r--arch/mips/kernel/setup.c6
-rw-r--r--arch/mips/kernel/smp-mt.c154
-rw-r--r--arch/mips/kernel/smp.c2
-rw-r--r--arch/mips/kernel/smtc-asm.S7
-rw-r--r--arch/mips/kernel/smtc.c1
-rw-r--r--arch/mips/kernel/stacktrace.c2
-rw-r--r--arch/mips/kernel/time.c319
-rw-r--r--arch/mips/kernel/traps.c2
-rw-r--r--arch/mips/kernel/vmlinux.lds.S18
-rw-r--r--arch/mips/lib-64/dump_tlb.c6
-rw-r--r--arch/mips/mips-boards/generic/memory.c2
-rw-r--r--arch/mips/mips-boards/generic/pci.c2
-rw-r--r--arch/mips/mips-boards/generic/time.c9
-rw-r--r--arch/mips/mips-boards/malta/malta_int.c3
-rw-r--r--arch/mips/mips-boards/sim/sim_time.c2
-rw-r--r--arch/mips/mm/c-sb1.c20
-rw-r--r--arch/mips/mm/init.c167
-rw-r--r--arch/mips/mm/ioremap.c2
-rw-r--r--arch/mips/mm/pg-r4k.c30
-rw-r--r--arch/mips/mm/pgtable-32.c7
-rw-r--r--arch/mips/mm/pgtable-64.c11
-rw-r--r--arch/mips/mm/tlbex.c13
-rw-r--r--arch/mips/momentum/ocelot_3/Makefile2
-rw-r--r--arch/mips/momentum/ocelot_3/ocelot_3_fpga.h6
-rw-r--r--arch/mips/momentum/ocelot_3/platform.c235
-rw-r--r--arch/mips/momentum/ocelot_3/prom.c58
-rw-r--r--arch/mips/momentum/ocelot_3/setup.c2
-rw-r--r--arch/mips/momentum/ocelot_c/Makefile2
-rw-r--r--arch/mips/momentum/ocelot_c/ocelot_c_fpga.h6
-rw-r--r--arch/mips/momentum/ocelot_c/platform.c201
-rw-r--r--arch/mips/momentum/ocelot_c/prom.c60
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c23
-rw-r--r--arch/mips/momentum/ocelot_g/gt-irq.c8
-rw-r--r--arch/mips/momentum/ocelot_g/ocelot_pld.h6
-rw-r--r--arch/mips/momentum/ocelot_g/setup.c5
-rw-r--r--arch/mips/oprofile/op_impl.h2
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c12
-rw-r--r--arch/mips/oprofile/op_model_rm9000.c3
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-ev64120.c34
-rw-r--r--arch/mips/pci/pci-ev64120.c21
-rw-r--r--arch/mips/philips/pnx8550/common/time.c4
-rw-r--r--arch/mips/pmc-sierra/yosemite/i2c-yosemite.c2
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c6
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c23
-rw-r--r--arch/mips/sgi-ip27/ip27-klnuma.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c18
-rw-r--r--arch/mips/sgi-ip32/ip32-reset.c2
-rw-r--r--arch/mips/sibyte/bcm1480/smp.c6
-rw-r--r--arch/mips/sibyte/bcm1480/time.c33
-rw-r--r--arch/mips/sibyte/sb1250/bcm1250_tbprof.c4
-rw-r--r--arch/mips/sibyte/sb1250/bus_watcher.c2
-rw-r--r--arch/mips/sibyte/sb1250/time.c28
-rw-r--r--arch/mips/tx4927/common/smsc_fdc37m81x.c172
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c2
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c8
87 files changed, 2182 insertions, 1091 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 14af6cce2fa2..1443024b1c7c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -425,9 +425,8 @@ config MOMENCO_OCELOT_G
425 select SWAP_IO_SPACE 425 select SWAP_IO_SPACE
426 select SYS_HAS_CPU_RM7000 426 select SYS_HAS_CPU_RM7000
427 select SYS_SUPPORTS_32BIT_KERNEL 427 select SYS_SUPPORTS_32BIT_KERNEL
428 select SYS_SUPPORTS_64BIT_KERNEL 428 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
429 select SYS_SUPPORTS_BIG_ENDIAN 429 select SYS_SUPPORTS_BIG_ENDIAN
430 select ARCH_SPARSEMEM_ENABLE
431 help 430 help
432 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 431 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
433 Momentum Computer <http://www.momenco.com/>. 432 Momentum Computer <http://www.momenco.com/>.
@@ -560,6 +559,7 @@ config SGI_IP27
560 select SYS_SUPPORTS_64BIT_KERNEL 559 select SYS_SUPPORTS_64BIT_KERNEL
561 select SYS_SUPPORTS_BIG_ENDIAN 560 select SYS_SUPPORTS_BIG_ENDIAN
562 select SYS_SUPPORTS_NUMA 561 select SYS_SUPPORTS_NUMA
562 select SYS_SUPPORTS_SMP
563 help 563 help
564 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 564 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
565 workstations. To compile a Linux kernel that runs on these, say Y 565 workstations. To compile a Linux kernel that runs on these, say Y
@@ -1633,9 +1633,6 @@ config ARCH_DISCONTIGMEM_ENABLE
1633 1633
1634config ARCH_SPARSEMEM_ENABLE 1634config ARCH_SPARSEMEM_ENABLE
1635 bool 1635 bool
1636
1637config ARCH_SPARSEMEM_ENABLE
1638 bool
1639 select SPARSEMEM_STATIC 1636 select SPARSEMEM_STATIC
1640 1637
1641config NUMA 1638config NUMA
@@ -1690,6 +1687,7 @@ config NR_CPUS
1690 depends on SMP 1687 depends on SMP
1691 default "64" if SGI_IP27 1688 default "64" if SGI_IP27
1692 default "2" 1689 default "2"
1690 default "8" if MIPS_MT_SMTC
1693 help 1691 help
1694 This allows you to specify the maximum number of CPUs which this 1692 This allows you to specify the maximum number of CPUs which this
1695 kernel will support. The maximum supported value is 32 for 32-bit 1693 kernel will support. The maximum supported value is 32 for 32-bit
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2124350ab94d..d580d46f967b 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -63,7 +63,9 @@ cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64 63ifdef CONFIG_BUILD_ELF64
64cflags-y += $(call cc-option,-mno-explicit-relocs) 64cflags-y += $(call cc-option,-mno-explicit-relocs)
65else 65else
66cflags-y += $(call cc-option,-msym32) 66# -msym32 can not be used for modules since they are loaded into XKSEG
67CFLAGS_MODULE += $(call cc-option,-mno-explicit-relocs)
68CFLAGS_KERNEL += $(call cc-option,-msym32)
67endif 69endif
68endif 70endif
69 71
@@ -91,8 +93,17 @@ cflags-y += -ffreestanding
91# carefully avoid to add it redundantly because gcc 3.3/3.4 complains 93# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
92# when fed the toolchain default! 94# when fed the toolchain default!
93# 95#
94cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB -D__MIPSEB__) 96# Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of
95cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL -D__MIPSEL__) 97# 2006-10-10 don't properly change the the predefined symbols if -EB / -EL
98# are used, so we kludge that here. A bug has been filed at
99# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413.
100#
101undef-all += -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__
102undef-all += -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__
103predef-be += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__
104predef-le += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
105cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(undef-all) $(predef-be))
106cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(undef-all) $(predef-le))
96 107
97cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ 108cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
98 -fno-omit-frame-pointer 109 -fno-omit-frame-pointer
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index c4fae8ff4671..626de44bd888 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -849,7 +849,7 @@ au1xxx_dbdma_chan_free(u32 chanid)
849EXPORT_SYMBOL(au1xxx_dbdma_chan_free); 849EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
850 850
851static irqreturn_t 851static irqreturn_t
852dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs) 852dbdma_interrupt(int irq, void *dev_id)
853{ 853{
854 u32 intstat; 854 u32 intstat;
855 u32 chan_index; 855 u32 chan_index;
diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c
index b4b010a2fe36..6fce60af005d 100644
--- a/arch/mips/au1000/common/prom.c
+++ b/arch/mips/au1000/common/prom.c
@@ -47,7 +47,7 @@ extern int prom_argc;
47extern char **prom_argv, **prom_envp; 47extern char **prom_argv, **prom_envp;
48 48
49 49
50char * prom_getcmdline(void) 50char * __init_or_module prom_getcmdline(void)
51{ 51{
52 return &(arcs_cmdline[0]); 52 return &(arcs_cmdline[0]);
53} 53}
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 377ae0d8ff00..919172db560c 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -43,7 +43,7 @@
43#include <asm/mach-au1x00/au1000.h> 43#include <asm/mach-au1x00/au1000.h>
44#include <asm/time.h> 44#include <asm/time.h>
45 45
46extern char * __init prom_getcmdline(void); 46extern char * prom_getcmdline(void);
47extern void __init board_setup(void); 47extern void __init board_setup(void);
48extern void au1000_restart(char *); 48extern void au1000_restart(char *);
49extern void au1000_halt(void); 49extern void au1000_halt(void);
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 94f09194d63d..fa1c62f05515 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -53,9 +53,6 @@ static unsigned long r4k_cur; /* What counter should be at next timer irq */
53int no_au1xxx_32khz; 53int no_au1xxx_32khz;
54extern int allow_au1k_wait; /* default off for CP0 Counter */ 54extern int allow_au1k_wait; /* default off for CP0 Counter */
55 55
56/* Cycle counter value at the previous timer interrupt.. */
57static unsigned int timerhi = 0, timerlo = 0;
58
59#ifdef CONFIG_PM 56#ifdef CONFIG_PM
60#if HZ < 100 || HZ > 1000 57#if HZ < 100 || HZ > 1000
61#error "unsupported HZ value! Must be in [100,1000]" 58#error "unsupported HZ value! Must be in [100,1000]"
@@ -82,7 +79,6 @@ unsigned long wtimer;
82void mips_timer_interrupt(void) 79void mips_timer_interrupt(void)
83{ 80{
84 int irq = 63; 81 int irq = 63;
85 unsigned long count;
86 82
87 irq_enter(); 83 irq_enter();
88 kstat_this_cpu.irqs[irq]++; 84 kstat_this_cpu.irqs[irq]++;
@@ -91,10 +87,6 @@ void mips_timer_interrupt(void)
91 goto null; 87 goto null;
92 88
93 do { 89 do {
94 count = read_c0_count();
95 timerhi += (count < timerlo); /* Wrap around */
96 timerlo = count;
97
98 kstat_this_cpu.irqs[irq]++; 90 kstat_this_cpu.irqs[irq]++;
99 do_timer(1); 91 do_timer(1);
100#ifndef CONFIG_SMP 92#ifndef CONFIG_SMP
@@ -231,7 +223,6 @@ wakeup_counter0_set(int ticks)
231 */ 223 */
232unsigned long cal_r4koff(void) 224unsigned long cal_r4koff(void)
233{ 225{
234 unsigned long count;
235 unsigned long cpu_speed; 226 unsigned long cpu_speed;
236 unsigned long flags; 227 unsigned long flags;
237 unsigned long counter; 228 unsigned long counter;
@@ -258,7 +249,7 @@ unsigned long cal_r4koff(void)
258 249
259#if defined(CONFIG_AU1000_USE32K) 250#if defined(CONFIG_AU1000_USE32K)
260 { 251 {
261 unsigned long start, end; 252 unsigned long start, end, count;
262 253
263 start = au_readl(SYS_RTCREAD); 254 start = au_readl(SYS_RTCREAD);
264 start += 2; 255 start += 2;
@@ -282,7 +273,6 @@ unsigned long cal_r4koff(void)
282#else 273#else
283 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * 274 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
284 AU1000_SRC_CLK; 275 AU1000_SRC_CLK;
285 count = cpu_speed / 2;
286#endif 276#endif
287 } 277 }
288 else { 278 else {
@@ -291,98 +281,15 @@ unsigned long cal_r4koff(void)
291 * NOTE: some old silicon doesn't allow reading the PLL. 281 * NOTE: some old silicon doesn't allow reading the PLL.
292 */ 282 */
293 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK; 283 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
294 count = cpu_speed / 2;
295 no_au1xxx_32khz = 1; 284 no_au1xxx_32khz = 1;
296 } 285 }
297 mips_hpt_frequency = count; 286 mips_hpt_frequency = cpu_speed;
298 // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) 287 // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
299 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); 288 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
300 spin_unlock_irqrestore(&time_lock, flags); 289 spin_unlock_irqrestore(&time_lock, flags);
301 return (cpu_speed / HZ); 290 return (cpu_speed / HZ);
302} 291}
303 292
304/* This is for machines which generate the exact clock. */
305#define USECS_PER_JIFFY (1000000/HZ)
306#define USECS_PER_JIFFY_FRAC (0x100000000LL*1000000/HZ&0xffffffff)
307
308static unsigned long
309div64_32(unsigned long v1, unsigned long v2, unsigned long v3)
310{
311 unsigned long r0;
312 do_div64_32(r0, v1, v2, v3);
313 return r0;
314}
315
316static unsigned long do_fast_cp0_gettimeoffset(void)
317{
318 u32 count;
319 unsigned long res, tmp;
320 unsigned long r0;
321
322 /* Last jiffy when do_fast_gettimeoffset() was called. */
323 static unsigned long last_jiffies=0;
324 unsigned long quotient;
325
326 /*
327 * Cached "1/(clocks per usec)*2^32" value.
328 * It has to be recalculated once each jiffy.
329 */
330 static unsigned long cached_quotient=0;
331
332 tmp = jiffies;
333
334 quotient = cached_quotient;
335
336 if (tmp && last_jiffies != tmp) {
337 last_jiffies = tmp;
338 if (last_jiffies != 0) {
339 r0 = div64_32(timerhi, timerlo, tmp);
340 quotient = div64_32(USECS_PER_JIFFY, USECS_PER_JIFFY_FRAC, r0);
341 cached_quotient = quotient;
342 }
343 }
344
345 /* Get last timer tick in absolute kernel time */
346 count = read_c0_count();
347
348 /* .. relative to previous jiffy (32 bits is enough) */
349 count -= timerlo;
350
351 __asm__("multu\t%1,%2\n\t"
352 "mfhi\t%0"
353 : "=r" (res)
354 : "r" (count), "r" (quotient)
355 : "hi", "lo", GCC_REG_ACCUM);
356
357 /*
358 * Due to possible jiffies inconsistencies, we need to check
359 * the result so that we'll get a timer that is monotonic.
360 */
361 if (res >= USECS_PER_JIFFY)
362 res = USECS_PER_JIFFY-1;
363
364 return res;
365}
366
367#ifdef CONFIG_PM
368static unsigned long do_fast_pm_gettimeoffset(void)
369{
370 unsigned long pc0;
371 unsigned long offset;
372
373 pc0 = au_readl(SYS_TOYREAD);
374 au_sync();
375 offset = pc0 - last_pc0;
376 if (offset > 2*MATCH20_INC) {
377 printk("huge offset %x, last_pc0 %x last_match20 %x pc0 %x\n",
378 (unsigned)offset, (unsigned)last_pc0,
379 (unsigned)last_match20, (unsigned)pc0);
380 }
381 offset = (unsigned long)((offset * 305) / 10);
382 return offset;
383}
384#endif
385
386void __init plat_timer_setup(struct irqaction *irq) 293void __init plat_timer_setup(struct irqaction *irq)
387{ 294{
388 unsigned int est_freq; 295 unsigned int est_freq;
@@ -420,7 +327,6 @@ void __init plat_timer_setup(struct irqaction *irq)
420 unsigned int c0_status; 327 unsigned int c0_status;
421 328
422 printk("WARNING: no 32KHz clock found.\n"); 329 printk("WARNING: no 32KHz clock found.\n");
423 do_gettimeoffset = do_fast_cp0_gettimeoffset;
424 330
425 /* Ensure we get CPO_COUNTER interrupts. 331 /* Ensure we get CPO_COUNTER interrupts.
426 */ 332 */
@@ -445,19 +351,11 @@ void __init plat_timer_setup(struct irqaction *irq)
445 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); 351 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
446 startup_match20_interrupt(counter0_irq); 352 startup_match20_interrupt(counter0_irq);
447 353
448 do_gettimeoffset = do_fast_pm_gettimeoffset;
449
450 /* We can use the real 'wait' instruction. 354 /* We can use the real 'wait' instruction.
451 */ 355 */
452 allow_au1k_wait = 1; 356 allow_au1k_wait = 1;
453 } 357 }
454 358
455#else
456 /* We have to do this here instead of in timer_init because
457 * the generic code in arch/mips/kernel/time.c will write
458 * over our function pointer.
459 */
460 do_gettimeoffset = do_fast_cp0_gettimeoffset;
461#endif 359#endif
462} 360}
463 361
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index c6a015940b41..ba3bf733d27d 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.19-rc1
4# Thu Jul 6 10:02:58 2006 4# Wed Oct 11 01:41:41 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,8 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_IVR is not set
29# CONFIG_MIPS_ITE8172 is not set
30# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
31# CONFIG_LASAT is not set 29# CONFIG_LASAT is not set
32# CONFIG_MIPS_ATLAS is not set 30# CONFIG_MIPS_ATLAS is not set
@@ -83,6 +81,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
83CONFIG_GENERIC_FIND_NEXT_BIT=y 81CONFIG_GENERIC_FIND_NEXT_BIT=y
84CONFIG_GENERIC_HWEIGHT=y 82CONFIG_GENERIC_HWEIGHT=y
85CONFIG_GENERIC_CALIBRATE_DELAY=y 83CONFIG_GENERIC_CALIBRATE_DELAY=y
84CONFIG_GENERIC_TIME=y
86CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 85CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
87CONFIG_DMA_COHERENT=y 86CONFIG_DMA_COHERENT=y
88CONFIG_CPU_BIG_ENDIAN=y 87CONFIG_CPU_BIG_ENDIAN=y
@@ -132,8 +131,8 @@ CONFIG_PAGE_SIZE_4KB=y
132# CONFIG_PAGE_SIZE_64KB is not set 131# CONFIG_PAGE_SIZE_64KB is not set
133# CONFIG_SIBYTE_DMA_PAGEOPS is not set 132# CONFIG_SIBYTE_DMA_PAGEOPS is not set
134CONFIG_MIPS_MT_DISABLED=y 133CONFIG_MIPS_MT_DISABLED=y
135# CONFIG_MIPS_MT_SMTC is not set
136# CONFIG_MIPS_MT_SMP is not set 134# CONFIG_MIPS_MT_SMP is not set
135# CONFIG_MIPS_MT_SMTC is not set
137# CONFIG_MIPS_VPE_LOADER is not set 136# CONFIG_MIPS_VPE_LOADER is not set
138CONFIG_CPU_HAS_LLSC=y 137CONFIG_CPU_HAS_LLSC=y
139CONFIG_CPU_HAS_SYNC=y 138CONFIG_CPU_HAS_SYNC=y
@@ -185,9 +184,11 @@ CONFIG_LOCALVERSION=""
185CONFIG_LOCALVERSION_AUTO=y 184CONFIG_LOCALVERSION_AUTO=y
186CONFIG_SWAP=y 185CONFIG_SWAP=y
187CONFIG_SYSVIPC=y 186CONFIG_SYSVIPC=y
187# CONFIG_IPC_NS is not set
188# CONFIG_POSIX_MQUEUE is not set 188# CONFIG_POSIX_MQUEUE is not set
189# CONFIG_BSD_PROCESS_ACCT is not set 189# CONFIG_BSD_PROCESS_ACCT is not set
190CONFIG_SYSCTL=y 190# CONFIG_TASKSTATS is not set
191# CONFIG_UTS_NS is not set
191# CONFIG_AUDIT is not set 192# CONFIG_AUDIT is not set
192CONFIG_IKCONFIG=y 193CONFIG_IKCONFIG=y
193CONFIG_IKCONFIG_PROC=y 194CONFIG_IKCONFIG_PROC=y
@@ -195,7 +196,9 @@ CONFIG_IKCONFIG_PROC=y
195# CONFIG_RELAY is not set 196# CONFIG_RELAY is not set
196CONFIG_INITRAMFS_SOURCE="" 197CONFIG_INITRAMFS_SOURCE=""
197# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 198# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
199CONFIG_SYSCTL=y
198CONFIG_EMBEDDED=y 200CONFIG_EMBEDDED=y
201# CONFIG_SYSCTL_SYSCALL is not set
199CONFIG_KALLSYMS=y 202CONFIG_KALLSYMS=y
200# CONFIG_KALLSYMS_ALL is not set 203# CONFIG_KALLSYMS_ALL is not set
201# CONFIG_KALLSYMS_EXTRA_PASS is not set 204# CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -204,12 +207,12 @@ CONFIG_PRINTK=y
204CONFIG_BUG=y 207CONFIG_BUG=y
205CONFIG_ELF_CORE=y 208CONFIG_ELF_CORE=y
206CONFIG_BASE_FULL=y 209CONFIG_BASE_FULL=y
207CONFIG_RT_MUTEXES=y
208CONFIG_FUTEX=y 210CONFIG_FUTEX=y
209CONFIG_EPOLL=y 211CONFIG_EPOLL=y
210CONFIG_SHMEM=y 212CONFIG_SHMEM=y
211CONFIG_SLAB=y 213CONFIG_SLAB=y
212CONFIG_VM_EVENT_COUNTERS=y 214CONFIG_VM_EVENT_COUNTERS=y
215CONFIG_RT_MUTEXES=y
213# CONFIG_TINY_SHMEM is not set 216# CONFIG_TINY_SHMEM is not set
214CONFIG_BASE_SMALL=0 217CONFIG_BASE_SMALL=0
215# CONFIG_SLOB is not set 218# CONFIG_SLOB is not set
@@ -228,6 +231,7 @@ CONFIG_STOP_MACHINE=y
228# 231#
229# Block layer 232# Block layer
230# 233#
234CONFIG_BLOCK=y
231# CONFIG_BLK_DEV_IO_TRACE is not set 235# CONFIG_BLK_DEV_IO_TRACE is not set
232 236
233# 237#
@@ -249,18 +253,17 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
249CONFIG_HW_HAS_PCI=y 253CONFIG_HW_HAS_PCI=y
250CONFIG_PCI=y 254CONFIG_PCI=y
251CONFIG_PCI_DOMAINS=y 255CONFIG_PCI_DOMAINS=y
256# CONFIG_PCI_MULTITHREAD_PROBE is not set
252CONFIG_PCI_DEBUG=y 257CONFIG_PCI_DEBUG=y
253CONFIG_MMU=y 258CONFIG_MMU=y
254 259
255# 260#
256# PCCARD (PCMCIA/CardBus) support 261# PCCARD (PCMCIA/CardBus) support
257# 262#
258# CONFIG_PCCARD is not set
259 263
260# 264#
261# PCI Hotplug Support 265# PCI Hotplug Support
262# 266#
263# CONFIG_HOTPLUG_PCI is not set
264 267
265# 268#
266# Executable file formats 269# Executable file formats
@@ -271,7 +274,7 @@ CONFIG_BINFMT_ELF=y
271CONFIG_MIPS32_COMPAT=y 274CONFIG_MIPS32_COMPAT=y
272CONFIG_COMPAT=y 275CONFIG_COMPAT=y
273CONFIG_MIPS32_O32=y 276CONFIG_MIPS32_O32=y
274# CONFIG_MIPS32_N32 is not set 277CONFIG_MIPS32_N32=y
275CONFIG_BINFMT_ELF32=y 278CONFIG_BINFMT_ELF32=y
276 279
277# 280#
@@ -288,6 +291,7 @@ CONFIG_PACKET_MMAP=y
288CONFIG_UNIX=y 291CONFIG_UNIX=y
289CONFIG_XFRM=y 292CONFIG_XFRM=y
290CONFIG_XFRM_USER=m 293CONFIG_XFRM_USER=m
294# CONFIG_XFRM_SUB_POLICY is not set
291CONFIG_NET_KEY=y 295CONFIG_NET_KEY=y
292CONFIG_INET=y 296CONFIG_INET=y
293# CONFIG_IP_MULTICAST is not set 297# CONFIG_IP_MULTICAST is not set
@@ -308,10 +312,12 @@ CONFIG_IP_PNP_BOOTP=y
308# CONFIG_INET_TUNNEL is not set 312# CONFIG_INET_TUNNEL is not set
309CONFIG_INET_XFRM_MODE_TRANSPORT=m 313CONFIG_INET_XFRM_MODE_TRANSPORT=m
310CONFIG_INET_XFRM_MODE_TUNNEL=m 314CONFIG_INET_XFRM_MODE_TUNNEL=m
315CONFIG_INET_XFRM_MODE_BEET=y
311CONFIG_INET_DIAG=y 316CONFIG_INET_DIAG=y
312CONFIG_INET_TCP_DIAG=y 317CONFIG_INET_TCP_DIAG=y
313# CONFIG_TCP_CONG_ADVANCED is not set 318# CONFIG_TCP_CONG_ADVANCED is not set
314CONFIG_TCP_CONG_BIC=y 319CONFIG_TCP_CONG_CUBIC=y
320CONFIG_DEFAULT_TCP_CONG="cubic"
315# CONFIG_IPV6 is not set 321# CONFIG_IPV6 is not set
316# CONFIG_INET6_XFRM_TUNNEL is not set 322# CONFIG_INET6_XFRM_TUNNEL is not set
317# CONFIG_INET6_TUNNEL is not set 323# CONFIG_INET6_TUNNEL is not set
@@ -341,7 +347,6 @@ CONFIG_NETWORK_SECMARK=y
341# CONFIG_ATALK is not set 347# CONFIG_ATALK is not set
342# CONFIG_X25 is not set 348# CONFIG_X25 is not set
343# CONFIG_LAPB is not set 349# CONFIG_LAPB is not set
344# CONFIG_NET_DIVERT is not set
345# CONFIG_ECONET is not set 350# CONFIG_ECONET is not set
346# CONFIG_WAN_ROUTER is not set 351# CONFIG_WAN_ROUTER is not set
347 352
@@ -368,7 +373,6 @@ CONFIG_NETWORK_SECMARK=y
368# 373#
369CONFIG_STANDALONE=y 374CONFIG_STANDALONE=y
370CONFIG_PREVENT_FIRMWARE_BUILD=y 375CONFIG_PREVENT_FIRMWARE_BUILD=y
371# CONFIG_FW_LOADER is not set
372# CONFIG_DEBUG_DRIVER is not set 376# CONFIG_DEBUG_DRIVER is not set
373# CONFIG_SYS_HYPERVISOR is not set 377# CONFIG_SYS_HYPERVISOR is not set
374 378
@@ -404,7 +408,7 @@ CONFIG_BLK_DEV_LOOP=m
404CONFIG_BLK_DEV_NBD=m 408CONFIG_BLK_DEV_NBD=m
405# CONFIG_BLK_DEV_SX8 is not set 409# CONFIG_BLK_DEV_SX8 is not set
406# CONFIG_BLK_DEV_RAM is not set 410# CONFIG_BLK_DEV_RAM is not set
407# CONFIG_BLK_DEV_INITRD is not set 411CONFIG_BLK_DEV_INITRD=y
408# CONFIG_CDROM_PKTCDVD is not set 412# CONFIG_CDROM_PKTCDVD is not set
409# CONFIG_ATA_OVER_ETH is not set 413# CONFIG_ATA_OVER_ETH is not set
410 414
@@ -412,6 +416,7 @@ CONFIG_BLK_DEV_NBD=m
412# ATA/ATAPI/MFM/RLL support 416# ATA/ATAPI/MFM/RLL support
413# 417#
414CONFIG_IDE=y 418CONFIG_IDE=y
419CONFIG_IDE_MAX_HWIFS=4
415CONFIG_BLK_DEV_IDE=y 420CONFIG_BLK_DEV_IDE=y
416 421
417# 422#
@@ -429,10 +434,40 @@ CONFIG_BLK_DEV_IDEFLOPPY=y
429# IDE chipset support/bugfixes 434# IDE chipset support/bugfixes
430# 435#
431CONFIG_IDE_GENERIC=y 436CONFIG_IDE_GENERIC=y
432# CONFIG_BLK_DEV_IDEPCI is not set 437CONFIG_BLK_DEV_IDEPCI=y
438# CONFIG_IDEPCI_SHARE_IRQ is not set
439# CONFIG_BLK_DEV_OFFBOARD is not set
440CONFIG_BLK_DEV_GENERIC=y
441# CONFIG_BLK_DEV_OPTI621 is not set
442CONFIG_BLK_DEV_IDEDMA_PCI=y
443# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
444# CONFIG_IDEDMA_PCI_AUTO is not set
445# CONFIG_BLK_DEV_AEC62XX is not set
446# CONFIG_BLK_DEV_ALI15X3 is not set
447# CONFIG_BLK_DEV_AMD74XX is not set
448CONFIG_BLK_DEV_CMD64X=y
449# CONFIG_BLK_DEV_TRIFLEX is not set
450# CONFIG_BLK_DEV_CY82C693 is not set
451# CONFIG_BLK_DEV_CS5520 is not set
452# CONFIG_BLK_DEV_CS5530 is not set
453# CONFIG_BLK_DEV_HPT34X is not set
454# CONFIG_BLK_DEV_HPT366 is not set
455# CONFIG_BLK_DEV_JMICRON is not set
456# CONFIG_BLK_DEV_SC1200 is not set
457# CONFIG_BLK_DEV_PIIX is not set
458# CONFIG_BLK_DEV_IT821X is not set
459# CONFIG_BLK_DEV_NS87415 is not set
460# CONFIG_BLK_DEV_PDC202XX_OLD is not set
461# CONFIG_BLK_DEV_PDC202XX_NEW is not set
462# CONFIG_BLK_DEV_SVWKS is not set
463# CONFIG_BLK_DEV_SIIMAGE is not set
464# CONFIG_BLK_DEV_SLC90E66 is not set
465# CONFIG_BLK_DEV_TRM290 is not set
466# CONFIG_BLK_DEV_VIA82CXXX is not set
433# CONFIG_BLK_DEV_IDE_SWARM is not set 467# CONFIG_BLK_DEV_IDE_SWARM is not set
434# CONFIG_IDE_ARM is not set 468# CONFIG_IDE_ARM is not set
435# CONFIG_BLK_DEV_IDEDMA is not set 469CONFIG_BLK_DEV_IDEDMA=y
470# CONFIG_IDEDMA_IVB is not set
436# CONFIG_IDEDMA_AUTO is not set 471# CONFIG_IDEDMA_AUTO is not set
437# CONFIG_BLK_DEV_HD is not set 472# CONFIG_BLK_DEV_HD is not set
438 473
@@ -441,6 +476,12 @@ CONFIG_IDE_GENERIC=y
441# 476#
442# CONFIG_RAID_ATTRS is not set 477# CONFIG_RAID_ATTRS is not set
443# CONFIG_SCSI is not set 478# CONFIG_SCSI is not set
479# CONFIG_SCSI_NETLINK is not set
480
481#
482# Serial ATA (prod) and Parallel ATA (experimental) drivers
483#
484# CONFIG_ATA is not set
444 485
445# 486#
446# Multi-device support (RAID and LVM) 487# Multi-device support (RAID and LVM)
@@ -516,6 +557,7 @@ CONFIG_NET_SB1250_MAC=y
516# CONFIG_SK98LIN is not set 557# CONFIG_SK98LIN is not set
517# CONFIG_TIGON3 is not set 558# CONFIG_TIGON3 is not set
518# CONFIG_BNX2 is not set 559# CONFIG_BNX2 is not set
560# CONFIG_QLA3XXX is not set
519 561
520# 562#
521# Ethernet (10000 Mbit) 563# Ethernet (10000 Mbit)
@@ -650,7 +692,6 @@ CONFIG_I2C_CHARDEV=y
650# CONFIG_I2C_ALGOBIT is not set 692# CONFIG_I2C_ALGOBIT is not set
651# CONFIG_I2C_ALGOPCF is not set 693# CONFIG_I2C_ALGOPCF is not set
652# CONFIG_I2C_ALGOPCA is not set 694# CONFIG_I2C_ALGOPCA is not set
653CONFIG_I2C_ALGO_SIBYTE=y
654 695
655# 696#
656# I2C Hardware Bus support 697# I2C Hardware Bus support
@@ -712,12 +753,12 @@ CONFIG_I2C_DEBUG_CHIP=y
712# 753#
713# Misc devices 754# Misc devices
714# 755#
756# CONFIG_TIFM_CORE is not set
715 757
716# 758#
717# Multimedia devices 759# Multimedia devices
718# 760#
719# CONFIG_VIDEO_DEV is not set 761# CONFIG_VIDEO_DEV is not set
720CONFIG_VIDEO_V4L2=y
721 762
722# 763#
723# Digital Video Broadcasting Devices 764# Digital Video Broadcasting Devices
@@ -729,6 +770,7 @@ CONFIG_VIDEO_V4L2=y
729# 770#
730# CONFIG_FIRMWARE_EDID is not set 771# CONFIG_FIRMWARE_EDID is not set
731# CONFIG_FB is not set 772# CONFIG_FB is not set
773# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
732 774
733# 775#
734# Sound 776# Sound
@@ -811,6 +853,7 @@ CONFIG_FS_MBCACHE=y
811# CONFIG_JFS_FS is not set 853# CONFIG_JFS_FS is not set
812CONFIG_FS_POSIX_ACL=y 854CONFIG_FS_POSIX_ACL=y
813# CONFIG_XFS_FS is not set 855# CONFIG_XFS_FS is not set
856# CONFIG_GFS2_FS is not set
814# CONFIG_OCFS2_FS is not set 857# CONFIG_OCFS2_FS is not set
815# CONFIG_MINIX_FS is not set 858# CONFIG_MINIX_FS is not set
816# CONFIG_ROMFS_FS is not set 859# CONFIG_ROMFS_FS is not set
@@ -840,8 +883,10 @@ CONFIG_DNOTIFY=y
840# 883#
841CONFIG_PROC_FS=y 884CONFIG_PROC_FS=y
842CONFIG_PROC_KCORE=y 885CONFIG_PROC_KCORE=y
886CONFIG_PROC_SYSCTL=y
843CONFIG_SYSFS=y 887CONFIG_SYSFS=y
844# CONFIG_TMPFS is not set 888CONFIG_TMPFS=y
889# CONFIG_TMPFS_POSIX_ACL is not set
845# CONFIG_HUGETLB_PAGE is not set 890# CONFIG_HUGETLB_PAGE is not set
846CONFIG_RAMFS=y 891CONFIG_RAMFS=y
847# CONFIG_CONFIGFS_FS is not set 892# CONFIG_CONFIGFS_FS is not set
@@ -851,6 +896,7 @@ CONFIG_RAMFS=y
851# 896#
852# CONFIG_ADFS_FS is not set 897# CONFIG_ADFS_FS is not set
853# CONFIG_AFFS_FS is not set 898# CONFIG_AFFS_FS is not set
899# CONFIG_ECRYPT_FS is not set
854# CONFIG_HFS_FS is not set 900# CONFIG_HFS_FS is not set
855# CONFIG_HFSPLUS_FS is not set 901# CONFIG_HFSPLUS_FS is not set
856# CONFIG_BEFS_FS is not set 902# CONFIG_BEFS_FS is not set
@@ -881,7 +927,6 @@ CONFIG_SUNRPC=y
881# CONFIG_RPCSEC_GSS_SPKM3 is not set 927# CONFIG_RPCSEC_GSS_SPKM3 is not set
882# CONFIG_SMB_FS is not set 928# CONFIG_SMB_FS is not set
883# CONFIG_CIFS is not set 929# CONFIG_CIFS is not set
884# CONFIG_CIFS_DEBUG2 is not set
885# CONFIG_NCP_FS is not set 930# CONFIG_NCP_FS is not set
886# CONFIG_CODA_FS is not set 931# CONFIG_CODA_FS is not set
887# CONFIG_AFS_FS is not set 932# CONFIG_AFS_FS is not set
@@ -899,6 +944,10 @@ CONFIG_MSDOS_PARTITION=y
899# CONFIG_NLS is not set 944# CONFIG_NLS is not set
900 945
901# 946#
947# Distributed Lock Manager
948#
949
950#
902# Profiling support 951# Profiling support
903# 952#
904# CONFIG_PROFILING is not set 953# CONFIG_PROFILING is not set
@@ -907,7 +956,8 @@ CONFIG_MSDOS_PARTITION=y
907# Kernel hacking 956# Kernel hacking
908# 957#
909CONFIG_TRACE_IRQFLAGS_SUPPORT=y 958CONFIG_TRACE_IRQFLAGS_SUPPORT=y
910CONFIG_PRINTK_TIME=y 959# CONFIG_PRINTK_TIME is not set
960CONFIG_ENABLE_MUST_CHECK=y
911CONFIG_MAGIC_SYSRQ=y 961CONFIG_MAGIC_SYSRQ=y
912# CONFIG_UNUSED_SYMBOLS is not set 962# CONFIG_UNUSED_SYMBOLS is not set
913CONFIG_DEBUG_KERNEL=y 963CONFIG_DEBUG_KERNEL=y
@@ -920,12 +970,15 @@ CONFIG_DETECT_SOFTLOCKUP=y
920# CONFIG_DEBUG_SPINLOCK is not set 970# CONFIG_DEBUG_SPINLOCK is not set
921CONFIG_DEBUG_MUTEXES=y 971CONFIG_DEBUG_MUTEXES=y
922# CONFIG_DEBUG_RWSEMS is not set 972# CONFIG_DEBUG_RWSEMS is not set
973# CONFIG_DEBUG_LOCK_ALLOC is not set
974# CONFIG_PROVE_LOCKING is not set
923# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 975# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
924# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 976# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
925# CONFIG_DEBUG_KOBJECT is not set 977# CONFIG_DEBUG_KOBJECT is not set
926# CONFIG_DEBUG_INFO is not set 978# CONFIG_DEBUG_INFO is not set
927# CONFIG_DEBUG_FS is not set 979# CONFIG_DEBUG_FS is not set
928# CONFIG_DEBUG_VM is not set 980# CONFIG_DEBUG_VM is not set
981# CONFIG_DEBUG_LIST is not set
929CONFIG_FORCED_INLINING=y 982CONFIG_FORCED_INLINING=y
930# CONFIG_RCU_TORTURE_TEST is not set 983# CONFIG_RCU_TORTURE_TEST is not set
931CONFIG_CROSSCOMPILE=y 984CONFIG_CROSSCOMPILE=y
@@ -946,6 +999,10 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
946# Cryptographic options 999# Cryptographic options
947# 1000#
948CONFIG_CRYPTO=y 1001CONFIG_CRYPTO=y
1002CONFIG_CRYPTO_ALGAPI=y
1003CONFIG_CRYPTO_BLKCIPHER=m
1004CONFIG_CRYPTO_HASH=y
1005CONFIG_CRYPTO_MANAGER=m
949CONFIG_CRYPTO_HMAC=y 1006CONFIG_CRYPTO_HMAC=y
950CONFIG_CRYPTO_NULL=y 1007CONFIG_CRYPTO_NULL=y
951CONFIG_CRYPTO_MD4=y 1008CONFIG_CRYPTO_MD4=y
@@ -955,9 +1012,12 @@ CONFIG_CRYPTO_SHA256=y
955CONFIG_CRYPTO_SHA512=y 1012CONFIG_CRYPTO_SHA512=y
956CONFIG_CRYPTO_WP512=m 1013CONFIG_CRYPTO_WP512=m
957CONFIG_CRYPTO_TGR192=m 1014CONFIG_CRYPTO_TGR192=m
1015CONFIG_CRYPTO_ECB=m
1016CONFIG_CRYPTO_CBC=m
958CONFIG_CRYPTO_DES=y 1017CONFIG_CRYPTO_DES=y
959CONFIG_CRYPTO_BLOWFISH=y 1018CONFIG_CRYPTO_BLOWFISH=y
960CONFIG_CRYPTO_TWOFISH=y 1019CONFIG_CRYPTO_TWOFISH=y
1020CONFIG_CRYPTO_TWOFISH_COMMON=y
961CONFIG_CRYPTO_SERPENT=y 1021CONFIG_CRYPTO_SERPENT=y
962CONFIG_CRYPTO_AES=m 1022CONFIG_CRYPTO_AES=m
963# CONFIG_CRYPTO_CAST5 is not set 1023# CONFIG_CRYPTO_CAST5 is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 26b0b9883496..280a8001eacf 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.19-rc2
4# Thu Jul 6 10:04:18 2006 4# Sat Oct 14 23:01:16 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,8 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_IVR is not set
29# CONFIG_MIPS_ITE8172 is not set
30# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
31# CONFIG_LASAT is not set 29# CONFIG_LASAT is not set
32# CONFIG_MIPS_ATLAS is not set 30# CONFIG_MIPS_ATLAS is not set
@@ -41,13 +39,13 @@ CONFIG_MIPS=y
41# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
42# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
43# CONFIG_PNX8550_V2PCI is not set 41# CONFIG_PNX8550_V2PCI is not set
44# CONFIG_PNX8550_JBS is not set 42CONFIG_PNX8550_JBS=y
45# CONFIG_DDB5477 is not set 43# CONFIG_DDB5477 is not set
46# CONFIG_MACH_VR41XX is not set 44# CONFIG_MACH_VR41XX is not set
47# CONFIG_PMC_YOSEMITE is not set 45# CONFIG_PMC_YOSEMITE is not set
48# CONFIG_QEMU is not set 46# CONFIG_QEMU is not set
49# CONFIG_MARKEINS is not set 47# CONFIG_MARKEINS is not set
50CONFIG_SGI_IP22=y 48# CONFIG_SGI_IP22 is not set
51# CONFIG_SGI_IP27 is not set 49# CONFIG_SGI_IP27 is not set
52# CONFIG_SGI_IP32 is not set 50# CONFIG_SGI_IP32 is not set
53# CONFIG_SIBYTE_BIGSUR is not set 51# CONFIG_SIBYTE_BIGSUR is not set
@@ -67,25 +65,21 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
67CONFIG_GENERIC_FIND_NEXT_BIT=y 65CONFIG_GENERIC_FIND_NEXT_BIT=y
68CONFIG_GENERIC_HWEIGHT=y 66CONFIG_GENERIC_HWEIGHT=y
69CONFIG_GENERIC_CALIBRATE_DELAY=y 67CONFIG_GENERIC_CALIBRATE_DELAY=y
68CONFIG_GENERIC_TIME=y
70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 69CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
71CONFIG_ARC=y
72CONFIG_DMA_NONCOHERENT=y 70CONFIG_DMA_NONCOHERENT=y
73CONFIG_DMA_NEED_PCI_MAP_STATE=y 71CONFIG_DMA_NEED_PCI_MAP_STATE=y
74CONFIG_CPU_BIG_ENDIAN=y 72# CONFIG_CPU_BIG_ENDIAN is not set
75# CONFIG_CPU_LITTLE_ENDIAN is not set 73CONFIG_CPU_LITTLE_ENDIAN=y
76CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 74CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
77CONFIG_IRQ_CPU=y 75CONFIG_PNX8550=y
78CONFIG_SWAP_IO_SPACE=y 76CONFIG_SOC_PNX8550=y
79CONFIG_ARC32=y
80CONFIG_BOOT_ELF32=y
81CONFIG_MIPS_L1_CACHE_SHIFT=5 77CONFIG_MIPS_L1_CACHE_SHIFT=5
82# CONFIG_ARC_CONSOLE is not set
83CONFIG_ARC_PROMLIB=y
84 78
85# 79#
86# CPU selection 80# CPU selection
87# 81#
88# CONFIG_CPU_MIPS32_R1 is not set 82CONFIG_CPU_MIPS32_R1=y
89# CONFIG_CPU_MIPS32_R2 is not set 83# CONFIG_CPU_MIPS32_R2 is not set
90# CONFIG_CPU_MIPS64_R1 is not set 84# CONFIG_CPU_MIPS64_R1 is not set
91# CONFIG_CPU_MIPS64_R2 is not set 85# CONFIG_CPU_MIPS64_R2 is not set
@@ -93,7 +87,7 @@ CONFIG_ARC_PROMLIB=y
93# CONFIG_CPU_TX39XX is not set 87# CONFIG_CPU_TX39XX is not set
94# CONFIG_CPU_VR41XX is not set 88# CONFIG_CPU_VR41XX is not set
95# CONFIG_CPU_R4300 is not set 89# CONFIG_CPU_R4300 is not set
96CONFIG_CPU_R4X00=y 90# CONFIG_CPU_R4X00 is not set
97# CONFIG_CPU_TX49XX is not set 91# CONFIG_CPU_TX49XX is not set
98# CONFIG_CPU_R5000 is not set 92# CONFIG_CPU_R5000 is not set
99# CONFIG_CPU_R5432 is not set 93# CONFIG_CPU_R5432 is not set
@@ -104,12 +98,11 @@ CONFIG_CPU_R4X00=y
104# CONFIG_CPU_RM7000 is not set 98# CONFIG_CPU_RM7000 is not set
105# CONFIG_CPU_RM9000 is not set 99# CONFIG_CPU_RM9000 is not set
106# CONFIG_CPU_SB1 is not set 100# CONFIG_CPU_SB1 is not set
107CONFIG_SYS_HAS_CPU_R4X00=y 101CONFIG_SYS_HAS_CPU_MIPS32_R1=y
108CONFIG_SYS_HAS_CPU_R5000=y 102CONFIG_CPU_MIPS32=y
103CONFIG_CPU_MIPSR1=y
109CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 104CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
110CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
111CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y 105CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
112CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
113 106
114# 107#
115# Kernel type 108# Kernel type
@@ -120,17 +113,17 @@ CONFIG_PAGE_SIZE_4KB=y
120# CONFIG_PAGE_SIZE_8KB is not set 113# CONFIG_PAGE_SIZE_8KB is not set
121# CONFIG_PAGE_SIZE_16KB is not set 114# CONFIG_PAGE_SIZE_16KB is not set
122# CONFIG_PAGE_SIZE_64KB is not set 115# CONFIG_PAGE_SIZE_64KB is not set
123CONFIG_BOARD_SCACHE=y 116CONFIG_CPU_HAS_PREFETCH=y
124CONFIG_IP22_CPU_SCACHE=y
125CONFIG_MIPS_MT_DISABLED=y 117CONFIG_MIPS_MT_DISABLED=y
126# CONFIG_MIPS_MT_SMTC is not set
127# CONFIG_MIPS_MT_SMP is not set 118# CONFIG_MIPS_MT_SMP is not set
119# CONFIG_MIPS_MT_SMTC is not set
128# CONFIG_MIPS_VPE_LOADER is not set 120# CONFIG_MIPS_VPE_LOADER is not set
129# CONFIG_64BIT_PHYS_ADDR is not set 121# CONFIG_64BIT_PHYS_ADDR is not set
130CONFIG_CPU_HAS_LLSC=y 122CONFIG_CPU_HAS_LLSC=y
131CONFIG_CPU_HAS_SYNC=y 123CONFIG_CPU_HAS_SYNC=y
132CONFIG_GENERIC_HARDIRQS=y 124CONFIG_GENERIC_HARDIRQS=y
133CONFIG_GENERIC_IRQ_PROBE=y 125CONFIG_GENERIC_IRQ_PROBE=y
126CONFIG_CPU_SUPPORTS_HIGHMEM=y
134CONFIG_ARCH_FLATMEM_ENABLE=y 127CONFIG_ARCH_FLATMEM_ENABLE=y
135CONFIG_SELECT_MEMORY_MODEL=y 128CONFIG_SELECT_MEMORY_MODEL=y
136CONFIG_FLATMEM_MANUAL=y 129CONFIG_FLATMEM_MANUAL=y
@@ -144,12 +137,12 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
144# CONFIG_HZ_48 is not set 137# CONFIG_HZ_48 is not set
145# CONFIG_HZ_100 is not set 138# CONFIG_HZ_100 is not set
146# CONFIG_HZ_128 is not set 139# CONFIG_HZ_128 is not set
147# CONFIG_HZ_250 is not set 140CONFIG_HZ_250=y
148# CONFIG_HZ_256 is not set 141# CONFIG_HZ_256 is not set
149CONFIG_HZ_1000=y 142# CONFIG_HZ_1000 is not set
150# CONFIG_HZ_1024 is not set 143# CONFIG_HZ_1024 is not set
151CONFIG_SYS_SUPPORTS_ARBIT_HZ=y 144CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
152CONFIG_HZ=1000 145CONFIG_HZ=250
153CONFIG_PREEMPT_NONE=y 146CONFIG_PREEMPT_NONE=y
154# CONFIG_PREEMPT_VOLUNTARY is not set 147# CONFIG_PREEMPT_VOLUNTARY is not set
155# CONFIG_PREEMPT is not set 148# CONFIG_PREEMPT is not set
@@ -171,16 +164,20 @@ CONFIG_LOCALVERSION=""
171CONFIG_LOCALVERSION_AUTO=y 164CONFIG_LOCALVERSION_AUTO=y
172CONFIG_SWAP=y 165CONFIG_SWAP=y
173CONFIG_SYSVIPC=y 166CONFIG_SYSVIPC=y
167# CONFIG_IPC_NS is not set
174# CONFIG_POSIX_MQUEUE is not set 168# CONFIG_POSIX_MQUEUE is not set
175# CONFIG_BSD_PROCESS_ACCT is not set 169# CONFIG_BSD_PROCESS_ACCT is not set
176CONFIG_SYSCTL=y 170# CONFIG_TASKSTATS is not set
171# CONFIG_UTS_NS is not set
177# CONFIG_AUDIT is not set 172# CONFIG_AUDIT is not set
178CONFIG_IKCONFIG=y 173CONFIG_IKCONFIG=y
179CONFIG_IKCONFIG_PROC=y 174CONFIG_IKCONFIG_PROC=y
180# CONFIG_RELAY is not set 175# CONFIG_RELAY is not set
181CONFIG_INITRAMFS_SOURCE="" 176CONFIG_INITRAMFS_SOURCE=""
182# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 177# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
178CONFIG_SYSCTL=y
183CONFIG_EMBEDDED=y 179CONFIG_EMBEDDED=y
180# CONFIG_SYSCTL_SYSCALL is not set
184CONFIG_KALLSYMS=y 181CONFIG_KALLSYMS=y
185# CONFIG_KALLSYMS_ALL is not set 182# CONFIG_KALLSYMS_ALL is not set
186# CONFIG_KALLSYMS_EXTRA_PASS is not set 183# CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -189,12 +186,12 @@ CONFIG_PRINTK=y
189CONFIG_BUG=y 186CONFIG_BUG=y
190CONFIG_ELF_CORE=y 187CONFIG_ELF_CORE=y
191CONFIG_BASE_FULL=y 188CONFIG_BASE_FULL=y
192CONFIG_RT_MUTEXES=y
193CONFIG_FUTEX=y 189CONFIG_FUTEX=y
194CONFIG_EPOLL=y 190CONFIG_EPOLL=y
195CONFIG_SHMEM=y 191CONFIG_SHMEM=y
196CONFIG_SLAB=y 192CONFIG_SLAB=y
197CONFIG_VM_EVENT_COUNTERS=y 193CONFIG_VM_EVENT_COUNTERS=y
194CONFIG_RT_MUTEXES=y
198# CONFIG_TINY_SHMEM is not set 195# CONFIG_TINY_SHMEM is not set
199CONFIG_BASE_SMALL=0 196CONFIG_BASE_SMALL=0
200# CONFIG_SLOB is not set 197# CONFIG_SLOB is not set
@@ -211,6 +208,7 @@ CONFIG_KMOD=y
211# 208#
212# Block layer 209# Block layer
213# 210#
211CONFIG_BLOCK=y
214# CONFIG_LBD is not set 212# CONFIG_LBD is not set
215# CONFIG_BLK_DEV_IO_TRACE is not set 213# CONFIG_BLK_DEV_IO_TRACE is not set
216# CONFIG_LSF is not set 214# CONFIG_LSF is not set
@@ -231,8 +229,10 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
231# 229#
232# Bus options (PCI, PCMCIA, EISA, ISA, TC) 230# Bus options (PCI, PCMCIA, EISA, ISA, TC)
233# 231#
234CONFIG_HW_HAS_EISA=y 232CONFIG_HW_HAS_PCI=y
235# CONFIG_EISA is not set 233CONFIG_PCI=y
234# CONFIG_PCI_MULTITHREAD_PROBE is not set
235# CONFIG_PCI_DEBUG is not set
236CONFIG_MMU=y 236CONFIG_MMU=y
237 237
238# 238#
@@ -243,6 +243,7 @@ CONFIG_MMU=y
243# 243#
244# PCI Hotplug Support 244# PCI Hotplug Support
245# 245#
246# CONFIG_HOTPLUG_PCI is not set
246 247
247# 248#
248# Executable file formats 249# Executable file formats
@@ -265,6 +266,7 @@ CONFIG_PACKET=y
265CONFIG_UNIX=y 266CONFIG_UNIX=y
266CONFIG_XFRM=y 267CONFIG_XFRM=y
267# CONFIG_XFRM_USER is not set 268# CONFIG_XFRM_USER is not set
269# CONFIG_XFRM_SUB_POLICY is not set
268# CONFIG_NET_KEY is not set 270# CONFIG_NET_KEY is not set
269CONFIG_INET=y 271CONFIG_INET=y
270# CONFIG_IP_MULTICAST is not set 272# CONFIG_IP_MULTICAST is not set
@@ -283,16 +285,18 @@ CONFIG_IP_PNP_BOOTP=y
283# CONFIG_INET_IPCOMP is not set 285# CONFIG_INET_IPCOMP is not set
284# CONFIG_INET_XFRM_TUNNEL is not set 286# CONFIG_INET_XFRM_TUNNEL is not set
285# CONFIG_INET_TUNNEL is not set 287# CONFIG_INET_TUNNEL is not set
286CONFIG_INET_XFRM_MODE_TRANSPORT=m 288CONFIG_INET_XFRM_MODE_TRANSPORT=y
287CONFIG_INET_XFRM_MODE_TUNNEL=m 289CONFIG_INET_XFRM_MODE_TUNNEL=y
290CONFIG_INET_XFRM_MODE_BEET=y
288CONFIG_INET_DIAG=y 291CONFIG_INET_DIAG=y
289CONFIG_INET_TCP_DIAG=y 292CONFIG_INET_TCP_DIAG=y
290# CONFIG_TCP_CONG_ADVANCED is not set 293# CONFIG_TCP_CONG_ADVANCED is not set
291CONFIG_TCP_CONG_BIC=y 294CONFIG_TCP_CONG_CUBIC=y
295CONFIG_DEFAULT_TCP_CONG="cubic"
292# CONFIG_IPV6 is not set 296# CONFIG_IPV6 is not set
293# CONFIG_INET6_XFRM_TUNNEL is not set 297# CONFIG_INET6_XFRM_TUNNEL is not set
294# CONFIG_INET6_TUNNEL is not set 298# CONFIG_INET6_TUNNEL is not set
295CONFIG_NETWORK_SECMARK=y 299# CONFIG_NETWORK_SECMARK is not set
296# CONFIG_NETFILTER is not set 300# CONFIG_NETFILTER is not set
297 301
298# 302#
@@ -318,7 +322,6 @@ CONFIG_NETWORK_SECMARK=y
318# CONFIG_ATALK is not set 322# CONFIG_ATALK is not set
319# CONFIG_X25 is not set 323# CONFIG_X25 is not set
320# CONFIG_LAPB is not set 324# CONFIG_LAPB is not set
321# CONFIG_NET_DIVERT is not set
322# CONFIG_ECONET is not set 325# CONFIG_ECONET is not set
323# CONFIG_WAN_ROUTER is not set 326# CONFIG_WAN_ROUTER is not set
324 327
@@ -371,13 +374,20 @@ CONFIG_FW_LOADER=y
371# 374#
372# Block devices 375# Block devices
373# 376#
377# CONFIG_BLK_CPQ_DA is not set
378# CONFIG_BLK_CPQ_CISS_DA is not set
379# CONFIG_BLK_DEV_DAC960 is not set
380# CONFIG_BLK_DEV_UMEM is not set
374# CONFIG_BLK_DEV_COW_COMMON is not set 381# CONFIG_BLK_DEV_COW_COMMON is not set
375CONFIG_BLK_DEV_LOOP=y 382CONFIG_BLK_DEV_LOOP=y
376# CONFIG_BLK_DEV_CRYPTOLOOP is not set 383# CONFIG_BLK_DEV_CRYPTOLOOP is not set
377# CONFIG_BLK_DEV_NBD is not set 384# CONFIG_BLK_DEV_NBD is not set
385# CONFIG_BLK_DEV_SX8 is not set
386# CONFIG_BLK_DEV_UB is not set
378CONFIG_BLK_DEV_RAM=y 387CONFIG_BLK_DEV_RAM=y
379CONFIG_BLK_DEV_RAM_COUNT=16 388CONFIG_BLK_DEV_RAM_COUNT=16
380CONFIG_BLK_DEV_RAM_SIZE=8192 389CONFIG_BLK_DEV_RAM_SIZE=8192
390CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
381CONFIG_BLK_DEV_INITRD=y 391CONFIG_BLK_DEV_INITRD=y
382# CONFIG_CDROM_PKTCDVD is not set 392# CONFIG_CDROM_PKTCDVD is not set
383# CONFIG_ATA_OVER_ETH is not set 393# CONFIG_ATA_OVER_ETH is not set
@@ -386,6 +396,7 @@ CONFIG_BLK_DEV_INITRD=y
386# ATA/ATAPI/MFM/RLL support 396# ATA/ATAPI/MFM/RLL support
387# 397#
388CONFIG_IDE=y 398CONFIG_IDE=y
399CONFIG_IDE_MAX_HWIFS=4
389CONFIG_BLK_DEV_IDE=y 400CONFIG_BLK_DEV_IDE=y
390 401
391# 402#
@@ -404,8 +415,39 @@ CONFIG_BLK_DEV_IDESCSI=y
404# IDE chipset support/bugfixes 415# IDE chipset support/bugfixes
405# 416#
406CONFIG_IDE_GENERIC=y 417CONFIG_IDE_GENERIC=y
418CONFIG_BLK_DEV_IDEPCI=y
419CONFIG_IDEPCI_SHARE_IRQ=y
420CONFIG_BLK_DEV_OFFBOARD=y
421CONFIG_BLK_DEV_GENERIC=y
422# CONFIG_BLK_DEV_OPTI621 is not set
423CONFIG_BLK_DEV_IDEDMA_PCI=y
424# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
425# CONFIG_IDEDMA_PCI_AUTO is not set
426# CONFIG_BLK_DEV_AEC62XX is not set
427# CONFIG_BLK_DEV_ALI15X3 is not set
428# CONFIG_BLK_DEV_AMD74XX is not set
429# CONFIG_BLK_DEV_CMD64X is not set
430# CONFIG_BLK_DEV_TRIFLEX is not set
431# CONFIG_BLK_DEV_CY82C693 is not set
432# CONFIG_BLK_DEV_CS5520 is not set
433# CONFIG_BLK_DEV_CS5530 is not set
434# CONFIG_BLK_DEV_HPT34X is not set
435CONFIG_BLK_DEV_HPT366=y
436# CONFIG_BLK_DEV_JMICRON is not set
437# CONFIG_BLK_DEV_SC1200 is not set
438# CONFIG_BLK_DEV_PIIX is not set
439# CONFIG_BLK_DEV_IT821X is not set
440# CONFIG_BLK_DEV_NS87415 is not set
441# CONFIG_BLK_DEV_PDC202XX_OLD is not set
442# CONFIG_BLK_DEV_PDC202XX_NEW is not set
443# CONFIG_BLK_DEV_SVWKS is not set
444# CONFIG_BLK_DEV_SIIMAGE is not set
445# CONFIG_BLK_DEV_SLC90E66 is not set
446# CONFIG_BLK_DEV_TRM290 is not set
447# CONFIG_BLK_DEV_VIA82CXXX is not set
407# CONFIG_IDE_ARM is not set 448# CONFIG_IDE_ARM is not set
408# CONFIG_BLK_DEV_IDEDMA is not set 449CONFIG_BLK_DEV_IDEDMA=y
450# CONFIG_IDEDMA_IVB is not set
409# CONFIG_IDEDMA_AUTO is not set 451# CONFIG_IDEDMA_AUTO is not set
410# CONFIG_BLK_DEV_HD is not set 452# CONFIG_BLK_DEV_HD is not set
411 453
@@ -414,6 +456,7 @@ CONFIG_IDE_GENERIC=y
414# 456#
415# CONFIG_RAID_ATTRS is not set 457# CONFIG_RAID_ATTRS is not set
416CONFIG_SCSI=y 458CONFIG_SCSI=y
459CONFIG_SCSI_NETLINK=y
417CONFIG_SCSI_PROC_FS=y 460CONFIG_SCSI_PROC_FS=y
418 461
419# 462#
@@ -434,22 +477,54 @@ CONFIG_SCSI_CONSTANTS=y
434# CONFIG_SCSI_LOGGING is not set 477# CONFIG_SCSI_LOGGING is not set
435 478
436# 479#
437# SCSI Transport Attributes 480# SCSI Transports
438# 481#
439# CONFIG_SCSI_SPI_ATTRS is not set 482# CONFIG_SCSI_SPI_ATTRS is not set
440CONFIG_SCSI_FC_ATTRS=y 483CONFIG_SCSI_FC_ATTRS=y
441CONFIG_SCSI_ISCSI_ATTRS=m 484CONFIG_SCSI_ISCSI_ATTRS=m
442# CONFIG_SCSI_SAS_ATTRS is not set 485# CONFIG_SCSI_SAS_ATTRS is not set
486# CONFIG_SCSI_SAS_LIBSAS is not set
443 487
444# 488#
445# SCSI low-level drivers 489# SCSI low-level drivers
446# 490#
447CONFIG_ISCSI_TCP=m 491CONFIG_ISCSI_TCP=m
448# CONFIG_SGIWD93_SCSI is not set 492# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
449# CONFIG_SCSI_SATA is not set 493# CONFIG_SCSI_3W_9XXX is not set
494# CONFIG_SCSI_ACARD is not set
495# CONFIG_SCSI_AACRAID is not set
496# CONFIG_SCSI_AIC7XXX is not set
497# CONFIG_SCSI_AIC7XXX_OLD is not set
498# CONFIG_SCSI_AIC79XX is not set
499# CONFIG_SCSI_AIC94XX is not set
500# CONFIG_SCSI_DPT_I2O is not set
501# CONFIG_SCSI_ARCMSR is not set
502# CONFIG_MEGARAID_NEWGEN is not set
503# CONFIG_MEGARAID_LEGACY is not set
504# CONFIG_MEGARAID_SAS is not set
505# CONFIG_SCSI_HPTIOP is not set
506# CONFIG_SCSI_DMX3191D is not set
507# CONFIG_SCSI_FUTURE_DOMAIN is not set
508# CONFIG_SCSI_IPS is not set
509# CONFIG_SCSI_INITIO is not set
510# CONFIG_SCSI_INIA100 is not set
511# CONFIG_SCSI_STEX is not set
512# CONFIG_SCSI_SYM53C8XX_2 is not set
513# CONFIG_SCSI_QLOGIC_1280 is not set
514# CONFIG_SCSI_QLA_FC is not set
515# CONFIG_SCSI_QLA_ISCSI is not set
516# CONFIG_SCSI_LPFC is not set
517# CONFIG_SCSI_DC395x is not set
518# CONFIG_SCSI_DC390T is not set
519# CONFIG_SCSI_NSP32 is not set
450# CONFIG_SCSI_DEBUG is not set 520# CONFIG_SCSI_DEBUG is not set
451 521
452# 522#
523# Serial ATA (prod) and Parallel ATA (experimental) drivers
524#
525# CONFIG_ATA is not set
526
527#
453# Multi-device support (RAID and LVM) 528# Multi-device support (RAID and LVM)
454# 529#
455# CONFIG_MD is not set 530# CONFIG_MD is not set
@@ -458,14 +533,19 @@ CONFIG_ISCSI_TCP=m
458# Fusion MPT device support 533# Fusion MPT device support
459# 534#
460# CONFIG_FUSION is not set 535# CONFIG_FUSION is not set
536# CONFIG_FUSION_SPI is not set
537# CONFIG_FUSION_FC is not set
538# CONFIG_FUSION_SAS is not set
461 539
462# 540#
463# IEEE 1394 (FireWire) support 541# IEEE 1394 (FireWire) support
464# 542#
543# CONFIG_IEEE1394 is not set
465 544
466# 545#
467# I2O device support 546# I2O device support
468# 547#
548# CONFIG_I2O is not set
469 549
470# 550#
471# Network device support 551# Network device support
@@ -477,6 +557,11 @@ CONFIG_NETDEVICES=y
477# CONFIG_TUN is not set 557# CONFIG_TUN is not set
478 558
479# 559#
560# ARCnet devices
561#
562# CONFIG_ARCNET is not set
563
564#
480# PHY device support 565# PHY device support
481# 566#
482# CONFIG_PHYLIB is not set 567# CONFIG_PHYLIB is not set
@@ -486,20 +571,73 @@ CONFIG_NETDEVICES=y
486# 571#
487CONFIG_NET_ETHERNET=y 572CONFIG_NET_ETHERNET=y
488CONFIG_MII=y 573CONFIG_MII=y
574# CONFIG_HAPPYMEAL is not set
575# CONFIG_SUNGEM is not set
576# CONFIG_CASSINI is not set
577# CONFIG_NET_VENDOR_3COM is not set
489# CONFIG_DM9000 is not set 578# CONFIG_DM9000 is not set
490# CONFIG_SGISEEQ is not set 579
580#
581# Tulip family network device support
582#
583# CONFIG_NET_TULIP is not set
584# CONFIG_HP100 is not set
585CONFIG_NET_PCI=y
586# CONFIG_PCNET32 is not set
587# CONFIG_AMD8111_ETH is not set
588# CONFIG_ADAPTEC_STARFIRE is not set
589# CONFIG_B44 is not set
590# CONFIG_FORCEDETH is not set
591# CONFIG_DGRS is not set
592# CONFIG_EEPRO100 is not set
593# CONFIG_E100 is not set
594# CONFIG_FEALNX is not set
595# CONFIG_NATSEMI is not set
596# CONFIG_NE2K_PCI is not set
597# CONFIG_8139CP is not set
598CONFIG_8139TOO=y
599# CONFIG_8139TOO_PIO is not set
600CONFIG_8139TOO_TUNE_TWISTER=y
601CONFIG_8139TOO_8129=y
602# CONFIG_8139_OLD_RX_RESET is not set
603# CONFIG_SIS900 is not set
604# CONFIG_EPIC100 is not set
605# CONFIG_SUNDANCE is not set
606# CONFIG_TLAN is not set
607# CONFIG_VIA_RHINE is not set
608# CONFIG_LAN_SAA9730 is not set
491 609
492# 610#
493# Ethernet (1000 Mbit) 611# Ethernet (1000 Mbit)
494# 612#
613# CONFIG_ACENIC is not set
614# CONFIG_DL2K is not set
615# CONFIG_E1000 is not set
616# CONFIG_NS83820 is not set
617# CONFIG_HAMACHI is not set
618# CONFIG_YELLOWFIN is not set
619# CONFIG_R8169 is not set
620# CONFIG_SIS190 is not set
621# CONFIG_SKGE is not set
622# CONFIG_SKY2 is not set
623# CONFIG_SK98LIN is not set
624# CONFIG_VIA_VELOCITY is not set
625# CONFIG_TIGON3 is not set
626# CONFIG_BNX2 is not set
627# CONFIG_QLA3XXX is not set
495 628
496# 629#
497# Ethernet (10000 Mbit) 630# Ethernet (10000 Mbit)
498# 631#
632# CONFIG_CHELSIO_T1 is not set
633# CONFIG_IXGB is not set
634# CONFIG_S2IO is not set
635# CONFIG_MYRI10GE is not set
499 636
500# 637#
501# Token Ring devices 638# Token Ring devices
502# 639#
640# CONFIG_TR is not set
503 641
504# 642#
505# Wireless LAN (non-hamradio) 643# Wireless LAN (non-hamradio)
@@ -510,8 +648,11 @@ CONFIG_MII=y
510# Wan interfaces 648# Wan interfaces
511# 649#
512# CONFIG_WAN is not set 650# CONFIG_WAN is not set
651# CONFIG_FDDI is not set
652# CONFIG_HIPPI is not set
513# CONFIG_PPP is not set 653# CONFIG_PPP is not set
514# CONFIG_SLIP is not set 654# CONFIG_SLIP is not set
655# CONFIG_NET_FC is not set
515# CONFIG_SHAPER is not set 656# CONFIG_SHAPER is not set
516# CONFIG_NETCONSOLE is not set 657# CONFIG_NETCONSOLE is not set
517# CONFIG_NETPOLL is not set 658# CONFIG_NETPOLL is not set
@@ -531,6 +672,7 @@ CONFIG_MII=y
531# Input device support 672# Input device support
532# 673#
533CONFIG_INPUT=y 674CONFIG_INPUT=y
675# CONFIG_INPUT_FF_MEMLESS is not set
534 676
535# 677#
536# Userland interfaces 678# Userland interfaces
@@ -556,6 +698,7 @@ CONFIG_INPUT=y
556CONFIG_SERIO=y 698CONFIG_SERIO=y
557# CONFIG_SERIO_I8042 is not set 699# CONFIG_SERIO_I8042 is not set
558# CONFIG_SERIO_SERPORT is not set 700# CONFIG_SERIO_SERPORT is not set
701# CONFIG_SERIO_PCIPS2 is not set
559CONFIG_SERIO_LIBPS2=y 702CONFIG_SERIO_LIBPS2=y
560# CONFIG_SERIO_RAW is not set 703# CONFIG_SERIO_RAW is not set
561# CONFIG_GAMEPORT is not set 704# CONFIG_GAMEPORT is not set
@@ -566,7 +709,7 @@ CONFIG_SERIO_LIBPS2=y
566CONFIG_VT=y 709CONFIG_VT=y
567CONFIG_VT_CONSOLE=y 710CONFIG_VT_CONSOLE=y
568CONFIG_HW_CONSOLE=y 711CONFIG_HW_CONSOLE=y
569CONFIG_VT_HW_CONSOLE_BINDING=y 712# CONFIG_VT_HW_CONSOLE_BINDING is not set
570# CONFIG_SERIAL_NONSTANDARD is not set 713# CONFIG_SERIAL_NONSTANDARD is not set
571 714
572# 715#
@@ -577,7 +720,8 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
577# 720#
578# Non-8250 serial port support 721# Non-8250 serial port support
579# 722#
580# CONFIG_SERIAL_IP22_ZILOG is not set 723# CONFIG_SERIAL_IP3106 is not set
724# CONFIG_SERIAL_JSM is not set
581CONFIG_UNIX98_PTYS=y 725CONFIG_UNIX98_PTYS=y
582CONFIG_LEGACY_PTYS=y 726CONFIG_LEGACY_PTYS=y
583CONFIG_LEGACY_PTY_COUNT=256 727CONFIG_LEGACY_PTY_COUNT=256
@@ -591,16 +735,17 @@ CONFIG_LEGACY_PTY_COUNT=256
591# Watchdog Cards 735# Watchdog Cards
592# 736#
593# CONFIG_WATCHDOG is not set 737# CONFIG_WATCHDOG is not set
594# CONFIG_HW_RANDOM is not set 738CONFIG_HW_RANDOM=y
595# CONFIG_RTC is not set 739# CONFIG_RTC is not set
596# CONFIG_SGI_DS1286 is not set
597# CONFIG_GEN_RTC is not set 740# CONFIG_GEN_RTC is not set
598# CONFIG_DTLK is not set 741# CONFIG_DTLK is not set
599# CONFIG_R3964 is not set 742# CONFIG_R3964 is not set
743# CONFIG_APPLICOM is not set
600 744
601# 745#
602# Ftape, the floppy tape device driver 746# Ftape, the floppy tape device driver
603# 747#
748# CONFIG_DRM is not set
604# CONFIG_RAW_DRIVER is not set 749# CONFIG_RAW_DRIVER is not set
605 750
606# 751#
@@ -631,35 +776,37 @@ CONFIG_HWMON=y
631# CONFIG_HWMON_VID is not set 776# CONFIG_HWMON_VID is not set
632# CONFIG_SENSORS_ABITUGURU is not set 777# CONFIG_SENSORS_ABITUGURU is not set
633# CONFIG_SENSORS_F71805F is not set 778# CONFIG_SENSORS_F71805F is not set
779# CONFIG_SENSORS_VT1211 is not set
634# CONFIG_HWMON_DEBUG_CHIP is not set 780# CONFIG_HWMON_DEBUG_CHIP is not set
635 781
636# 782#
637# Misc devices 783# Misc devices
638# 784#
785# CONFIG_TIFM_CORE is not set
639 786
640# 787#
641# Multimedia devices 788# Multimedia devices
642# 789#
643# CONFIG_VIDEO_DEV is not set 790# CONFIG_VIDEO_DEV is not set
644CONFIG_VIDEO_V4L2=y
645 791
646# 792#
647# Digital Video Broadcasting Devices 793# Digital Video Broadcasting Devices
648# 794#
649# CONFIG_DVB is not set 795# CONFIG_DVB is not set
796# CONFIG_USB_DABUSB is not set
650 797
651# 798#
652# Graphics support 799# Graphics support
653# 800#
654# CONFIG_FIRMWARE_EDID is not set 801CONFIG_FIRMWARE_EDID=y
655# CONFIG_FB is not set 802# CONFIG_FB is not set
656 803
657# 804#
658# Console display driver support 805# Console display driver support
659# 806#
660# CONFIG_VGA_CONSOLE is not set 807# CONFIG_VGA_CONSOLE is not set
661# CONFIG_SGI_NEWPORT_CONSOLE is not set
662CONFIG_DUMMY_CONSOLE=y 808CONFIG_DUMMY_CONSOLE=y
809# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
663 810
664# 811#
665# Sound 812# Sound
@@ -669,15 +816,131 @@ CONFIG_DUMMY_CONSOLE=y
669# 816#
670# USB support 817# USB support
671# 818#
672# CONFIG_USB_ARCH_HAS_HCD is not set 819CONFIG_USB_ARCH_HAS_HCD=y
673# CONFIG_USB_ARCH_HAS_OHCI is not set 820CONFIG_USB_ARCH_HAS_OHCI=y
674# CONFIG_USB_ARCH_HAS_EHCI is not set 821CONFIG_USB_ARCH_HAS_EHCI=y
822CONFIG_USB=y
823# CONFIG_USB_DEBUG is not set
824
825#
826# Miscellaneous USB options
827#
828# CONFIG_USB_DEVICEFS is not set
829# CONFIG_USB_BANDWIDTH is not set
830# CONFIG_USB_DYNAMIC_MINORS is not set
831# CONFIG_USB_OTG is not set
832
833#
834# USB Host Controller Drivers
835#
836# CONFIG_USB_EHCI_HCD is not set
837# CONFIG_USB_ISP116X_HCD is not set
838CONFIG_USB_OHCI_HCD=y
839# CONFIG_USB_OHCI_BIG_ENDIAN is not set
840CONFIG_USB_OHCI_LITTLE_ENDIAN=y
841# CONFIG_USB_UHCI_HCD is not set
842# CONFIG_USB_SL811_HCD is not set
843
844#
845# USB Device Class drivers
846#
847# CONFIG_USB_ACM is not set
848# CONFIG_USB_PRINTER is not set
675 849
676# 850#
677# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 851# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
678# 852#
679 853
680# 854#
855# may also be needed; see USB_STORAGE Help for more information
856#
857CONFIG_USB_STORAGE=y
858# CONFIG_USB_STORAGE_DEBUG is not set
859CONFIG_USB_STORAGE_DATAFAB=y
860CONFIG_USB_STORAGE_FREECOM=y
861CONFIG_USB_STORAGE_ISD200=y
862CONFIG_USB_STORAGE_DPCM=y
863CONFIG_USB_STORAGE_USBAT=y
864CONFIG_USB_STORAGE_SDDR09=y
865CONFIG_USB_STORAGE_SDDR55=y
866CONFIG_USB_STORAGE_JUMPSHOT=y
867# CONFIG_USB_STORAGE_ALAUDA is not set
868# CONFIG_USB_STORAGE_KARMA is not set
869# CONFIG_USB_LIBUSUAL is not set
870
871#
872# USB Input Devices
873#
874# CONFIG_USB_HID is not set
875
876#
877# USB HID Boot Protocol drivers
878#
879# CONFIG_USB_KBD is not set
880# CONFIG_USB_MOUSE is not set
881# CONFIG_USB_AIPTEK is not set
882# CONFIG_USB_WACOM is not set
883# CONFIG_USB_ACECAD is not set
884# CONFIG_USB_KBTAB is not set
885# CONFIG_USB_POWERMATE is not set
886# CONFIG_USB_TOUCHSCREEN is not set
887# CONFIG_USB_YEALINK is not set
888# CONFIG_USB_XPAD is not set
889# CONFIG_USB_ATI_REMOTE is not set
890# CONFIG_USB_ATI_REMOTE2 is not set
891# CONFIG_USB_KEYSPAN_REMOTE is not set
892# CONFIG_USB_APPLETOUCH is not set
893# CONFIG_USB_TRANCEVIBRATOR is not set
894
895#
896# USB Imaging devices
897#
898# CONFIG_USB_MDC800 is not set
899# CONFIG_USB_MICROTEK is not set
900
901#
902# USB Network Adapters
903#
904# CONFIG_USB_CATC is not set
905# CONFIG_USB_KAWETH is not set
906# CONFIG_USB_PEGASUS is not set
907# CONFIG_USB_RTL8150 is not set
908# CONFIG_USB_USBNET is not set
909CONFIG_USB_MON=y
910
911#
912# USB port drivers
913#
914
915#
916# USB Serial Converter support
917#
918# CONFIG_USB_SERIAL is not set
919
920#
921# USB Miscellaneous drivers
922#
923# CONFIG_USB_EMI62 is not set
924# CONFIG_USB_EMI26 is not set
925# CONFIG_USB_ADUTUX is not set
926# CONFIG_USB_AUERSWALD is not set
927# CONFIG_USB_RIO500 is not set
928# CONFIG_USB_LEGOTOWER is not set
929# CONFIG_USB_LCD is not set
930# CONFIG_USB_LED is not set
931# CONFIG_USB_CYPRESS_CY7C63 is not set
932# CONFIG_USB_CYTHERM is not set
933# CONFIG_USB_PHIDGET is not set
934# CONFIG_USB_IDMOUSE is not set
935# CONFIG_USB_FTDI_ELAN is not set
936# CONFIG_USB_APPLEDISPLAY is not set
937# CONFIG_USB_LD is not set
938
939#
940# USB DSL modem support
941#
942
943#
681# USB Gadget Support 944# USB Gadget Support
682# 945#
683# CONFIG_USB_GADGET is not set 946# CONFIG_USB_GADGET is not set
@@ -703,6 +966,7 @@ CONFIG_DUMMY_CONSOLE=y
703# 966#
704# InfiniBand support 967# InfiniBand support
705# 968#
969# CONFIG_INFINIBAND is not set
706 970
707# 971#
708# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 972# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
@@ -733,10 +997,12 @@ CONFIG_EXT2_FS=y
733# CONFIG_EXT2_FS_XATTR is not set 997# CONFIG_EXT2_FS_XATTR is not set
734# CONFIG_EXT2_FS_XIP is not set 998# CONFIG_EXT2_FS_XIP is not set
735# CONFIG_EXT3_FS is not set 999# CONFIG_EXT3_FS is not set
1000# CONFIG_EXT4DEV_FS is not set
736# CONFIG_REISERFS_FS is not set 1001# CONFIG_REISERFS_FS is not set
737# CONFIG_JFS_FS is not set 1002# CONFIG_JFS_FS is not set
738# CONFIG_FS_POSIX_ACL is not set 1003# CONFIG_FS_POSIX_ACL is not set
739# CONFIG_XFS_FS is not set 1004# CONFIG_XFS_FS is not set
1005# CONFIG_GFS2_FS is not set
740# CONFIG_OCFS2_FS is not set 1006# CONFIG_OCFS2_FS is not set
741# CONFIG_MINIX_FS is not set 1007# CONFIG_MINIX_FS is not set
742# CONFIG_ROMFS_FS is not set 1008# CONFIG_ROMFS_FS is not set
@@ -769,8 +1035,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
769# 1035#
770CONFIG_PROC_FS=y 1036CONFIG_PROC_FS=y
771# CONFIG_PROC_KCORE is not set 1037# CONFIG_PROC_KCORE is not set
1038CONFIG_PROC_SYSCTL=y
772CONFIG_SYSFS=y 1039CONFIG_SYSFS=y
773CONFIG_TMPFS=y 1040CONFIG_TMPFS=y
1041# CONFIG_TMPFS_POSIX_ACL is not set
774# CONFIG_HUGETLB_PAGE is not set 1042# CONFIG_HUGETLB_PAGE is not set
775CONFIG_RAMFS=y 1043CONFIG_RAMFS=y
776# CONFIG_CONFIGFS_FS is not set 1044# CONFIG_CONFIGFS_FS is not set
@@ -813,7 +1081,6 @@ CONFIG_SUNRPC=y
813# CONFIG_RPCSEC_GSS_SPKM3 is not set 1081# CONFIG_RPCSEC_GSS_SPKM3 is not set
814# CONFIG_SMB_FS is not set 1082# CONFIG_SMB_FS is not set
815# CONFIG_CIFS is not set 1083# CONFIG_CIFS is not set
816# CONFIG_CIFS_DEBUG2 is not set
817# CONFIG_NCP_FS is not set 1084# CONFIG_NCP_FS is not set
818# CONFIG_CODA_FS is not set 1085# CONFIG_CODA_FS is not set
819# CONFIG_AFS_FS is not set 1086# CONFIG_AFS_FS is not set
@@ -824,7 +1091,6 @@ CONFIG_SUNRPC=y
824# 1091#
825# CONFIG_PARTITION_ADVANCED is not set 1092# CONFIG_PARTITION_ADVANCED is not set
826CONFIG_MSDOS_PARTITION=y 1093CONFIG_MSDOS_PARTITION=y
827CONFIG_SGI_PARTITION=y
828 1094
829# 1095#
830# Native Language Support 1096# Native Language Support
@@ -880,6 +1146,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
880# 1146#
881CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1147CONFIG_TRACE_IRQFLAGS_SUPPORT=y
882# CONFIG_PRINTK_TIME is not set 1148# CONFIG_PRINTK_TIME is not set
1149CONFIG_ENABLE_MUST_CHECK=y
883CONFIG_MAGIC_SYSRQ=y 1150CONFIG_MAGIC_SYSRQ=y
884# CONFIG_UNUSED_SYMBOLS is not set 1151# CONFIG_UNUSED_SYMBOLS is not set
885CONFIG_DEBUG_KERNEL=y 1152CONFIG_DEBUG_KERNEL=y
@@ -893,13 +1160,17 @@ CONFIG_DEBUG_SLAB=y
893# CONFIG_DEBUG_SPINLOCK is not set 1160# CONFIG_DEBUG_SPINLOCK is not set
894CONFIG_DEBUG_MUTEXES=y 1161CONFIG_DEBUG_MUTEXES=y
895# CONFIG_DEBUG_RWSEMS is not set 1162# CONFIG_DEBUG_RWSEMS is not set
1163# CONFIG_DEBUG_LOCK_ALLOC is not set
1164# CONFIG_PROVE_LOCKING is not set
896# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1165# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
897# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1166# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
898# CONFIG_DEBUG_KOBJECT is not set 1167# CONFIG_DEBUG_KOBJECT is not set
899# CONFIG_DEBUG_INFO is not set 1168# CONFIG_DEBUG_INFO is not set
900# CONFIG_DEBUG_FS is not set 1169# CONFIG_DEBUG_FS is not set
901# CONFIG_DEBUG_VM is not set 1170# CONFIG_DEBUG_VM is not set
1171# CONFIG_DEBUG_LIST is not set
902CONFIG_FORCED_INLINING=y 1172CONFIG_FORCED_INLINING=y
1173# CONFIG_HEADERS_CHECK is not set
903# CONFIG_RCU_TORTURE_TEST is not set 1174# CONFIG_RCU_TORTURE_TEST is not set
904CONFIG_CROSSCOMPILE=y 1175CONFIG_CROSSCOMPILE=y
905CONFIG_CMDLINE="console=ttyS1,38400n8 kgdb=ttyS0 root=/dev/nfs ip=bootp" 1176CONFIG_CMDLINE="console=ttyS1,38400n8 kgdb=ttyS0 root=/dev/nfs ip=bootp"
@@ -918,6 +1189,9 @@ CONFIG_CMDLINE="console=ttyS1,38400n8 kgdb=ttyS0 root=/dev/nfs ip=bootp"
918# Cryptographic options 1189# Cryptographic options
919# 1190#
920CONFIG_CRYPTO=y 1191CONFIG_CRYPTO=y
1192CONFIG_CRYPTO_ALGAPI=m
1193CONFIG_CRYPTO_BLKCIPHER=m
1194CONFIG_CRYPTO_MANAGER=m
921# CONFIG_CRYPTO_HMAC is not set 1195# CONFIG_CRYPTO_HMAC is not set
922# CONFIG_CRYPTO_NULL is not set 1196# CONFIG_CRYPTO_NULL is not set
923# CONFIG_CRYPTO_MD4 is not set 1197# CONFIG_CRYPTO_MD4 is not set
@@ -927,6 +1201,8 @@ CONFIG_CRYPTO_MD5=m
927# CONFIG_CRYPTO_SHA512 is not set 1201# CONFIG_CRYPTO_SHA512 is not set
928# CONFIG_CRYPTO_WP512 is not set 1202# CONFIG_CRYPTO_WP512 is not set
929# CONFIG_CRYPTO_TGR192 is not set 1203# CONFIG_CRYPTO_TGR192 is not set
1204CONFIG_CRYPTO_ECB=m
1205CONFIG_CRYPTO_CBC=m
930# CONFIG_CRYPTO_DES is not set 1206# CONFIG_CRYPTO_DES is not set
931# CONFIG_CRYPTO_BLOWFISH is not set 1207# CONFIG_CRYPTO_BLOWFISH is not set
932# CONFIG_CRYPTO_TWOFISH is not set 1208# CONFIG_CRYPTO_TWOFISH is not set
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index e93266b37dd9..64b9fbf44a64 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.19-rc2
4# Thu Jul 6 10:04:18 2006 4# Sat Oct 14 23:12:15 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,8 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_IVR is not set
29# CONFIG_MIPS_ITE8172 is not set
30# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
31# CONFIG_LASAT is not set 29# CONFIG_LASAT is not set
32# CONFIG_MIPS_ATLAS is not set 30# CONFIG_MIPS_ATLAS is not set
@@ -40,14 +38,14 @@ CONFIG_MIPS=y
40# CONFIG_MOMENCO_OCELOT_C is not set 38# CONFIG_MOMENCO_OCELOT_C is not set
41# CONFIG_MOMENCO_OCELOT_G is not set 39# CONFIG_MOMENCO_OCELOT_G is not set
42# CONFIG_MIPS_XXS1500 is not set 40# CONFIG_MIPS_XXS1500 is not set
43# CONFIG_PNX8550_V2PCI is not set 41CONFIG_PNX8550_V2PCI=y
44# CONFIG_PNX8550_JBS is not set 42# CONFIG_PNX8550_JBS is not set
45# CONFIG_DDB5477 is not set 43# CONFIG_DDB5477 is not set
46# CONFIG_MACH_VR41XX is not set 44# CONFIG_MACH_VR41XX is not set
47# CONFIG_PMC_YOSEMITE is not set 45# CONFIG_PMC_YOSEMITE is not set
48# CONFIG_QEMU is not set 46# CONFIG_QEMU is not set
49# CONFIG_MARKEINS is not set 47# CONFIG_MARKEINS is not set
50CONFIG_SGI_IP22=y 48# CONFIG_SGI_IP22 is not set
51# CONFIG_SGI_IP27 is not set 49# CONFIG_SGI_IP27 is not set
52# CONFIG_SGI_IP32 is not set 50# CONFIG_SGI_IP32 is not set
53# CONFIG_SIBYTE_BIGSUR is not set 51# CONFIG_SIBYTE_BIGSUR is not set
@@ -67,25 +65,21 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
67CONFIG_GENERIC_FIND_NEXT_BIT=y 65CONFIG_GENERIC_FIND_NEXT_BIT=y
68CONFIG_GENERIC_HWEIGHT=y 66CONFIG_GENERIC_HWEIGHT=y
69CONFIG_GENERIC_CALIBRATE_DELAY=y 67CONFIG_GENERIC_CALIBRATE_DELAY=y
68CONFIG_GENERIC_TIME=y
70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 69CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
71CONFIG_ARC=y
72CONFIG_DMA_NONCOHERENT=y 70CONFIG_DMA_NONCOHERENT=y
73CONFIG_DMA_NEED_PCI_MAP_STATE=y 71CONFIG_DMA_NEED_PCI_MAP_STATE=y
74CONFIG_CPU_BIG_ENDIAN=y 72# CONFIG_CPU_BIG_ENDIAN is not set
75# CONFIG_CPU_LITTLE_ENDIAN is not set 73CONFIG_CPU_LITTLE_ENDIAN=y
76CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 74CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
77CONFIG_IRQ_CPU=y 75CONFIG_PNX8550=y
78CONFIG_SWAP_IO_SPACE=y 76CONFIG_SOC_PNX8550=y
79CONFIG_ARC32=y
80CONFIG_BOOT_ELF32=y
81CONFIG_MIPS_L1_CACHE_SHIFT=5 77CONFIG_MIPS_L1_CACHE_SHIFT=5
82# CONFIG_ARC_CONSOLE is not set
83CONFIG_ARC_PROMLIB=y
84 78
85# 79#
86# CPU selection 80# CPU selection
87# 81#
88# CONFIG_CPU_MIPS32_R1 is not set 82CONFIG_CPU_MIPS32_R1=y
89# CONFIG_CPU_MIPS32_R2 is not set 83# CONFIG_CPU_MIPS32_R2 is not set
90# CONFIG_CPU_MIPS64_R1 is not set 84# CONFIG_CPU_MIPS64_R1 is not set
91# CONFIG_CPU_MIPS64_R2 is not set 85# CONFIG_CPU_MIPS64_R2 is not set
@@ -93,7 +87,7 @@ CONFIG_ARC_PROMLIB=y
93# CONFIG_CPU_TX39XX is not set 87# CONFIG_CPU_TX39XX is not set
94# CONFIG_CPU_VR41XX is not set 88# CONFIG_CPU_VR41XX is not set
95# CONFIG_CPU_R4300 is not set 89# CONFIG_CPU_R4300 is not set
96CONFIG_CPU_R4X00=y 90# CONFIG_CPU_R4X00 is not set
97# CONFIG_CPU_TX49XX is not set 91# CONFIG_CPU_TX49XX is not set
98# CONFIG_CPU_R5000 is not set 92# CONFIG_CPU_R5000 is not set
99# CONFIG_CPU_R5432 is not set 93# CONFIG_CPU_R5432 is not set
@@ -104,12 +98,11 @@ CONFIG_CPU_R4X00=y
104# CONFIG_CPU_RM7000 is not set 98# CONFIG_CPU_RM7000 is not set
105# CONFIG_CPU_RM9000 is not set 99# CONFIG_CPU_RM9000 is not set
106# CONFIG_CPU_SB1 is not set 100# CONFIG_CPU_SB1 is not set
107CONFIG_SYS_HAS_CPU_R4X00=y 101CONFIG_SYS_HAS_CPU_MIPS32_R1=y
108CONFIG_SYS_HAS_CPU_R5000=y 102CONFIG_CPU_MIPS32=y
103CONFIG_CPU_MIPSR1=y
109CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 104CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
110CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
111CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y 105CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
112CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
113 106
114# 107#
115# Kernel type 108# Kernel type
@@ -120,17 +113,17 @@ CONFIG_PAGE_SIZE_4KB=y
120# CONFIG_PAGE_SIZE_8KB is not set 113# CONFIG_PAGE_SIZE_8KB is not set
121# CONFIG_PAGE_SIZE_16KB is not set 114# CONFIG_PAGE_SIZE_16KB is not set
122# CONFIG_PAGE_SIZE_64KB is not set 115# CONFIG_PAGE_SIZE_64KB is not set
123CONFIG_BOARD_SCACHE=y 116CONFIG_CPU_HAS_PREFETCH=y
124CONFIG_IP22_CPU_SCACHE=y
125CONFIG_MIPS_MT_DISABLED=y 117CONFIG_MIPS_MT_DISABLED=y
126# CONFIG_MIPS_MT_SMTC is not set
127# CONFIG_MIPS_MT_SMP is not set 118# CONFIG_MIPS_MT_SMP is not set
119# CONFIG_MIPS_MT_SMTC is not set
128# CONFIG_MIPS_VPE_LOADER is not set 120# CONFIG_MIPS_VPE_LOADER is not set
129# CONFIG_64BIT_PHYS_ADDR is not set 121# CONFIG_64BIT_PHYS_ADDR is not set
130CONFIG_CPU_HAS_LLSC=y 122CONFIG_CPU_HAS_LLSC=y
131CONFIG_CPU_HAS_SYNC=y 123CONFIG_CPU_HAS_SYNC=y
132CONFIG_GENERIC_HARDIRQS=y 124CONFIG_GENERIC_HARDIRQS=y
133CONFIG_GENERIC_IRQ_PROBE=y 125CONFIG_GENERIC_IRQ_PROBE=y
126CONFIG_CPU_SUPPORTS_HIGHMEM=y
134CONFIG_ARCH_FLATMEM_ENABLE=y 127CONFIG_ARCH_FLATMEM_ENABLE=y
135CONFIG_SELECT_MEMORY_MODEL=y 128CONFIG_SELECT_MEMORY_MODEL=y
136CONFIG_FLATMEM_MANUAL=y 129CONFIG_FLATMEM_MANUAL=y
@@ -144,12 +137,12 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
144# CONFIG_HZ_48 is not set 137# CONFIG_HZ_48 is not set
145# CONFIG_HZ_100 is not set 138# CONFIG_HZ_100 is not set
146# CONFIG_HZ_128 is not set 139# CONFIG_HZ_128 is not set
147# CONFIG_HZ_250 is not set 140CONFIG_HZ_250=y
148# CONFIG_HZ_256 is not set 141# CONFIG_HZ_256 is not set
149CONFIG_HZ_1000=y 142# CONFIG_HZ_1000 is not set
150# CONFIG_HZ_1024 is not set 143# CONFIG_HZ_1024 is not set
151CONFIG_SYS_SUPPORTS_ARBIT_HZ=y 144CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
152CONFIG_HZ=1000 145CONFIG_HZ=250
153CONFIG_PREEMPT_NONE=y 146CONFIG_PREEMPT_NONE=y
154# CONFIG_PREEMPT_VOLUNTARY is not set 147# CONFIG_PREEMPT_VOLUNTARY is not set
155# CONFIG_PREEMPT is not set 148# CONFIG_PREEMPT is not set
@@ -171,16 +164,20 @@ CONFIG_LOCALVERSION=""
171CONFIG_LOCALVERSION_AUTO=y 164CONFIG_LOCALVERSION_AUTO=y
172CONFIG_SWAP=y 165CONFIG_SWAP=y
173CONFIG_SYSVIPC=y 166CONFIG_SYSVIPC=y
167# CONFIG_IPC_NS is not set
174# CONFIG_POSIX_MQUEUE is not set 168# CONFIG_POSIX_MQUEUE is not set
175# CONFIG_BSD_PROCESS_ACCT is not set 169# CONFIG_BSD_PROCESS_ACCT is not set
176CONFIG_SYSCTL=y 170# CONFIG_TASKSTATS is not set
171# CONFIG_UTS_NS is not set
177# CONFIG_AUDIT is not set 172# CONFIG_AUDIT is not set
178CONFIG_IKCONFIG=y 173CONFIG_IKCONFIG=y
179CONFIG_IKCONFIG_PROC=y 174CONFIG_IKCONFIG_PROC=y
180# CONFIG_RELAY is not set 175# CONFIG_RELAY is not set
181CONFIG_INITRAMFS_SOURCE="" 176CONFIG_INITRAMFS_SOURCE=""
182# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 177# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
178CONFIG_SYSCTL=y
183CONFIG_EMBEDDED=y 179CONFIG_EMBEDDED=y
180# CONFIG_SYSCTL_SYSCALL is not set
184CONFIG_KALLSYMS=y 181CONFIG_KALLSYMS=y
185# CONFIG_KALLSYMS_EXTRA_PASS is not set 182# CONFIG_KALLSYMS_EXTRA_PASS is not set
186CONFIG_HOTPLUG=y 183CONFIG_HOTPLUG=y
@@ -188,12 +185,12 @@ CONFIG_PRINTK=y
188CONFIG_BUG=y 185CONFIG_BUG=y
189CONFIG_ELF_CORE=y 186CONFIG_ELF_CORE=y
190CONFIG_BASE_FULL=y 187CONFIG_BASE_FULL=y
191CONFIG_RT_MUTEXES=y
192CONFIG_FUTEX=y 188CONFIG_FUTEX=y
193CONFIG_EPOLL=y 189CONFIG_EPOLL=y
194CONFIG_SHMEM=y 190CONFIG_SHMEM=y
195CONFIG_SLAB=y 191CONFIG_SLAB=y
196CONFIG_VM_EVENT_COUNTERS=y 192CONFIG_VM_EVENT_COUNTERS=y
193CONFIG_RT_MUTEXES=y
197# CONFIG_TINY_SHMEM is not set 194# CONFIG_TINY_SHMEM is not set
198CONFIG_BASE_SMALL=0 195CONFIG_BASE_SMALL=0
199# CONFIG_SLOB is not set 196# CONFIG_SLOB is not set
@@ -210,6 +207,7 @@ CONFIG_KMOD=y
210# 207#
211# Block layer 208# Block layer
212# 209#
210CONFIG_BLOCK=y
213# CONFIG_LBD is not set 211# CONFIG_LBD is not set
214# CONFIG_BLK_DEV_IO_TRACE is not set 212# CONFIG_BLK_DEV_IO_TRACE is not set
215# CONFIG_LSF is not set 213# CONFIG_LSF is not set
@@ -230,8 +228,9 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
230# 228#
231# Bus options (PCI, PCMCIA, EISA, ISA, TC) 229# Bus options (PCI, PCMCIA, EISA, ISA, TC)
232# 230#
233CONFIG_HW_HAS_EISA=y 231CONFIG_HW_HAS_PCI=y
234# CONFIG_EISA is not set 232CONFIG_PCI=y
233# CONFIG_PCI_MULTITHREAD_PROBE is not set
235CONFIG_MMU=y 234CONFIG_MMU=y
236 235
237# 236#
@@ -242,6 +241,7 @@ CONFIG_MMU=y
242# 241#
243# PCI Hotplug Support 242# PCI Hotplug Support
244# 243#
244# CONFIG_HOTPLUG_PCI is not set
245 245
246# 246#
247# Executable file formats 247# Executable file formats
@@ -264,6 +264,7 @@ CONFIG_PACKET=y
264CONFIG_UNIX=y 264CONFIG_UNIX=y
265CONFIG_XFRM=y 265CONFIG_XFRM=y
266# CONFIG_XFRM_USER is not set 266# CONFIG_XFRM_USER is not set
267# CONFIG_XFRM_SUB_POLICY is not set
267# CONFIG_NET_KEY is not set 268# CONFIG_NET_KEY is not set
268CONFIG_INET=y 269CONFIG_INET=y
269# CONFIG_IP_MULTICAST is not set 270# CONFIG_IP_MULTICAST is not set
@@ -282,12 +283,14 @@ CONFIG_IP_PNP=y
282# CONFIG_INET_IPCOMP is not set 283# CONFIG_INET_IPCOMP is not set
283# CONFIG_INET_XFRM_TUNNEL is not set 284# CONFIG_INET_XFRM_TUNNEL is not set
284# CONFIG_INET_TUNNEL is not set 285# CONFIG_INET_TUNNEL is not set
285CONFIG_INET_XFRM_MODE_TRANSPORT=m 286CONFIG_INET_XFRM_MODE_TRANSPORT=y
286CONFIG_INET_XFRM_MODE_TUNNEL=m 287CONFIG_INET_XFRM_MODE_TUNNEL=y
288CONFIG_INET_XFRM_MODE_BEET=y
287CONFIG_INET_DIAG=y 289CONFIG_INET_DIAG=y
288CONFIG_INET_TCP_DIAG=y 290CONFIG_INET_TCP_DIAG=y
289# CONFIG_TCP_CONG_ADVANCED is not set 291# CONFIG_TCP_CONG_ADVANCED is not set
290CONFIG_TCP_CONG_BIC=y 292CONFIG_TCP_CONG_CUBIC=y
293CONFIG_DEFAULT_TCP_CONG="cubic"
291 294
292# 295#
293# IP: Virtual Server Configuration 296# IP: Virtual Server Configuration
@@ -300,12 +303,18 @@ CONFIG_IPV6_ROUTE_INFO=y
300# CONFIG_INET6_AH is not set 303# CONFIG_INET6_AH is not set
301# CONFIG_INET6_ESP is not set 304# CONFIG_INET6_ESP is not set
302# CONFIG_INET6_IPCOMP is not set 305# CONFIG_INET6_IPCOMP is not set
306# CONFIG_IPV6_MIP6 is not set
303# CONFIG_INET6_XFRM_TUNNEL is not set 307# CONFIG_INET6_XFRM_TUNNEL is not set
304# CONFIG_INET6_TUNNEL is not set 308# CONFIG_INET6_TUNNEL is not set
305CONFIG_INET6_XFRM_MODE_TRANSPORT=m 309CONFIG_INET6_XFRM_MODE_TRANSPORT=m
306CONFIG_INET6_XFRM_MODE_TUNNEL=m 310CONFIG_INET6_XFRM_MODE_TUNNEL=m
311CONFIG_INET6_XFRM_MODE_BEET=m
312# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
313CONFIG_IPV6_SIT=m
307# CONFIG_IPV6_TUNNEL is not set 314# CONFIG_IPV6_TUNNEL is not set
308CONFIG_NETWORK_SECMARK=y 315# CONFIG_IPV6_SUBTREES is not set
316# CONFIG_IPV6_MULTIPLE_TABLES is not set
317# CONFIG_NETWORK_SECMARK is not set
309CONFIG_NETFILTER=y 318CONFIG_NETFILTER=y
310# CONFIG_NETFILTER_DEBUG is not set 319# CONFIG_NETFILTER_DEBUG is not set
311 320
@@ -318,9 +327,9 @@ CONFIG_NETFILTER_XTABLES=m
318CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m 327CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
319CONFIG_NETFILTER_XT_TARGET_MARK=m 328CONFIG_NETFILTER_XT_TARGET_MARK=m
320CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m 329CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
321CONFIG_NETFILTER_XT_TARGET_SECMARK=m
322CONFIG_NETFILTER_XT_MATCH_COMMENT=m 330CONFIG_NETFILTER_XT_MATCH_COMMENT=m
323CONFIG_NETFILTER_XT_MATCH_DCCP=m 331CONFIG_NETFILTER_XT_MATCH_DCCP=m
332# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
324CONFIG_NETFILTER_XT_MATCH_ESP=m 333CONFIG_NETFILTER_XT_MATCH_ESP=m
325CONFIG_NETFILTER_XT_MATCH_LENGTH=m 334CONFIG_NETFILTER_XT_MATCH_LENGTH=m
326CONFIG_NETFILTER_XT_MATCH_LIMIT=m 335CONFIG_NETFILTER_XT_MATCH_LIMIT=m
@@ -329,10 +338,10 @@ CONFIG_NETFILTER_XT_MATCH_MARK=m
329# CONFIG_NETFILTER_XT_MATCH_POLICY is not set 338# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
330CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m 339CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
331CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m 340CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
332CONFIG_NETFILTER_XT_MATCH_QUOTA=m 341# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
333CONFIG_NETFILTER_XT_MATCH_REALM=m 342CONFIG_NETFILTER_XT_MATCH_REALM=m
334CONFIG_NETFILTER_XT_MATCH_SCTP=m 343CONFIG_NETFILTER_XT_MATCH_SCTP=m
335CONFIG_NETFILTER_XT_MATCH_STATISTIC=m 344# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
336CONFIG_NETFILTER_XT_MATCH_STRING=m 345CONFIG_NETFILTER_XT_MATCH_STRING=m
337CONFIG_NETFILTER_XT_MATCH_TCPMSS=m 346CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
338 347
@@ -373,7 +382,6 @@ CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
373# CONFIG_ATALK is not set 382# CONFIG_ATALK is not set
374# CONFIG_X25 is not set 383# CONFIG_X25 is not set
375# CONFIG_LAPB is not set 384# CONFIG_LAPB is not set
376# CONFIG_NET_DIVERT is not set
377# CONFIG_ECONET is not set 385# CONFIG_ECONET is not set
378# CONFIG_WAN_ROUTER is not set 386# CONFIG_WAN_ROUTER is not set
379 387
@@ -426,13 +434,20 @@ CONFIG_FW_LOADER=y
426# 434#
427# Block devices 435# Block devices
428# 436#
437# CONFIG_BLK_CPQ_DA is not set
438# CONFIG_BLK_CPQ_CISS_DA is not set
439# CONFIG_BLK_DEV_DAC960 is not set
440# CONFIG_BLK_DEV_UMEM is not set
429# CONFIG_BLK_DEV_COW_COMMON is not set 441# CONFIG_BLK_DEV_COW_COMMON is not set
430CONFIG_BLK_DEV_LOOP=y 442CONFIG_BLK_DEV_LOOP=y
431# CONFIG_BLK_DEV_CRYPTOLOOP is not set 443# CONFIG_BLK_DEV_CRYPTOLOOP is not set
432# CONFIG_BLK_DEV_NBD is not set 444# CONFIG_BLK_DEV_NBD is not set
445# CONFIG_BLK_DEV_SX8 is not set
446# CONFIG_BLK_DEV_UB is not set
433CONFIG_BLK_DEV_RAM=y 447CONFIG_BLK_DEV_RAM=y
434CONFIG_BLK_DEV_RAM_COUNT=16 448CONFIG_BLK_DEV_RAM_COUNT=16
435CONFIG_BLK_DEV_RAM_SIZE=8192 449CONFIG_BLK_DEV_RAM_SIZE=8192
450CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
436CONFIG_BLK_DEV_INITRD=y 451CONFIG_BLK_DEV_INITRD=y
437# CONFIG_CDROM_PKTCDVD is not set 452# CONFIG_CDROM_PKTCDVD is not set
438# CONFIG_ATA_OVER_ETH is not set 453# CONFIG_ATA_OVER_ETH is not set
@@ -441,6 +456,7 @@ CONFIG_BLK_DEV_INITRD=y
441# ATA/ATAPI/MFM/RLL support 456# ATA/ATAPI/MFM/RLL support
442# 457#
443CONFIG_IDE=y 458CONFIG_IDE=y
459CONFIG_IDE_MAX_HWIFS=4
444CONFIG_BLK_DEV_IDE=y 460CONFIG_BLK_DEV_IDE=y
445 461
446# 462#
@@ -459,9 +475,41 @@ CONFIG_IDEDISK_MULTI_MODE=y
459# IDE chipset support/bugfixes 475# IDE chipset support/bugfixes
460# 476#
461CONFIG_IDE_GENERIC=y 477CONFIG_IDE_GENERIC=y
478CONFIG_BLK_DEV_IDEPCI=y
479CONFIG_IDEPCI_SHARE_IRQ=y
480# CONFIG_BLK_DEV_OFFBOARD is not set
481# CONFIG_BLK_DEV_GENERIC is not set
482# CONFIG_BLK_DEV_OPTI621 is not set
483CONFIG_BLK_DEV_IDEDMA_PCI=y
484# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
485CONFIG_IDEDMA_PCI_AUTO=y
486# CONFIG_IDEDMA_ONLYDISK is not set
487# CONFIG_BLK_DEV_AEC62XX is not set
488# CONFIG_BLK_DEV_ALI15X3 is not set
489# CONFIG_BLK_DEV_AMD74XX is not set
490CONFIG_BLK_DEV_CMD64X=y
491# CONFIG_BLK_DEV_TRIFLEX is not set
492# CONFIG_BLK_DEV_CY82C693 is not set
493# CONFIG_BLK_DEV_CS5520 is not set
494# CONFIG_BLK_DEV_CS5530 is not set
495# CONFIG_BLK_DEV_HPT34X is not set
496# CONFIG_BLK_DEV_HPT366 is not set
497# CONFIG_BLK_DEV_JMICRON is not set
498# CONFIG_BLK_DEV_SC1200 is not set
499# CONFIG_BLK_DEV_PIIX is not set
500# CONFIG_BLK_DEV_IT821X is not set
501# CONFIG_BLK_DEV_NS87415 is not set
502# CONFIG_BLK_DEV_PDC202XX_OLD is not set
503# CONFIG_BLK_DEV_PDC202XX_NEW is not set
504# CONFIG_BLK_DEV_SVWKS is not set
505# CONFIG_BLK_DEV_SIIMAGE is not set
506# CONFIG_BLK_DEV_SLC90E66 is not set
507# CONFIG_BLK_DEV_TRM290 is not set
508# CONFIG_BLK_DEV_VIA82CXXX is not set
462# CONFIG_IDE_ARM is not set 509# CONFIG_IDE_ARM is not set
463# CONFIG_BLK_DEV_IDEDMA is not set 510CONFIG_BLK_DEV_IDEDMA=y
464# CONFIG_IDEDMA_AUTO is not set 511# CONFIG_IDEDMA_IVB is not set
512CONFIG_IDEDMA_AUTO=y
465# CONFIG_BLK_DEV_HD is not set 513# CONFIG_BLK_DEV_HD is not set
466 514
467# 515#
@@ -469,6 +517,7 @@ CONFIG_IDE_GENERIC=y
469# 517#
470# CONFIG_RAID_ATTRS is not set 518# CONFIG_RAID_ATTRS is not set
471CONFIG_SCSI=y 519CONFIG_SCSI=y
520CONFIG_SCSI_NETLINK=y
472CONFIG_SCSI_PROC_FS=y 521CONFIG_SCSI_PROC_FS=y
473 522
474# 523#
@@ -489,22 +538,59 @@ CONFIG_BLK_DEV_SD=y
489# CONFIG_SCSI_LOGGING is not set 538# CONFIG_SCSI_LOGGING is not set
490 539
491# 540#
492# SCSI Transport Attributes 541# SCSI Transports
493# 542#
494CONFIG_SCSI_SPI_ATTRS=m 543CONFIG_SCSI_SPI_ATTRS=m
495CONFIG_SCSI_FC_ATTRS=y 544CONFIG_SCSI_FC_ATTRS=y
496CONFIG_SCSI_ISCSI_ATTRS=m 545CONFIG_SCSI_ISCSI_ATTRS=m
497# CONFIG_SCSI_SAS_ATTRS is not set 546# CONFIG_SCSI_SAS_ATTRS is not set
547# CONFIG_SCSI_SAS_LIBSAS is not set
498 548
499# 549#
500# SCSI low-level drivers 550# SCSI low-level drivers
501# 551#
502CONFIG_ISCSI_TCP=m 552CONFIG_ISCSI_TCP=m
503# CONFIG_SGIWD93_SCSI is not set 553# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
504# CONFIG_SCSI_SATA is not set 554# CONFIG_SCSI_3W_9XXX is not set
555# CONFIG_SCSI_ACARD is not set
556# CONFIG_SCSI_AACRAID is not set
557CONFIG_SCSI_AIC7XXX=m
558CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
559CONFIG_AIC7XXX_RESET_DELAY_MS=15000
560# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
561CONFIG_AIC7XXX_DEBUG_MASK=0
562# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
563# CONFIG_SCSI_AIC7XXX_OLD is not set
564# CONFIG_SCSI_AIC79XX is not set
565# CONFIG_SCSI_AIC94XX is not set
566# CONFIG_SCSI_DPT_I2O is not set
567# CONFIG_SCSI_ARCMSR is not set
568# CONFIG_MEGARAID_NEWGEN is not set
569# CONFIG_MEGARAID_LEGACY is not set
570# CONFIG_MEGARAID_SAS is not set
571# CONFIG_SCSI_HPTIOP is not set
572# CONFIG_SCSI_DMX3191D is not set
573# CONFIG_SCSI_FUTURE_DOMAIN is not set
574# CONFIG_SCSI_IPS is not set
575# CONFIG_SCSI_INITIO is not set
576# CONFIG_SCSI_INIA100 is not set
577# CONFIG_SCSI_STEX is not set
578# CONFIG_SCSI_SYM53C8XX_2 is not set
579# CONFIG_SCSI_QLOGIC_1280 is not set
580# CONFIG_SCSI_QLA_FC is not set
581# CONFIG_SCSI_QLA_ISCSI is not set
582# CONFIG_SCSI_LPFC is not set
583# CONFIG_SCSI_DC395x is not set
584# CONFIG_SCSI_DC390T is not set
585# CONFIG_SCSI_NSP32 is not set
505# CONFIG_SCSI_DEBUG is not set 586# CONFIG_SCSI_DEBUG is not set
506 587
507# 588#
589# Serial ATA (prod) and Parallel ATA (experimental) drivers
590#
591# CONFIG_ATA is not set
592
593#
508# Multi-device support (RAID and LVM) 594# Multi-device support (RAID and LVM)
509# 595#
510# CONFIG_MD is not set 596# CONFIG_MD is not set
@@ -513,14 +599,19 @@ CONFIG_ISCSI_TCP=m
513# Fusion MPT device support 599# Fusion MPT device support
514# 600#
515# CONFIG_FUSION is not set 601# CONFIG_FUSION is not set
602# CONFIG_FUSION_SPI is not set
603# CONFIG_FUSION_FC is not set
604# CONFIG_FUSION_SAS is not set
516 605
517# 606#
518# IEEE 1394 (FireWire) support 607# IEEE 1394 (FireWire) support
519# 608#
609# CONFIG_IEEE1394 is not set
520 610
521# 611#
522# I2O device support 612# I2O device support
523# 613#
614# CONFIG_I2O is not set
524 615
525# 616#
526# Network device support 617# Network device support
@@ -532,6 +623,11 @@ CONFIG_NETDEVICES=y
532CONFIG_TUN=m 623CONFIG_TUN=m
533 624
534# 625#
626# ARCnet devices
627#
628# CONFIG_ARCNET is not set
629
630#
535# PHY device support 631# PHY device support
536# 632#
537# CONFIG_PHYLIB is not set 633# CONFIG_PHYLIB is not set
@@ -541,20 +637,73 @@ CONFIG_TUN=m
541# 637#
542CONFIG_NET_ETHERNET=y 638CONFIG_NET_ETHERNET=y
543CONFIG_MII=y 639CONFIG_MII=y
640# CONFIG_HAPPYMEAL is not set
641# CONFIG_SUNGEM is not set
642# CONFIG_CASSINI is not set
643# CONFIG_NET_VENDOR_3COM is not set
544# CONFIG_DM9000 is not set 644# CONFIG_DM9000 is not set
545# CONFIG_SGISEEQ is not set 645
646#
647# Tulip family network device support
648#
649# CONFIG_NET_TULIP is not set
650# CONFIG_HP100 is not set
651CONFIG_NET_PCI=y
652# CONFIG_PCNET32 is not set
653# CONFIG_AMD8111_ETH is not set
654# CONFIG_ADAPTEC_STARFIRE is not set
655# CONFIG_B44 is not set
656# CONFIG_FORCEDETH is not set
657# CONFIG_DGRS is not set
658# CONFIG_EEPRO100 is not set
659# CONFIG_E100 is not set
660# CONFIG_FEALNX is not set
661CONFIG_NATSEMI=y
662# CONFIG_NE2K_PCI is not set
663# CONFIG_8139CP is not set
664CONFIG_8139TOO=y
665# CONFIG_8139TOO_PIO is not set
666# CONFIG_8139TOO_TUNE_TWISTER is not set
667# CONFIG_8139TOO_8129 is not set
668# CONFIG_8139_OLD_RX_RESET is not set
669# CONFIG_SIS900 is not set
670# CONFIG_EPIC100 is not set
671# CONFIG_SUNDANCE is not set
672# CONFIG_TLAN is not set
673# CONFIG_VIA_RHINE is not set
674# CONFIG_LAN_SAA9730 is not set
546 675
547# 676#
548# Ethernet (1000 Mbit) 677# Ethernet (1000 Mbit)
549# 678#
679# CONFIG_ACENIC is not set
680# CONFIG_DL2K is not set
681# CONFIG_E1000 is not set
682# CONFIG_NS83820 is not set
683# CONFIG_HAMACHI is not set
684# CONFIG_YELLOWFIN is not set
685# CONFIG_R8169 is not set
686# CONFIG_SIS190 is not set
687# CONFIG_SKGE is not set
688# CONFIG_SKY2 is not set
689# CONFIG_SK98LIN is not set
690# CONFIG_VIA_VELOCITY is not set
691# CONFIG_TIGON3 is not set
692# CONFIG_BNX2 is not set
693# CONFIG_QLA3XXX is not set
550 694
551# 695#
552# Ethernet (10000 Mbit) 696# Ethernet (10000 Mbit)
553# 697#
698# CONFIG_CHELSIO_T1 is not set
699# CONFIG_IXGB is not set
700# CONFIG_S2IO is not set
701# CONFIG_MYRI10GE is not set
554 702
555# 703#
556# Token Ring devices 704# Token Ring devices
557# 705#
706# CONFIG_TR is not set
558 707
559# 708#
560# Wireless LAN (non-hamradio) 709# Wireless LAN (non-hamradio)
@@ -565,6 +714,8 @@ CONFIG_MII=y
565# Wan interfaces 714# Wan interfaces
566# 715#
567# CONFIG_WAN is not set 716# CONFIG_WAN is not set
717# CONFIG_FDDI is not set
718# CONFIG_HIPPI is not set
568CONFIG_PPP=m 719CONFIG_PPP=m
569# CONFIG_PPP_MULTILINK is not set 720# CONFIG_PPP_MULTILINK is not set
570# CONFIG_PPP_FILTER is not set 721# CONFIG_PPP_FILTER is not set
@@ -575,6 +726,8 @@ CONFIG_PPP_DEFLATE=m
575CONFIG_PPP_MPPE=m 726CONFIG_PPP_MPPE=m
576# CONFIG_PPPOE is not set 727# CONFIG_PPPOE is not set
577# CONFIG_SLIP is not set 728# CONFIG_SLIP is not set
729CONFIG_SLHC=m
730# CONFIG_NET_FC is not set
578# CONFIG_SHAPER is not set 731# CONFIG_SHAPER is not set
579# CONFIG_NETCONSOLE is not set 732# CONFIG_NETCONSOLE is not set
580# CONFIG_NETPOLL is not set 733# CONFIG_NETPOLL is not set
@@ -594,6 +747,7 @@ CONFIG_PPP_MPPE=m
594# Input device support 747# Input device support
595# 748#
596CONFIG_INPUT=y 749CONFIG_INPUT=y
750# CONFIG_INPUT_FF_MEMLESS is not set
597 751
598# 752#
599# Userland interfaces 753# Userland interfaces
@@ -616,6 +770,7 @@ CONFIG_KEYBOARD_ATKBD=y
616# CONFIG_KEYBOARD_LKKBD is not set 770# CONFIG_KEYBOARD_LKKBD is not set
617# CONFIG_KEYBOARD_XTKBD is not set 771# CONFIG_KEYBOARD_XTKBD is not set
618# CONFIG_KEYBOARD_NEWTON is not set 772# CONFIG_KEYBOARD_NEWTON is not set
773# CONFIG_KEYBOARD_STOWAWAY is not set
619CONFIG_INPUT_MOUSE=y 774CONFIG_INPUT_MOUSE=y
620CONFIG_MOUSE_PS2=y 775CONFIG_MOUSE_PS2=y
621# CONFIG_MOUSE_SERIAL is not set 776# CONFIG_MOUSE_SERIAL is not set
@@ -630,6 +785,7 @@ CONFIG_MOUSE_PS2=y
630CONFIG_SERIO=y 785CONFIG_SERIO=y
631CONFIG_SERIO_I8042=y 786CONFIG_SERIO_I8042=y
632CONFIG_SERIO_SERPORT=y 787CONFIG_SERIO_SERPORT=y
788# CONFIG_SERIO_PCIPS2 is not set
633CONFIG_SERIO_LIBPS2=y 789CONFIG_SERIO_LIBPS2=y
634# CONFIG_SERIO_RAW is not set 790# CONFIG_SERIO_RAW is not set
635# CONFIG_GAMEPORT is not set 791# CONFIG_GAMEPORT is not set
@@ -640,7 +796,7 @@ CONFIG_SERIO_LIBPS2=y
640CONFIG_VT=y 796CONFIG_VT=y
641# CONFIG_VT_CONSOLE is not set 797# CONFIG_VT_CONSOLE is not set
642CONFIG_HW_CONSOLE=y 798CONFIG_HW_CONSOLE=y
643CONFIG_VT_HW_CONSOLE_BINDING=y 799# CONFIG_VT_HW_CONSOLE_BINDING is not set
644CONFIG_SERIAL_NONSTANDARD=y 800CONFIG_SERIAL_NONSTANDARD=y
645# CONFIG_COMPUTONE is not set 801# CONFIG_COMPUTONE is not set
646# CONFIG_ROCKETPORT is not set 802# CONFIG_ROCKETPORT is not set
@@ -650,6 +806,7 @@ CONFIG_SERIAL_NONSTANDARD=y
650# CONFIG_MOXA_SMARTIO is not set 806# CONFIG_MOXA_SMARTIO is not set
651# CONFIG_ISI is not set 807# CONFIG_ISI is not set
652# CONFIG_SYNCLINKMP is not set 808# CONFIG_SYNCLINKMP is not set
809# CONFIG_SYNCLINK_GT is not set
653# CONFIG_N_HDLC is not set 810# CONFIG_N_HDLC is not set
654# CONFIG_RISCOM8 is not set 811# CONFIG_RISCOM8 is not set
655# CONFIG_SPECIALIX is not set 812# CONFIG_SPECIALIX is not set
@@ -665,7 +822,8 @@ CONFIG_SERIAL_NONSTANDARD=y
665# 822#
666# Non-8250 serial port support 823# Non-8250 serial port support
667# 824#
668# CONFIG_SERIAL_IP22_ZILOG is not set 825# CONFIG_SERIAL_IP3106 is not set
826# CONFIG_SERIAL_JSM is not set
669CONFIG_UNIX98_PTYS=y 827CONFIG_UNIX98_PTYS=y
670CONFIG_LEGACY_PTYS=y 828CONFIG_LEGACY_PTYS=y
671CONFIG_LEGACY_PTY_COUNT=256 829CONFIG_LEGACY_PTY_COUNT=256
@@ -679,16 +837,17 @@ CONFIG_LEGACY_PTY_COUNT=256
679# Watchdog Cards 837# Watchdog Cards
680# 838#
681# CONFIG_WATCHDOG is not set 839# CONFIG_WATCHDOG is not set
682# CONFIG_HW_RANDOM is not set 840CONFIG_HW_RANDOM=y
683# CONFIG_RTC is not set 841# CONFIG_RTC is not set
684# CONFIG_SGI_DS1286 is not set
685# CONFIG_GEN_RTC is not set 842# CONFIG_GEN_RTC is not set
686# CONFIG_DTLK is not set 843# CONFIG_DTLK is not set
687# CONFIG_R3964 is not set 844# CONFIG_R3964 is not set
845# CONFIG_APPLICOM is not set
688 846
689# 847#
690# Ftape, the floppy tape device driver 848# Ftape, the floppy tape device driver
691# 849#
850# CONFIG_DRM is not set
692# CONFIG_RAW_DRIVER is not set 851# CONFIG_RAW_DRIVER is not set
693 852
694# 853#
@@ -709,14 +868,30 @@ CONFIG_I2C_CHARDEV=m
709CONFIG_I2C_ALGOBIT=m 868CONFIG_I2C_ALGOBIT=m
710# CONFIG_I2C_ALGOPCF is not set 869# CONFIG_I2C_ALGOPCF is not set
711# CONFIG_I2C_ALGOPCA is not set 870# CONFIG_I2C_ALGOPCA is not set
712# CONFIG_I2C_ALGO_SGI is not set
713 871
714# 872#
715# I2C Hardware Bus support 873# I2C Hardware Bus support
716# 874#
875# CONFIG_I2C_ALI1535 is not set
876# CONFIG_I2C_ALI1563 is not set
877# CONFIG_I2C_ALI15X3 is not set
878# CONFIG_I2C_AMD756 is not set
879# CONFIG_I2C_AMD8111 is not set
880# CONFIG_I2C_I801 is not set
881# CONFIG_I2C_I810 is not set
882# CONFIG_I2C_PIIX4 is not set
883# CONFIG_I2C_NFORCE2 is not set
717# CONFIG_I2C_OCORES is not set 884# CONFIG_I2C_OCORES is not set
718# CONFIG_I2C_PARPORT_LIGHT is not set 885# CONFIG_I2C_PARPORT_LIGHT is not set
886# CONFIG_I2C_PROSAVAGE is not set
887# CONFIG_I2C_SAVAGE4 is not set
888# CONFIG_I2C_SIS5595 is not set
889# CONFIG_I2C_SIS630 is not set
890# CONFIG_I2C_SIS96X is not set
719# CONFIG_I2C_STUB is not set 891# CONFIG_I2C_STUB is not set
892# CONFIG_I2C_VIA is not set
893# CONFIG_I2C_VIAPRO is not set
894# CONFIG_I2C_VOODOO3 is not set
720# CONFIG_I2C_PCA_ISA is not set 895# CONFIG_I2C_PCA_ISA is not set
721 896
722# 897#
@@ -776,9 +951,13 @@ CONFIG_HWMON=y
776# CONFIG_SENSORS_LM92 is not set 951# CONFIG_SENSORS_LM92 is not set
777# CONFIG_SENSORS_MAX1619 is not set 952# CONFIG_SENSORS_MAX1619 is not set
778# CONFIG_SENSORS_PC87360 is not set 953# CONFIG_SENSORS_PC87360 is not set
954# CONFIG_SENSORS_SIS5595 is not set
779# CONFIG_SENSORS_SMSC47M1 is not set 955# CONFIG_SENSORS_SMSC47M1 is not set
780# CONFIG_SENSORS_SMSC47M192 is not set 956# CONFIG_SENSORS_SMSC47M192 is not set
781# CONFIG_SENSORS_SMSC47B397 is not set 957# CONFIG_SENSORS_SMSC47B397 is not set
958# CONFIG_SENSORS_VIA686A is not set
959# CONFIG_SENSORS_VT1211 is not set
960# CONFIG_SENSORS_VT8231 is not set
782# CONFIG_SENSORS_W83781D is not set 961# CONFIG_SENSORS_W83781D is not set
783# CONFIG_SENSORS_W83791D is not set 962# CONFIG_SENSORS_W83791D is not set
784# CONFIG_SENSORS_W83792D is not set 963# CONFIG_SENSORS_W83792D is not set
@@ -790,23 +969,25 @@ CONFIG_HWMON=y
790# 969#
791# Misc devices 970# Misc devices
792# 971#
972# CONFIG_TIFM_CORE is not set
793 973
794# 974#
795# Multimedia devices 975# Multimedia devices
796# 976#
797# CONFIG_VIDEO_DEV is not set 977# CONFIG_VIDEO_DEV is not set
798CONFIG_VIDEO_V4L2=y
799 978
800# 979#
801# Digital Video Broadcasting Devices 980# Digital Video Broadcasting Devices
802# 981#
803# CONFIG_DVB is not set 982# CONFIG_DVB is not set
983# CONFIG_USB_DABUSB is not set
804 984
805# 985#
806# Graphics support 986# Graphics support
807# 987#
808# CONFIG_FIRMWARE_EDID is not set 988CONFIG_FIRMWARE_EDID=y
809CONFIG_FB=y 989CONFIG_FB=y
990# CONFIG_FB_DDC is not set
810# CONFIG_FB_CFB_FILLRECT is not set 991# CONFIG_FB_CFB_FILLRECT is not set
811# CONFIG_FB_CFB_COPYAREA is not set 992# CONFIG_FB_CFB_COPYAREA is not set
812# CONFIG_FB_CFB_IMAGEBLIT is not set 993# CONFIG_FB_CFB_IMAGEBLIT is not set
@@ -814,14 +995,32 @@ CONFIG_FB=y
814# CONFIG_FB_BACKLIGHT is not set 995# CONFIG_FB_BACKLIGHT is not set
815# CONFIG_FB_MODE_HELPERS is not set 996# CONFIG_FB_MODE_HELPERS is not set
816# CONFIG_FB_TILEBLITTING is not set 997# CONFIG_FB_TILEBLITTING is not set
998# CONFIG_FB_CIRRUS is not set
999# CONFIG_FB_PM2 is not set
1000# CONFIG_FB_CYBER2000 is not set
1001# CONFIG_FB_ASILIANT is not set
1002# CONFIG_FB_IMSTT is not set
817# CONFIG_FB_S1D13XXX is not set 1003# CONFIG_FB_S1D13XXX is not set
1004# CONFIG_FB_NVIDIA is not set
1005# CONFIG_FB_RIVA is not set
1006# CONFIG_FB_MATROX is not set
1007# CONFIG_FB_RADEON is not set
1008# CONFIG_FB_ATY128 is not set
1009# CONFIG_FB_ATY is not set
1010# CONFIG_FB_SAVAGE is not set
1011# CONFIG_FB_SIS is not set
1012# CONFIG_FB_NEOMAGIC is not set
1013# CONFIG_FB_KYRO is not set
1014# CONFIG_FB_3DFX is not set
1015# CONFIG_FB_VOODOO1 is not set
1016# CONFIG_FB_SMIVGX is not set
1017# CONFIG_FB_TRIDENT is not set
818# CONFIG_FB_VIRTUAL is not set 1018# CONFIG_FB_VIRTUAL is not set
819 1019
820# 1020#
821# Console display driver support 1021# Console display driver support
822# 1022#
823# CONFIG_VGA_CONSOLE is not set 1023# CONFIG_VGA_CONSOLE is not set
824# CONFIG_SGI_NEWPORT_CONSOLE is not set
825CONFIG_DUMMY_CONSOLE=y 1024CONFIG_DUMMY_CONSOLE=y
826# CONFIG_FRAMEBUFFER_CONSOLE is not set 1025# CONFIG_FRAMEBUFFER_CONSOLE is not set
827 1026
@@ -839,15 +1038,129 @@ CONFIG_DUMMY_CONSOLE=y
839# 1038#
840# USB support 1039# USB support
841# 1040#
842# CONFIG_USB_ARCH_HAS_HCD is not set 1041CONFIG_USB_ARCH_HAS_HCD=y
843# CONFIG_USB_ARCH_HAS_OHCI is not set 1042CONFIG_USB_ARCH_HAS_OHCI=y
844# CONFIG_USB_ARCH_HAS_EHCI is not set 1043CONFIG_USB_ARCH_HAS_EHCI=y
1044CONFIG_USB=y
1045# CONFIG_USB_DEBUG is not set
1046
1047#
1048# Miscellaneous USB options
1049#
1050CONFIG_USB_DEVICEFS=y
1051# CONFIG_USB_BANDWIDTH is not set
1052# CONFIG_USB_DYNAMIC_MINORS is not set
1053# CONFIG_USB_OTG is not set
1054
1055#
1056# USB Host Controller Drivers
1057#
1058# CONFIG_USB_EHCI_HCD is not set
1059# CONFIG_USB_ISP116X_HCD is not set
1060# CONFIG_USB_OHCI_HCD is not set
1061# CONFIG_USB_UHCI_HCD is not set
1062# CONFIG_USB_SL811_HCD is not set
1063
1064#
1065# USB Device Class drivers
1066#
1067# CONFIG_USB_ACM is not set
1068# CONFIG_USB_PRINTER is not set
845 1069
846# 1070#
847# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1071# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
848# 1072#
849 1073
850# 1074#
1075# may also be needed; see USB_STORAGE Help for more information
1076#
1077CONFIG_USB_STORAGE=y
1078# CONFIG_USB_STORAGE_DEBUG is not set
1079# CONFIG_USB_STORAGE_DATAFAB is not set
1080# CONFIG_USB_STORAGE_FREECOM is not set
1081# CONFIG_USB_STORAGE_ISD200 is not set
1082# CONFIG_USB_STORAGE_DPCM is not set
1083# CONFIG_USB_STORAGE_USBAT is not set
1084# CONFIG_USB_STORAGE_SDDR09 is not set
1085# CONFIG_USB_STORAGE_SDDR55 is not set
1086# CONFIG_USB_STORAGE_JUMPSHOT is not set
1087# CONFIG_USB_STORAGE_ALAUDA is not set
1088# CONFIG_USB_STORAGE_ONETOUCH is not set
1089# CONFIG_USB_STORAGE_KARMA is not set
1090# CONFIG_USB_LIBUSUAL is not set
1091
1092#
1093# USB Input Devices
1094#
1095CONFIG_USB_HID=y
1096CONFIG_USB_HIDINPUT=y
1097# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1098# CONFIG_HID_FF is not set
1099CONFIG_USB_HIDDEV=y
1100# CONFIG_USB_AIPTEK is not set
1101# CONFIG_USB_WACOM is not set
1102# CONFIG_USB_ACECAD is not set
1103# CONFIG_USB_KBTAB is not set
1104# CONFIG_USB_POWERMATE is not set
1105# CONFIG_USB_TOUCHSCREEN is not set
1106# CONFIG_USB_YEALINK is not set
1107# CONFIG_USB_XPAD is not set
1108# CONFIG_USB_ATI_REMOTE is not set
1109# CONFIG_USB_ATI_REMOTE2 is not set
1110# CONFIG_USB_KEYSPAN_REMOTE is not set
1111# CONFIG_USB_APPLETOUCH is not set
1112# CONFIG_USB_TRANCEVIBRATOR is not set
1113
1114#
1115# USB Imaging devices
1116#
1117# CONFIG_USB_MDC800 is not set
1118# CONFIG_USB_MICROTEK is not set
1119
1120#
1121# USB Network Adapters
1122#
1123# CONFIG_USB_CATC is not set
1124# CONFIG_USB_KAWETH is not set
1125# CONFIG_USB_PEGASUS is not set
1126# CONFIG_USB_RTL8150 is not set
1127# CONFIG_USB_USBNET is not set
1128CONFIG_USB_MON=y
1129
1130#
1131# USB port drivers
1132#
1133
1134#
1135# USB Serial Converter support
1136#
1137# CONFIG_USB_SERIAL is not set
1138
1139#
1140# USB Miscellaneous drivers
1141#
1142# CONFIG_USB_EMI62 is not set
1143# CONFIG_USB_EMI26 is not set
1144# CONFIG_USB_ADUTUX is not set
1145# CONFIG_USB_AUERSWALD is not set
1146# CONFIG_USB_RIO500 is not set
1147# CONFIG_USB_LEGOTOWER is not set
1148# CONFIG_USB_LCD is not set
1149# CONFIG_USB_LED is not set
1150# CONFIG_USB_CYPRESS_CY7C63 is not set
1151# CONFIG_USB_CYTHERM is not set
1152# CONFIG_USB_PHIDGET is not set
1153# CONFIG_USB_IDMOUSE is not set
1154# CONFIG_USB_FTDI_ELAN is not set
1155# CONFIG_USB_APPLEDISPLAY is not set
1156# CONFIG_USB_LD is not set
1157# CONFIG_USB_TEST is not set
1158
1159#
1160# USB DSL modem support
1161#
1162
1163#
851# USB Gadget Support 1164# USB Gadget Support
852# 1165#
853# CONFIG_USB_GADGET is not set 1166# CONFIG_USB_GADGET is not set
@@ -873,6 +1186,7 @@ CONFIG_DUMMY_CONSOLE=y
873# 1186#
874# InfiniBand support 1187# InfiniBand support
875# 1188#
1189# CONFIG_INFINIBAND is not set
876 1190
877# 1191#
878# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 1192# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
@@ -906,6 +1220,7 @@ CONFIG_EXT3_FS=y
906CONFIG_EXT3_FS_XATTR=y 1220CONFIG_EXT3_FS_XATTR=y
907# CONFIG_EXT3_FS_POSIX_ACL is not set 1221# CONFIG_EXT3_FS_POSIX_ACL is not set
908# CONFIG_EXT3_FS_SECURITY is not set 1222# CONFIG_EXT3_FS_SECURITY is not set
1223# CONFIG_EXT4DEV_FS is not set
909CONFIG_JBD=y 1224CONFIG_JBD=y
910# CONFIG_JBD_DEBUG is not set 1225# CONFIG_JBD_DEBUG is not set
911CONFIG_FS_MBCACHE=y 1226CONFIG_FS_MBCACHE=y
@@ -917,6 +1232,7 @@ CONFIG_XFS_FS=m
917# CONFIG_XFS_SECURITY is not set 1232# CONFIG_XFS_SECURITY is not set
918# CONFIG_XFS_POSIX_ACL is not set 1233# CONFIG_XFS_POSIX_ACL is not set
919# CONFIG_XFS_RT is not set 1234# CONFIG_XFS_RT is not set
1235# CONFIG_GFS2_FS is not set
920# CONFIG_OCFS2_FS is not set 1236# CONFIG_OCFS2_FS is not set
921# CONFIG_MINIX_FS is not set 1237# CONFIG_MINIX_FS is not set
922# CONFIG_ROMFS_FS is not set 1238# CONFIG_ROMFS_FS is not set
@@ -949,8 +1265,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
949# 1265#
950CONFIG_PROC_FS=y 1266CONFIG_PROC_FS=y
951# CONFIG_PROC_KCORE is not set 1267# CONFIG_PROC_KCORE is not set
1268CONFIG_PROC_SYSCTL=y
952CONFIG_SYSFS=y 1269CONFIG_SYSFS=y
953CONFIG_TMPFS=y 1270CONFIG_TMPFS=y
1271# CONFIG_TMPFS_POSIX_ACL is not set
954# CONFIG_HUGETLB_PAGE is not set 1272# CONFIG_HUGETLB_PAGE is not set
955CONFIG_RAMFS=y 1273CONFIG_RAMFS=y
956# CONFIG_CONFIGFS_FS is not set 1274# CONFIG_CONFIGFS_FS is not set
@@ -994,7 +1312,6 @@ CONFIG_SUNRPC=y
994CONFIG_SMB_FS=m 1312CONFIG_SMB_FS=m
995# CONFIG_SMB_NLS_DEFAULT is not set 1313# CONFIG_SMB_NLS_DEFAULT is not set
996# CONFIG_CIFS is not set 1314# CONFIG_CIFS is not set
997# CONFIG_CIFS_DEBUG2 is not set
998# CONFIG_NCP_FS is not set 1315# CONFIG_NCP_FS is not set
999# CONFIG_CODA_FS is not set 1316# CONFIG_CODA_FS is not set
1000# CONFIG_AFS_FS is not set 1317# CONFIG_AFS_FS is not set
@@ -1005,7 +1322,6 @@ CONFIG_SMB_FS=m
1005# 1322#
1006# CONFIG_PARTITION_ADVANCED is not set 1323# CONFIG_PARTITION_ADVANCED is not set
1007CONFIG_MSDOS_PARTITION=y 1324CONFIG_MSDOS_PARTITION=y
1008CONFIG_SGI_PARTITION=y
1009 1325
1010# 1326#
1011# Native Language Support 1327# Native Language Support
@@ -1061,11 +1377,13 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1061# 1377#
1062CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1378CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1063# CONFIG_PRINTK_TIME is not set 1379# CONFIG_PRINTK_TIME is not set
1380CONFIG_ENABLE_MUST_CHECK=y
1064# CONFIG_MAGIC_SYSRQ is not set 1381# CONFIG_MAGIC_SYSRQ is not set
1065# CONFIG_UNUSED_SYMBOLS is not set 1382# CONFIG_UNUSED_SYMBOLS is not set
1066# CONFIG_DEBUG_KERNEL is not set 1383# CONFIG_DEBUG_KERNEL is not set
1067CONFIG_LOG_BUF_SHIFT=14 1384CONFIG_LOG_BUF_SHIFT=14
1068# CONFIG_DEBUG_FS is not set 1385# CONFIG_DEBUG_FS is not set
1386# CONFIG_HEADERS_CHECK is not set
1069CONFIG_CROSSCOMPILE=y 1387CONFIG_CROSSCOMPILE=y
1070CONFIG_CMDLINE="" 1388CONFIG_CMDLINE=""
1071 1389
@@ -1079,6 +1397,9 @@ CONFIG_CMDLINE=""
1079# Cryptographic options 1397# Cryptographic options
1080# 1398#
1081CONFIG_CRYPTO=y 1399CONFIG_CRYPTO=y
1400CONFIG_CRYPTO_ALGAPI=m
1401CONFIG_CRYPTO_BLKCIPHER=m
1402CONFIG_CRYPTO_MANAGER=m
1082# CONFIG_CRYPTO_HMAC is not set 1403# CONFIG_CRYPTO_HMAC is not set
1083# CONFIG_CRYPTO_NULL is not set 1404# CONFIG_CRYPTO_NULL is not set
1084# CONFIG_CRYPTO_MD4 is not set 1405# CONFIG_CRYPTO_MD4 is not set
@@ -1088,6 +1409,8 @@ CONFIG_CRYPTO_SHA1=m
1088# CONFIG_CRYPTO_SHA512 is not set 1409# CONFIG_CRYPTO_SHA512 is not set
1089# CONFIG_CRYPTO_WP512 is not set 1410# CONFIG_CRYPTO_WP512 is not set
1090# CONFIG_CRYPTO_TGR192 is not set 1411# CONFIG_CRYPTO_TGR192 is not set
1412CONFIG_CRYPTO_ECB=m
1413CONFIG_CRYPTO_CBC=m
1091# CONFIG_CRYPTO_DES is not set 1414# CONFIG_CRYPTO_DES is not set
1092# CONFIG_CRYPTO_BLOWFISH is not set 1415# CONFIG_CRYPTO_BLOWFISH is not set
1093# CONFIG_CRYPTO_TWOFISH is not set 1416# CONFIG_CRYPTO_TWOFISH is not set
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index ad7271b3f266..f7e8194809a1 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.19-rc2
4# Thu Jul 6 10:04:21 2006 4# Wed Oct 18 12:57:11 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,8 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_IVR is not set
29# CONFIG_MIPS_ITE8172 is not set
30# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
31# CONFIG_LASAT is not set 29# CONFIG_LASAT is not set
32# CONFIG_MIPS_ATLAS is not set 30# CONFIG_MIPS_ATLAS is not set
@@ -72,11 +70,11 @@ CONFIG_TANBAC_TB0287=y
72# CONFIG_VICTOR_MPC30X is not set 70# CONFIG_VICTOR_MPC30X is not set
73# CONFIG_ZAO_CAPCELLA is not set 71# CONFIG_ZAO_CAPCELLA is not set
74CONFIG_PCI_VR41XX=y 72CONFIG_PCI_VR41XX=y
75# CONFIG_VRC4173 is not set
76CONFIG_RWSEM_GENERIC_SPINLOCK=y 73CONFIG_RWSEM_GENERIC_SPINLOCK=y
77CONFIG_GENERIC_FIND_NEXT_BIT=y 74CONFIG_GENERIC_FIND_NEXT_BIT=y
78CONFIG_GENERIC_HWEIGHT=y 75CONFIG_GENERIC_HWEIGHT=y
79CONFIG_GENERIC_CALIBRATE_DELAY=y 76CONFIG_GENERIC_CALIBRATE_DELAY=y
77CONFIG_GENERIC_TIME=y
80CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 78CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
81CONFIG_DMA_NONCOHERENT=y 79CONFIG_DMA_NONCOHERENT=y
82CONFIG_DMA_NEED_PCI_MAP_STATE=y 80CONFIG_DMA_NEED_PCI_MAP_STATE=y
@@ -123,8 +121,8 @@ CONFIG_PAGE_SIZE_4KB=y
123# CONFIG_PAGE_SIZE_16KB is not set 121# CONFIG_PAGE_SIZE_16KB is not set
124# CONFIG_PAGE_SIZE_64KB is not set 122# CONFIG_PAGE_SIZE_64KB is not set
125CONFIG_MIPS_MT_DISABLED=y 123CONFIG_MIPS_MT_DISABLED=y
126# CONFIG_MIPS_MT_SMTC is not set
127# CONFIG_MIPS_MT_SMP is not set 124# CONFIG_MIPS_MT_SMP is not set
125# CONFIG_MIPS_MT_SMTC is not set
128# CONFIG_MIPS_VPE_LOADER is not set 126# CONFIG_MIPS_VPE_LOADER is not set
129CONFIG_CPU_HAS_SYNC=y 127CONFIG_CPU_HAS_SYNC=y
130CONFIG_GENERIC_HARDIRQS=y 128CONFIG_GENERIC_HARDIRQS=y
@@ -169,15 +167,19 @@ CONFIG_LOCALVERSION=""
169CONFIG_LOCALVERSION_AUTO=y 167CONFIG_LOCALVERSION_AUTO=y
170CONFIG_SWAP=y 168CONFIG_SWAP=y
171CONFIG_SYSVIPC=y 169CONFIG_SYSVIPC=y
170# CONFIG_IPC_NS is not set
172# CONFIG_POSIX_MQUEUE is not set 171# CONFIG_POSIX_MQUEUE is not set
173# CONFIG_BSD_PROCESS_ACCT is not set 172# CONFIG_BSD_PROCESS_ACCT is not set
174CONFIG_SYSCTL=y 173# CONFIG_TASKSTATS is not set
174# CONFIG_UTS_NS is not set
175# CONFIG_AUDIT is not set 175# CONFIG_AUDIT is not set
176# CONFIG_IKCONFIG is not set 176# CONFIG_IKCONFIG is not set
177# CONFIG_RELAY is not set 177# CONFIG_RELAY is not set
178CONFIG_INITRAMFS_SOURCE="" 178CONFIG_INITRAMFS_SOURCE=""
179# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 179# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
180CONFIG_SYSCTL=y
180CONFIG_EMBEDDED=y 181CONFIG_EMBEDDED=y
182# CONFIG_SYSCTL_SYSCALL is not set
181CONFIG_KALLSYMS=y 183CONFIG_KALLSYMS=y
182# CONFIG_KALLSYMS_EXTRA_PASS is not set 184# CONFIG_KALLSYMS_EXTRA_PASS is not set
183# CONFIG_HOTPLUG is not set 185# CONFIG_HOTPLUG is not set
@@ -185,12 +187,12 @@ CONFIG_PRINTK=y
185CONFIG_BUG=y 187CONFIG_BUG=y
186CONFIG_ELF_CORE=y 188CONFIG_ELF_CORE=y
187CONFIG_BASE_FULL=y 189CONFIG_BASE_FULL=y
188CONFIG_RT_MUTEXES=y
189CONFIG_FUTEX=y 190CONFIG_FUTEX=y
190CONFIG_EPOLL=y 191CONFIG_EPOLL=y
191CONFIG_SHMEM=y 192CONFIG_SHMEM=y
192CONFIG_SLAB=y 193CONFIG_SLAB=y
193CONFIG_VM_EVENT_COUNTERS=y 194CONFIG_VM_EVENT_COUNTERS=y
195CONFIG_RT_MUTEXES=y
194# CONFIG_TINY_SHMEM is not set 196# CONFIG_TINY_SHMEM is not set
195CONFIG_BASE_SMALL=0 197CONFIG_BASE_SMALL=0
196# CONFIG_SLOB is not set 198# CONFIG_SLOB is not set
@@ -208,6 +210,7 @@ CONFIG_KMOD=y
208# 210#
209# Block layer 211# Block layer
210# 212#
213CONFIG_BLOCK=y
211# CONFIG_LBD is not set 214# CONFIG_LBD is not set
212# CONFIG_BLK_DEV_IO_TRACE is not set 215# CONFIG_BLK_DEV_IO_TRACE is not set
213# CONFIG_LSF is not set 216# CONFIG_LSF is not set
@@ -230,17 +233,16 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
230# 233#
231CONFIG_HW_HAS_PCI=y 234CONFIG_HW_HAS_PCI=y
232CONFIG_PCI=y 235CONFIG_PCI=y
236# CONFIG_PCI_MULTITHREAD_PROBE is not set
233CONFIG_MMU=y 237CONFIG_MMU=y
234 238
235# 239#
236# PCCARD (PCMCIA/CardBus) support 240# PCCARD (PCMCIA/CardBus) support
237# 241#
238# CONFIG_PCCARD is not set
239 242
240# 243#
241# PCI Hotplug Support 244# PCI Hotplug Support
242# 245#
243# CONFIG_HOTPLUG_PCI is not set
244 246
245# 247#
246# Executable file formats 248# Executable file formats
@@ -263,6 +265,7 @@ CONFIG_PACKET=y
263CONFIG_UNIX=y 265CONFIG_UNIX=y
264CONFIG_XFRM=y 266CONFIG_XFRM=y
265# CONFIG_XFRM_USER is not set 267# CONFIG_XFRM_USER is not set
268# CONFIG_XFRM_SUB_POLICY is not set
266# CONFIG_NET_KEY is not set 269# CONFIG_NET_KEY is not set
267CONFIG_INET=y 270CONFIG_INET=y
268CONFIG_IP_MULTICAST=y 271CONFIG_IP_MULTICAST=y
@@ -291,13 +294,10 @@ CONFIG_SYN_COOKIES=y
291CONFIG_INET_TUNNEL=m 294CONFIG_INET_TUNNEL=m
292CONFIG_INET_XFRM_MODE_TRANSPORT=m 295CONFIG_INET_XFRM_MODE_TRANSPORT=m
293CONFIG_INET_XFRM_MODE_TUNNEL=m 296CONFIG_INET_XFRM_MODE_TUNNEL=m
297CONFIG_INET_XFRM_MODE_BEET=y
294CONFIG_INET_DIAG=y 298CONFIG_INET_DIAG=y
295CONFIG_INET_TCP_DIAG=y 299CONFIG_INET_TCP_DIAG=y
296CONFIG_TCP_CONG_ADVANCED=y 300CONFIG_TCP_CONG_ADVANCED=y
297
298#
299# TCP congestion control
300#
301CONFIG_TCP_CONG_BIC=y 301CONFIG_TCP_CONG_BIC=y
302CONFIG_TCP_CONG_CUBIC=m 302CONFIG_TCP_CONG_CUBIC=m
303CONFIG_TCP_CONG_WESTWOOD=m 303CONFIG_TCP_CONG_WESTWOOD=m
@@ -308,7 +308,13 @@ CONFIG_TCP_CONG_HTCP=m
308# CONFIG_TCP_CONG_SCALABLE is not set 308# CONFIG_TCP_CONG_SCALABLE is not set
309# CONFIG_TCP_CONG_LP is not set 309# CONFIG_TCP_CONG_LP is not set
310# CONFIG_TCP_CONG_VENO is not set 310# CONFIG_TCP_CONG_VENO is not set
311# CONFIG_TCP_CONG_COMPOUND is not set 311CONFIG_DEFAULT_BIC=y
312# CONFIG_DEFAULT_CUBIC is not set
313# CONFIG_DEFAULT_HTCP is not set
314# CONFIG_DEFAULT_VEGAS is not set
315# CONFIG_DEFAULT_WESTWOOD is not set
316# CONFIG_DEFAULT_RENO is not set
317CONFIG_DEFAULT_TCP_CONG="bic"
312# CONFIG_IPV6 is not set 318# CONFIG_IPV6 is not set
313# CONFIG_INET6_XFRM_TUNNEL is not set 319# CONFIG_INET6_XFRM_TUNNEL is not set
314# CONFIG_INET6_TUNNEL is not set 320# CONFIG_INET6_TUNNEL is not set
@@ -338,7 +344,6 @@ CONFIG_NETWORK_SECMARK=y
338# CONFIG_ATALK is not set 344# CONFIG_ATALK is not set
339# CONFIG_X25 is not set 345# CONFIG_X25 is not set
340# CONFIG_LAPB is not set 346# CONFIG_LAPB is not set
341# CONFIG_NET_DIVERT is not set
342# CONFIG_ECONET is not set 347# CONFIG_ECONET is not set
343# CONFIG_WAN_ROUTER is not set 348# CONFIG_WAN_ROUTER is not set
344 349
@@ -355,6 +360,7 @@ CONFIG_NETWORK_SECMARK=y
355# CONFIG_IRDA is not set 360# CONFIG_IRDA is not set
356# CONFIG_BT is not set 361# CONFIG_BT is not set
357# CONFIG_IEEE80211 is not set 362# CONFIG_IEEE80211 is not set
363CONFIG_FIB_RULES=y
358 364
359# 365#
360# Device Drivers 366# Device Drivers
@@ -365,7 +371,6 @@ CONFIG_NETWORK_SECMARK=y
365# 371#
366CONFIG_STANDALONE=y 372CONFIG_STANDALONE=y
367CONFIG_PREVENT_FIRMWARE_BUILD=y 373CONFIG_PREVENT_FIRMWARE_BUILD=y
368# CONFIG_FW_LOADER is not set
369# CONFIG_SYS_HYPERVISOR is not set 374# CONFIG_SYS_HYPERVISOR is not set
370 375
371# 376#
@@ -403,6 +408,7 @@ CONFIG_BLK_DEV_NBD=m
403CONFIG_BLK_DEV_RAM=y 408CONFIG_BLK_DEV_RAM=y
404CONFIG_BLK_DEV_RAM_COUNT=16 409CONFIG_BLK_DEV_RAM_COUNT=16
405CONFIG_BLK_DEV_RAM_SIZE=4096 410CONFIG_BLK_DEV_RAM_SIZE=4096
411CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
406# CONFIG_BLK_DEV_INITRD is not set 412# CONFIG_BLK_DEV_INITRD is not set
407# CONFIG_CDROM_PKTCDVD is not set 413# CONFIG_CDROM_PKTCDVD is not set
408# CONFIG_ATA_OVER_ETH is not set 414# CONFIG_ATA_OVER_ETH is not set
@@ -410,65 +416,14 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
410# 416#
411# ATA/ATAPI/MFM/RLL support 417# ATA/ATAPI/MFM/RLL support
412# 418#
413CONFIG_IDE=y 419# CONFIG_IDE is not set
414CONFIG_BLK_DEV_IDE=y
415
416#
417# Please see Documentation/ide.txt for help/info on IDE drives
418#
419# CONFIG_BLK_DEV_IDE_SATA is not set
420CONFIG_BLK_DEV_IDEDISK=y
421# CONFIG_IDEDISK_MULTI_MODE is not set
422# CONFIG_BLK_DEV_IDECD is not set
423# CONFIG_BLK_DEV_IDETAPE is not set
424# CONFIG_BLK_DEV_IDEFLOPPY is not set
425# CONFIG_BLK_DEV_IDESCSI is not set
426# CONFIG_IDE_TASK_IOCTL is not set
427
428#
429# IDE chipset support/bugfixes
430#
431CONFIG_IDE_GENERIC=y
432CONFIG_BLK_DEV_IDEPCI=y
433# CONFIG_IDEPCI_SHARE_IRQ is not set
434# CONFIG_BLK_DEV_OFFBOARD is not set
435# CONFIG_BLK_DEV_GENERIC is not set
436# CONFIG_BLK_DEV_OPTI621 is not set
437CONFIG_BLK_DEV_IDEDMA_PCI=y
438# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
439# CONFIG_IDEDMA_PCI_AUTO is not set
440# CONFIG_BLK_DEV_AEC62XX is not set
441# CONFIG_BLK_DEV_ALI15X3 is not set
442# CONFIG_BLK_DEV_AMD74XX is not set
443# CONFIG_BLK_DEV_CMD64X is not set
444# CONFIG_BLK_DEV_TRIFLEX is not set
445# CONFIG_BLK_DEV_CY82C693 is not set
446# CONFIG_BLK_DEV_CS5520 is not set
447# CONFIG_BLK_DEV_CS5530 is not set
448# CONFIG_BLK_DEV_HPT34X is not set
449# CONFIG_BLK_DEV_HPT366 is not set
450# CONFIG_BLK_DEV_SC1200 is not set
451# CONFIG_BLK_DEV_PIIX is not set
452# CONFIG_BLK_DEV_IT821X is not set
453# CONFIG_BLK_DEV_NS87415 is not set
454# CONFIG_BLK_DEV_PDC202XX_OLD is not set
455# CONFIG_BLK_DEV_PDC202XX_NEW is not set
456# CONFIG_BLK_DEV_SVWKS is not set
457CONFIG_BLK_DEV_SIIMAGE=y
458# CONFIG_BLK_DEV_SLC90E66 is not set
459# CONFIG_BLK_DEV_TRM290 is not set
460# CONFIG_BLK_DEV_VIA82CXXX is not set
461# CONFIG_IDE_ARM is not set
462CONFIG_BLK_DEV_IDEDMA=y
463# CONFIG_IDEDMA_IVB is not set
464# CONFIG_IDEDMA_AUTO is not set
465# CONFIG_BLK_DEV_HD is not set
466 420
467# 421#
468# SCSI device support 422# SCSI device support
469# 423#
470# CONFIG_RAID_ATTRS is not set 424# CONFIG_RAID_ATTRS is not set
471CONFIG_SCSI=y 425CONFIG_SCSI=y
426# CONFIG_SCSI_NETLINK is not set
472CONFIG_SCSI_PROC_FS=y 427CONFIG_SCSI_PROC_FS=y
473 428
474# 429#
@@ -489,12 +444,13 @@ CONFIG_BLK_DEV_SD=y
489# CONFIG_SCSI_LOGGING is not set 444# CONFIG_SCSI_LOGGING is not set
490 445
491# 446#
492# SCSI Transport Attributes 447# SCSI Transports
493# 448#
494# CONFIG_SCSI_SPI_ATTRS is not set 449# CONFIG_SCSI_SPI_ATTRS is not set
495# CONFIG_SCSI_FC_ATTRS is not set 450# CONFIG_SCSI_FC_ATTRS is not set
496# CONFIG_SCSI_ISCSI_ATTRS is not set 451# CONFIG_SCSI_ISCSI_ATTRS is not set
497# CONFIG_SCSI_SAS_ATTRS is not set 452# CONFIG_SCSI_SAS_ATTRS is not set
453# CONFIG_SCSI_SAS_LIBSAS is not set
498 454
499# 455#
500# SCSI low-level drivers 456# SCSI low-level drivers
@@ -507,21 +463,24 @@ CONFIG_BLK_DEV_SD=y
507# CONFIG_SCSI_AIC7XXX is not set 463# CONFIG_SCSI_AIC7XXX is not set
508# CONFIG_SCSI_AIC7XXX_OLD is not set 464# CONFIG_SCSI_AIC7XXX_OLD is not set
509# CONFIG_SCSI_AIC79XX is not set 465# CONFIG_SCSI_AIC79XX is not set
466# CONFIG_SCSI_AIC94XX is not set
510# CONFIG_SCSI_DPT_I2O is not set 467# CONFIG_SCSI_DPT_I2O is not set
468# CONFIG_SCSI_ARCMSR is not set
511# CONFIG_MEGARAID_NEWGEN is not set 469# CONFIG_MEGARAID_NEWGEN is not set
512# CONFIG_MEGARAID_LEGACY is not set 470# CONFIG_MEGARAID_LEGACY is not set
513# CONFIG_MEGARAID_SAS is not set 471# CONFIG_MEGARAID_SAS is not set
514# CONFIG_SCSI_SATA is not set
515# CONFIG_SCSI_HPTIOP is not set 472# CONFIG_SCSI_HPTIOP is not set
516# CONFIG_SCSI_DMX3191D is not set 473# CONFIG_SCSI_DMX3191D is not set
517# CONFIG_SCSI_FUTURE_DOMAIN is not set 474# CONFIG_SCSI_FUTURE_DOMAIN is not set
518# CONFIG_SCSI_IPS is not set 475# CONFIG_SCSI_IPS is not set
519# CONFIG_SCSI_INITIO is not set 476# CONFIG_SCSI_INITIO is not set
520# CONFIG_SCSI_INIA100 is not set 477# CONFIG_SCSI_INIA100 is not set
478# CONFIG_SCSI_STEX is not set
521# CONFIG_SCSI_SYM53C8XX_2 is not set 479# CONFIG_SCSI_SYM53C8XX_2 is not set
522# CONFIG_SCSI_IPR is not set 480# CONFIG_SCSI_IPR is not set
523# CONFIG_SCSI_QLOGIC_1280 is not set 481# CONFIG_SCSI_QLOGIC_1280 is not set
524# CONFIG_SCSI_QLA_FC is not set 482# CONFIG_SCSI_QLA_FC is not set
483# CONFIG_SCSI_QLA_ISCSI is not set
525# CONFIG_SCSI_LPFC is not set 484# CONFIG_SCSI_LPFC is not set
526# CONFIG_SCSI_DC395x is not set 485# CONFIG_SCSI_DC395x is not set
527# CONFIG_SCSI_DC390T is not set 486# CONFIG_SCSI_DC390T is not set
@@ -529,6 +488,59 @@ CONFIG_BLK_DEV_SD=y
529# CONFIG_SCSI_DEBUG is not set 488# CONFIG_SCSI_DEBUG is not set
530 489
531# 490#
491# Serial ATA (prod) and Parallel ATA (experimental) drivers
492#
493CONFIG_ATA=y
494# CONFIG_SATA_AHCI is not set
495# CONFIG_SATA_SVW is not set
496# CONFIG_ATA_PIIX is not set
497# CONFIG_SATA_MV is not set
498# CONFIG_SATA_NV is not set
499# CONFIG_PDC_ADMA is not set
500# CONFIG_SATA_QSTOR is not set
501# CONFIG_SATA_PROMISE is not set
502# CONFIG_SATA_SX4 is not set
503# CONFIG_SATA_SIL is not set
504# CONFIG_SATA_SIL24 is not set
505# CONFIG_SATA_SIS is not set
506# CONFIG_SATA_ULI is not set
507# CONFIG_SATA_VIA is not set
508# CONFIG_SATA_VITESSE is not set
509# CONFIG_PATA_ALI is not set
510# CONFIG_PATA_AMD is not set
511# CONFIG_PATA_ARTOP is not set
512# CONFIG_PATA_ATIIXP is not set
513# CONFIG_PATA_CMD64X is not set
514# CONFIG_PATA_CS5520 is not set
515# CONFIG_PATA_CS5530 is not set
516# CONFIG_PATA_CYPRESS is not set
517# CONFIG_PATA_EFAR is not set
518# CONFIG_ATA_GENERIC is not set
519# CONFIG_PATA_HPT366 is not set
520# CONFIG_PATA_HPT37X is not set
521# CONFIG_PATA_HPT3X2N is not set
522# CONFIG_PATA_HPT3X3 is not set
523# CONFIG_PATA_IT821X is not set
524# CONFIG_PATA_JMICRON is not set
525# CONFIG_PATA_TRIFLEX is not set
526# CONFIG_PATA_MPIIX is not set
527# CONFIG_PATA_OLDPIIX is not set
528# CONFIG_PATA_NETCELL is not set
529# CONFIG_PATA_NS87410 is not set
530# CONFIG_PATA_OPTI is not set
531# CONFIG_PATA_OPTIDMA is not set
532# CONFIG_PATA_PDC_OLD is not set
533# CONFIG_PATA_RADISYS is not set
534# CONFIG_PATA_RZ1000 is not set
535# CONFIG_PATA_SC1200 is not set
536# CONFIG_PATA_SERVERWORKS is not set
537# CONFIG_PATA_PDC2027X is not set
538CONFIG_PATA_SIL680=y
539# CONFIG_PATA_SIS is not set
540# CONFIG_PATA_VIA is not set
541# CONFIG_PATA_WINBOND is not set
542
543#
532# Multi-device support (RAID and LVM) 544# Multi-device support (RAID and LVM)
533# 545#
534# CONFIG_MD is not set 546# CONFIG_MD is not set
@@ -632,6 +644,7 @@ CONFIG_R8169=y
632# CONFIG_SK98LIN is not set 644# CONFIG_SK98LIN is not set
633# CONFIG_TIGON3 is not set 645# CONFIG_TIGON3 is not set
634# CONFIG_BNX2 is not set 646# CONFIG_BNX2 is not set
647# CONFIG_QLA3XXX is not set
635 648
636# 649#
637# Ethernet (10000 Mbit) 650# Ethernet (10000 Mbit)
@@ -679,6 +692,7 @@ CONFIG_R8169=y
679# Input device support 692# Input device support
680# 693#
681CONFIG_INPUT=y 694CONFIG_INPUT=y
695# CONFIG_INPUT_FF_MEMLESS is not set
682 696
683# 697#
684# Userland interfaces 698# Userland interfaces
@@ -758,7 +772,6 @@ CONFIG_GPIO_VR41XX=y
758# TPM devices 772# TPM devices
759# 773#
760# CONFIG_TCG_TPM is not set 774# CONFIG_TCG_TPM is not set
761# CONFIG_TELCLOCK is not set
762 775
763# 776#
764# I2C support 777# I2C support
@@ -784,12 +797,12 @@ CONFIG_GPIO_VR41XX=y
784# 797#
785# Misc devices 798# Misc devices
786# 799#
800# CONFIG_TIFM_CORE is not set
787 801
788# 802#
789# Multimedia devices 803# Multimedia devices
790# 804#
791# CONFIG_VIDEO_DEV is not set 805# CONFIG_VIDEO_DEV is not set
792CONFIG_VIDEO_V4L2=y
793 806
794# 807#
795# Digital Video Broadcasting Devices 808# Digital Video Broadcasting Devices
@@ -897,13 +910,13 @@ CONFIG_USB_STORAGE=m
897# CONFIG_USB_STORAGE_DEBUG is not set 910# CONFIG_USB_STORAGE_DEBUG is not set
898# CONFIG_USB_STORAGE_DATAFAB is not set 911# CONFIG_USB_STORAGE_DATAFAB is not set
899# CONFIG_USB_STORAGE_FREECOM is not set 912# CONFIG_USB_STORAGE_FREECOM is not set
900# CONFIG_USB_STORAGE_ISD200 is not set
901# CONFIG_USB_STORAGE_DPCM is not set 913# CONFIG_USB_STORAGE_DPCM is not set
902# CONFIG_USB_STORAGE_USBAT is not set 914# CONFIG_USB_STORAGE_USBAT is not set
903# CONFIG_USB_STORAGE_SDDR09 is not set 915# CONFIG_USB_STORAGE_SDDR09 is not set
904# CONFIG_USB_STORAGE_SDDR55 is not set 916# CONFIG_USB_STORAGE_SDDR55 is not set
905# CONFIG_USB_STORAGE_JUMPSHOT is not set 917# CONFIG_USB_STORAGE_JUMPSHOT is not set
906# CONFIG_USB_STORAGE_ALAUDA is not set 918# CONFIG_USB_STORAGE_ALAUDA is not set
919# CONFIG_USB_STORAGE_KARMA is not set
907# CONFIG_USB_LIBUSUAL is not set 920# CONFIG_USB_LIBUSUAL is not set
908 921
909# 922#
@@ -932,6 +945,7 @@ CONFIG_USB_HIDINPUT=y
932# CONFIG_USB_ATI_REMOTE2 is not set 945# CONFIG_USB_ATI_REMOTE2 is not set
933# CONFIG_USB_KEYSPAN_REMOTE is not set 946# CONFIG_USB_KEYSPAN_REMOTE is not set
934# CONFIG_USB_APPLETOUCH is not set 947# CONFIG_USB_APPLETOUCH is not set
948# CONFIG_USB_TRANCEVIBRATOR is not set
935 949
936# 950#
937# USB Imaging devices 951# USB Imaging devices
@@ -963,16 +977,17 @@ CONFIG_USB_MON=y
963# 977#
964# CONFIG_USB_EMI62 is not set 978# CONFIG_USB_EMI62 is not set
965# CONFIG_USB_EMI26 is not set 979# CONFIG_USB_EMI26 is not set
980# CONFIG_USB_ADUTUX is not set
966# CONFIG_USB_AUERSWALD is not set 981# CONFIG_USB_AUERSWALD is not set
967# CONFIG_USB_RIO500 is not set 982# CONFIG_USB_RIO500 is not set
968# CONFIG_USB_LEGOTOWER is not set 983# CONFIG_USB_LEGOTOWER is not set
969# CONFIG_USB_LCD is not set 984# CONFIG_USB_LCD is not set
970# CONFIG_USB_LED is not set 985# CONFIG_USB_LED is not set
971# CONFIG_USB_CY7C63 is not set 986# CONFIG_USB_CYPRESS_CY7C63 is not set
972# CONFIG_USB_CYTHERM is not set 987# CONFIG_USB_CYTHERM is not set
973# CONFIG_USB_PHIDGETKIT is not set 988# CONFIG_USB_PHIDGET is not set
974# CONFIG_USB_PHIDGETSERVO is not set
975# CONFIG_USB_IDMOUSE is not set 989# CONFIG_USB_IDMOUSE is not set
990# CONFIG_USB_FTDI_ELAN is not set
976# CONFIG_USB_APPLEDISPLAY is not set 991# CONFIG_USB_APPLEDISPLAY is not set
977# CONFIG_USB_SISUSBVGA is not set 992# CONFIG_USB_SISUSBVGA is not set
978# CONFIG_USB_LD is not set 993# CONFIG_USB_LD is not set
@@ -1041,6 +1056,7 @@ CONFIG_EXT3_FS=y
1041CONFIG_EXT3_FS_XATTR=y 1056CONFIG_EXT3_FS_XATTR=y
1042# CONFIG_EXT3_FS_POSIX_ACL is not set 1057# CONFIG_EXT3_FS_POSIX_ACL is not set
1043# CONFIG_EXT3_FS_SECURITY is not set 1058# CONFIG_EXT3_FS_SECURITY is not set
1059# CONFIG_EXT4DEV_FS is not set
1044CONFIG_JBD=y 1060CONFIG_JBD=y
1045# CONFIG_JBD_DEBUG is not set 1061# CONFIG_JBD_DEBUG is not set
1046CONFIG_FS_MBCACHE=y 1062CONFIG_FS_MBCACHE=y
@@ -1052,6 +1068,7 @@ CONFIG_XFS_QUOTA=y
1052# CONFIG_XFS_SECURITY is not set 1068# CONFIG_XFS_SECURITY is not set
1053CONFIG_XFS_POSIX_ACL=y 1069CONFIG_XFS_POSIX_ACL=y
1054# CONFIG_XFS_RT is not set 1070# CONFIG_XFS_RT is not set
1071# CONFIG_GFS2_FS is not set
1055# CONFIG_OCFS2_FS is not set 1072# CONFIG_OCFS2_FS is not set
1056# CONFIG_MINIX_FS is not set 1073# CONFIG_MINIX_FS is not set
1057CONFIG_ROMFS_FS=m 1074CONFIG_ROMFS_FS=m
@@ -1082,8 +1099,10 @@ CONFIG_AUTOFS4_FS=y
1082# 1099#
1083CONFIG_PROC_FS=y 1100CONFIG_PROC_FS=y
1084CONFIG_PROC_KCORE=y 1101CONFIG_PROC_KCORE=y
1102CONFIG_PROC_SYSCTL=y
1085CONFIG_SYSFS=y 1103CONFIG_SYSFS=y
1086CONFIG_TMPFS=y 1104CONFIG_TMPFS=y
1105# CONFIG_TMPFS_POSIX_ACL is not set
1087# CONFIG_HUGETLB_PAGE is not set 1106# CONFIG_HUGETLB_PAGE is not set
1088CONFIG_RAMFS=y 1107CONFIG_RAMFS=y
1089# CONFIG_CONFIGFS_FS is not set 1108# CONFIG_CONFIGFS_FS is not set
@@ -1123,7 +1142,6 @@ CONFIG_SUNRPC=y
1123# CONFIG_RPCSEC_GSS_SPKM3 is not set 1142# CONFIG_RPCSEC_GSS_SPKM3 is not set
1124# CONFIG_SMB_FS is not set 1143# CONFIG_SMB_FS is not set
1125# CONFIG_CIFS is not set 1144# CONFIG_CIFS is not set
1126# CONFIG_CIFS_DEBUG2 is not set
1127# CONFIG_NCP_FS is not set 1145# CONFIG_NCP_FS is not set
1128# CONFIG_CODA_FS is not set 1146# CONFIG_CODA_FS is not set
1129# CONFIG_AFS_FS is not set 1147# CONFIG_AFS_FS is not set
@@ -1150,11 +1168,13 @@ CONFIG_MSDOS_PARTITION=y
1150# 1168#
1151CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1169CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1152# CONFIG_PRINTK_TIME is not set 1170# CONFIG_PRINTK_TIME is not set
1171CONFIG_ENABLE_MUST_CHECK=y
1153# CONFIG_MAGIC_SYSRQ is not set 1172# CONFIG_MAGIC_SYSRQ is not set
1154# CONFIG_UNUSED_SYMBOLS is not set 1173# CONFIG_UNUSED_SYMBOLS is not set
1155# CONFIG_DEBUG_KERNEL is not set 1174# CONFIG_DEBUG_KERNEL is not set
1156CONFIG_LOG_BUF_SHIFT=14 1175CONFIG_LOG_BUF_SHIFT=14
1157# CONFIG_DEBUG_FS is not set 1176# CONFIG_DEBUG_FS is not set
1177# CONFIG_HEADERS_CHECK is not set
1158CONFIG_CROSSCOMPILE=y 1178CONFIG_CROSSCOMPILE=y
1159CONFIG_CMDLINE="mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" 1179CONFIG_CMDLINE="mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs"
1160 1180
@@ -1170,10 +1190,6 @@ CONFIG_CMDLINE="mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs"
1170# CONFIG_CRYPTO is not set 1190# CONFIG_CRYPTO is not set
1171 1191
1172# 1192#
1173# Hardware crypto devices
1174#
1175
1176#
1177# Library routines 1193# Library routines
1178# 1194#
1179# CONFIG_CRC_CCITT is not set 1195# CONFIG_CRC_CCITT is not set
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 4cf0c06e2414..69e424e9ab6f 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -160,11 +160,6 @@ static unsigned int dec_ioasic_hpt_read(void)
160 return ioasic_read(IO_REG_FCTR); 160 return ioasic_read(IO_REG_FCTR);
161} 161}
162 162
163static void dec_ioasic_hpt_init(unsigned int count)
164{
165 ioasic_write(IO_REG_FCTR, ioasic_read(IO_REG_FCTR) - count);
166}
167
168 163
169void __init dec_time_init(void) 164void __init dec_time_init(void)
170{ 165{
@@ -174,11 +169,9 @@ void __init dec_time_init(void)
174 mips_timer_state = dec_timer_state; 169 mips_timer_state = dec_timer_state;
175 mips_timer_ack = dec_timer_ack; 170 mips_timer_ack = dec_timer_ack;
176 171
177 if (!cpu_has_counter && IOASIC) { 172 if (!cpu_has_counter && IOASIC)
178 /* For pre-R4k systems we use the I/O ASIC's counter. */ 173 /* For pre-R4k systems we use the I/O ASIC's counter. */
179 mips_hpt_read = dec_ioasic_hpt_read; 174 mips_hpt_read = dec_ioasic_hpt_read;
180 mips_hpt_init = dec_ioasic_hpt_init;
181 }
182 175
183 /* Set up the rate of periodic DS1287 interrupts. */ 176 /* Set up the rate of periodic DS1287 interrupts. */
184 CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); 177 CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
index 7c930860c921..197ed4c2ba04 100644
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -97,7 +97,7 @@ void emma2rh_irq_init(u32 irq_base)
97 irq_desc[i].status = IRQ_DISABLED; 97 irq_desc[i].status = IRQ_DISABLED;
98 irq_desc[i].action = NULL; 98 irq_desc[i].action = NULL;
99 irq_desc[i].depth = 1; 99 irq_desc[i].depth = 1;
100 irq_desc[i].handler = &emma2rh_irq_controller; 100 irq_desc[i].chip = &emma2rh_irq_controller;
101 } 101 }
102 102
103 emma2rh_irq_base = irq_base; 103 emma2rh_irq_base = irq_base;
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
index f23ae9fcffa0..0b36eb001e62 100644
--- a/arch/mips/emma2rh/markeins/irq_markeins.c
+++ b/arch/mips/emma2rh/markeins/irq_markeins.c
@@ -86,7 +86,7 @@ void emma2rh_sw_irq_init(u32 irq_base)
86 irq_desc[i].status = IRQ_DISABLED; 86 irq_desc[i].status = IRQ_DISABLED;
87 irq_desc[i].action = NULL; 87 irq_desc[i].action = NULL;
88 irq_desc[i].depth = 2; 88 irq_desc[i].depth = 2;
89 irq_desc[i].handler = &emma2rh_sw_irq_controller; 89 irq_desc[i].chip = &emma2rh_sw_irq_controller;
90 } 90 }
91 91
92 emma2rh_sw_irq_base = irq_base; 92 emma2rh_sw_irq_base = irq_base;
@@ -166,7 +166,7 @@ void emma2rh_gpio_irq_init(u32 irq_base)
166 irq_desc[i].status = IRQ_DISABLED; 166 irq_desc[i].status = IRQ_DISABLED;
167 irq_desc[i].action = NULL; 167 irq_desc[i].action = NULL;
168 irq_desc[i].depth = 2; 168 irq_desc[i].depth = 2;
169 irq_desc[i].handler = &emma2rh_gpio_irq_controller; 169 irq_desc[i].chip = &emma2rh_gpio_irq_controller;
170 } 170 }
171 171
172 emma2rh_gpio_irq_base = irq_base; 172 emma2rh_gpio_irq_base = irq_base;
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
index 15cc61df3622..11567702b155 100644
--- a/arch/mips/emma2rh/markeins/platform.c
+++ b/arch/mips/emma2rh/markeins/platform.c
@@ -44,18 +44,45 @@
44#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */ 44#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
45 45
46static struct resource i2c_emma_resources_0[] = { 46static struct resource i2c_emma_resources_0[] = {
47 { NULL, EMMA2RH_IRQ_PIIC0, EMMA2RH_IRQ_PIIC0, IORESOURCE_IRQ }, 47 {
48 { NULL, KSEG1ADDR(EMMA2RH_PIIC0_BASE), KSEG1ADDR(EMMA2RH_PIIC0_BASE + 0x1000), 0 }, 48 .name = NULL,
49 .start = EMMA2RH_IRQ_PIIC0,
50 .end = EMMA2RH_IRQ_PIIC0,
51 .flags = IORESOURCE_IRQ
52 }, {
53 .name = NULL,
54 .start = EMMA2RH_PIIC0_BASE,
55 .end = EMMA2RH_PIIC0_BASE + 0x1000,
56 .flags = 0
57 },
49}; 58};
50 59
51struct resource i2c_emma_resources_1[] = { 60struct resource i2c_emma_resources_1[] = {
52 { NULL, EMMA2RH_IRQ_PIIC1, EMMA2RH_IRQ_PIIC1, IORESOURCE_IRQ }, 61 {
53 { NULL, KSEG1ADDR(EMMA2RH_PIIC1_BASE), KSEG1ADDR(EMMA2RH_PIIC1_BASE + 0x1000), 0 }, 62 .name = NULL,
63 .start = EMMA2RH_IRQ_PIIC1,
64 .end = EMMA2RH_IRQ_PIIC1,
65 .flags = IORESOURCE_IRQ
66 }, {
67 .name = NULL,
68 .start = EMMA2RH_PIIC1_BASE,
69 .end = EMMA2RH_PIIC1_BASE + 0x1000,
70 .flags = 0
71 },
54}; 72};
55 73
56struct resource i2c_emma_resources_2[] = { 74struct resource i2c_emma_resources_2[] = {
57 { NULL, EMMA2RH_IRQ_PIIC2, EMMA2RH_IRQ_PIIC2, IORESOURCE_IRQ }, 75 {
58 { NULL, KSEG1ADDR(EMMA2RH_PIIC2_BASE), KSEG1ADDR(EMMA2RH_PIIC2_BASE + 0x1000), 0 }, 76 .name = NULL,
77 .start = EMMA2RH_IRQ_PIIC2,
78 .end = EMMA2RH_IRQ_PIIC2,
79 .flags = IORESOURCE_IRQ
80 }, {
81 .name = NULL,
82 .start = EMMA2RH_PIIC2_BASE,
83 .end = EMMA2RH_PIIC2_BASE + 0x1000,
84 .flags = 0
85 },
59}; 86};
60 87
61struct platform_device i2c_emma_devices[] = { 88struct platform_device i2c_emma_devices[] = {
@@ -83,32 +110,29 @@ struct platform_device i2c_emma_devices[] = {
83#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST 110#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
84 111
85static struct plat_serial8250_port platform_serial_ports[] = { 112static struct plat_serial8250_port platform_serial_ports[] = {
86 [0] = { 113 [0] = {
87 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3), 114 .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
88 .irq = EMMA2RH_IRQ_PFUR0, 115 .irq = EMMA2RH_IRQ_PFUR0,
89 .uartclk = EMMA2RH_SERIAL_CLOCK, 116 .uartclk = EMMA2RH_SERIAL_CLOCK,
90 .regshift = 4, 117 .regshift = 4,
91 .iotype = UPIO_MEM, 118 .iotype = UPIO_MEM,
92 .flags = EMMA2RH_SERIAL_FLAGS, 119 .flags = EMMA2RH_SERIAL_FLAGS,
93 }, 120 }, [1] = {
94 [1] = { 121 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
95 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3), 122 .irq = EMMA2RH_IRQ_PFUR1,
96 .irq = EMMA2RH_IRQ_PFUR1, 123 .uartclk = EMMA2RH_SERIAL_CLOCK,
97 .uartclk = EMMA2RH_SERIAL_CLOCK, 124 .regshift = 4,
98 .regshift = 4, 125 .iotype = UPIO_MEM,
99 .iotype = UPIO_MEM, 126 .flags = EMMA2RH_SERIAL_FLAGS,
100 .flags = EMMA2RH_SERIAL_FLAGS, 127 }, [2] = {
101 }, 128 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
102 [2] = { 129 .irq = EMMA2RH_IRQ_PFUR2,
103 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3), 130 .uartclk = EMMA2RH_SERIAL_CLOCK,
104 .irq = EMMA2RH_IRQ_PFUR2, 131 .regshift = 4,
105 .uartclk = EMMA2RH_SERIAL_CLOCK, 132 .iotype = UPIO_MEM,
106 .regshift = 4, 133 .flags = EMMA2RH_SERIAL_FLAGS,
107 .iotype = UPIO_MEM, 134 }, [3] = {
108 .flags = EMMA2RH_SERIAL_FLAGS, 135 .flags = 0,
109 },
110 [3] = {
111 .flags = 0,
112 }, 136 },
113}; 137};
114 138
diff --git a/arch/mips/gt64120/common/time.c b/arch/mips/gt64120/common/time.c
index c83ae6acd601..c47eeb768192 100644
--- a/arch/mips/gt64120/common/time.c
+++ b/arch/mips/gt64120/common/time.c
@@ -64,14 +64,14 @@ static irqreturn_t gt64120_irq(int irq, void *dev_id)
64 * as *irq (=irq0 in ../kernel/time.c). We will do our own timer interrupt 64 * as *irq (=irq0 in ../kernel/time.c). We will do our own timer interrupt
65 * handling. 65 * handling.
66 */ 66 */
67void gt64120_time_init(void) 67void __init plat_timer_setup(struct irqaction *irq)
68{ 68{
69 static struct irqaction timer; 69 static struct irqaction timer;
70 70
71 /* Disable timer first */ 71 /* Disable timer first */
72 GT_WRITE(GT_TC_CONTROL_OFS, 0); 72 GT_WRITE(GT_TC_CONTROL_OFS, 0);
73 /* Load timer value for 100 Hz */ 73 /* Load timer value for 100 Hz */
74 GT_WRITE(GT_TC3_OFS, Sys_clock / 100); 74 GT_WRITE(GT_TC3_OFS, Sys_clock / HZ);
75 75
76 /* 76 /*
77 * Create the IRQ structure entry for the timer. Since we're too early 77 * Create the IRQ structure entry for the timer. Since we're too early
diff --git a/arch/mips/gt64120/ev64120/setup.c b/arch/mips/gt64120/ev64120/setup.c
index 91c2d3f41617..99c8d42212e2 100644
--- a/arch/mips/gt64120/ev64120/setup.c
+++ b/arch/mips/gt64120/ev64120/setup.c
@@ -68,7 +68,6 @@ unsigned long __init prom_free_prom_memory(void)
68 * Initializes basic routines and structures pointers, memory size (as 68 * Initializes basic routines and structures pointers, memory size (as
69 * given by the bios and saves the command line. 69 * given by the bios and saves the command line.
70 */ 70 */
71extern void gt64120_time_init(void);
72 71
73void __init plat_mem_setup(void) 72void __init plat_mem_setup(void)
74{ 73{
@@ -76,7 +75,6 @@ void __init plat_mem_setup(void)
76 _machine_halt = galileo_machine_halt; 75 _machine_halt = galileo_machine_halt;
77 pm_power_off = galileo_machine_power_off; 76 pm_power_off = galileo_machine_power_off;
78 77
79 board_time_init = gt64120_time_init;
80 set_io_port_base(KSEG1); 78 set_io_port_base(KSEG1);
81} 79}
82 80
diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c
index 0e5bbee2d5b7..94f94ebbda6c 100644
--- a/arch/mips/gt64120/momenco_ocelot/setup.c
+++ b/arch/mips/gt64120/momenco_ocelot/setup.c
@@ -70,7 +70,6 @@ extern void momenco_ocelot_restart(char *command);
70extern void momenco_ocelot_halt(void); 70extern void momenco_ocelot_halt(void);
71extern void momenco_ocelot_power_off(void); 71extern void momenco_ocelot_power_off(void);
72 72
73extern void gt64120_time_init(void);
74extern void momenco_ocelot_irq_setup(void); 73extern void momenco_ocelot_irq_setup(void);
75 74
76static char reset_reason; 75static char reset_reason;
@@ -156,8 +155,6 @@ void __init plat_mem_setup(void)
156 void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache); 155 void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
157 unsigned int tmpword; 156 unsigned int tmpword;
158 157
159 board_time_init = gt64120_time_init;
160
161 _machine_restart = momenco_ocelot_restart; 158 _machine_restart = momenco_ocelot_restart;
162 _machine_halt = momenco_ocelot_halt; 159 _machine_halt = momenco_ocelot_halt;
163 pm_power_off = momenco_ocelot_power_off; 160 pm_power_off = momenco_ocelot_power_off;
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index 6dc4135d6e11..d848f1a07786 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -37,7 +37,7 @@ extern void jazz_machine_restart(char *command);
37extern void jazz_machine_halt(void); 37extern void jazz_machine_halt(void);
38extern void jazz_machine_power_off(void); 38extern void jazz_machine_power_off(void);
39 39
40void __init plat_time_init(struct irqaction *irq) 40void __init plat_timer_setup(struct irqaction *irq)
41{ 41{
42 /* set the clock to 100 Hz */ 42 /* set the clock to 100 Hz */
43 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); 43 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index 39a0243bed9a..de4a238c28be 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -288,6 +288,8 @@ static void tx_branch_likely_bug_fixup(void)
288 288
289static void jmr3927_spurious(void) 289static void jmr3927_spurious(void)
290{ 290{
291 struct pt_regs * regs = get_irq_regs();
292
291#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND 293#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
292 tx_branch_likely_bug_fixup(); 294 tx_branch_likely_bug_fixup();
293#endif 295#endif
@@ -297,6 +299,7 @@ static void jmr3927_spurious(void)
297 299
298asmlinkage void plat_irq_dispatch(void) 300asmlinkage void plat_irq_dispatch(void)
299{ 301{
302 struct pt_regs * regs = get_irq_regs();
300 int irq; 303 int irq;
301 304
302#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND 305#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 025434054ed0..16e5dfe7aa8a 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -170,12 +170,20 @@ static void jmr3927_machine_power_off(void)
170 while (1); 170 while (1);
171} 171}
172 172
173static unsigned int jmr3927_hpt_read(void)
174{
175 /* We assume this function is called xtime_lock held. */
176 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
177}
178
173#define USE_RTC_DS1742 179#define USE_RTC_DS1742
174#ifdef USE_RTC_DS1742 180#ifdef USE_RTC_DS1742
175extern void rtc_ds1742_init(unsigned long base); 181extern void rtc_ds1742_init(unsigned long base);
176#endif 182#endif
177static void __init jmr3927_time_init(void) 183static void __init jmr3927_time_init(void)
178{ 184{
185 mips_hpt_read = jmr3927_hpt_read;
186 mips_hpt_frequency = JMR3927_TIMER_CLK;
179#ifdef USE_RTC_DS1742 187#ifdef USE_RTC_DS1742
180 if (jmr3927_have_nvram()) { 188 if (jmr3927_have_nvram()) {
181 rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR); 189 rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR);
@@ -183,12 +191,8 @@ static void __init jmr3927_time_init(void)
183#endif 191#endif
184} 192}
185 193
186unsigned long jmr3927_do_gettimeoffset(void);
187
188void __init plat_timer_setup(struct irqaction *irq) 194void __init plat_timer_setup(struct irqaction *irq)
189{ 195{
190 do_gettimeoffset = jmr3927_do_gettimeoffset;
191
192 jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ; 196 jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ;
193 jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE; 197 jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE;
194 jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD; 198 jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD;
@@ -200,34 +204,6 @@ void __init plat_timer_setup(struct irqaction *irq)
200 204
201#define USECS_PER_JIFFY (1000000/HZ) 205#define USECS_PER_JIFFY (1000000/HZ)
202 206
203unsigned long jmr3927_do_gettimeoffset(void)
204{
205 unsigned long count;
206 unsigned long res = 0;
207
208 /* MUST read TRR before TISR. */
209 count = jmr3927_tmrptr->trr;
210
211 if (jmr3927_tmrptr->tisr & TXx927_TMTISR_TIIS) {
212 /* timer interrupt is pending. use Max value. */
213 res = USECS_PER_JIFFY - 1;
214 } else {
215 /* convert to usec */
216 /* res = count / (JMR3927_TIMER_CLK / 1000000); */
217 res = (count << 7) / ((JMR3927_TIMER_CLK << 7) / 1000000);
218
219 /*
220 * Due to possible jiffies inconsistencies, we need to check
221 * the result so that we'll get a timer that is monotonic.
222 */
223 if (res >= USECS_PER_JIFFY)
224 res = USECS_PER_JIFFY-1;
225 }
226
227 return res;
228}
229
230
231//#undef DO_WRITE_THROUGH 207//#undef DO_WRITE_THROUGH
232#define DO_WRITE_THROUGH 208#define DO_WRITE_THROUGH
233#define DO_ENABLE_CACHE 209#define DO_ENABLE_CACHE
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index e9ce5b3721af..ff88b06f89df 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -22,7 +22,7 @@
22#define offset(string, ptr, member) \ 22#define offset(string, ptr, member) \
23 __asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member))) 23 __asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member)))
24#define constant(string, member) \ 24#define constant(string, member) \
25 __asm__("\n@@@" string "%x0" : : "ri" (member)) 25 __asm__("\n@@@" string "%X0" : : "ri" (member))
26#define size(string, size) \ 26#define size(string, size) \
27 __asm__("\n@@@" string "%0" : : "i" (sizeof(size))) 27 __asm__("\n@@@" string "%0" : : "i" (sizeof(size)))
28#define linefeed text("") 28#define linefeed text("")
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 417c08ac76eb..f10b6a19f8bf 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -83,7 +83,10 @@ FEXPORT(syscall_exit)
83FEXPORT(restore_all) # restore full frame 83FEXPORT(restore_all) # restore full frame
84#ifdef CONFIG_MIPS_MT_SMTC 84#ifdef CONFIG_MIPS_MT_SMTC
85/* Detect and execute deferred IPI "interrupts" */ 85/* Detect and execute deferred IPI "interrupts" */
86 LONG_L s0, TI_REGS($28)
87 LONG_S sp, TI_REGS($28)
86 jal deferred_smtc_ipi 88 jal deferred_smtc_ipi
89 LONG_S s0, TI_REGS($28)
87/* Re-arm any temporarily masked interrupts not explicitly "acked" */ 90/* Re-arm any temporarily masked interrupts not explicitly "acked" */
88 mfc0 v0, CP0_TCSTATUS 91 mfc0 v0, CP0_TCSTATUS
89 ori v1, v0, TCSTATUS_IXMT 92 ori v1, v0, TCSTATUS_IXMT
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 8c6db0fc72f0..ddc1b71c9378 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -189,7 +189,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
189 189
190 MTC0 zero, CP0_CONTEXT # clear context register 190 MTC0 zero, CP0_CONTEXT # clear context register
191 PTR_LA $28, init_thread_union 191 PTR_LA $28, init_thread_union
192 PTR_ADDIU sp, $28, _THREAD_SIZE - 32 192 PTR_LI sp, _THREAD_SIZE - 32
193 PTR_ADDU sp, $28
193 set_saved_sp sp, t0, t1 194 set_saved_sp sp, t0, t1
194 PTR_SUBU sp, 4 * SZREG # init stack pointer 195 PTR_SUBU sp, 4 * SZREG # init stack pointer
195 196
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index dd24434392b6..9b0e49d63d7b 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -26,6 +26,48 @@
26#include <asm/system.h> 26#include <asm/system.h>
27#include <asm/uaccess.h> 27#include <asm/uaccess.h>
28 28
29static unsigned long irq_map[NR_IRQS / BITS_PER_LONG];
30
31int __devinit allocate_irqno(void)
32{
33 int irq;
34
35again:
36 irq = find_first_zero_bit(irq_map, NR_IRQS);
37
38 if (irq >= NR_IRQS)
39 return -ENOSPC;
40
41 if (test_and_set_bit(irq, irq_map))
42 goto again;
43
44 return irq;
45}
46
47EXPORT_SYMBOL_GPL(allocate_irqno);
48
49/*
50 * Allocate the 16 legacy interrupts for i8259 devices. This happens early
51 * in the kernel initialization so treating allocation failure as BUG() is
52 * ok.
53 */
54void __init alloc_legacy_irqno(void)
55{
56 int i;
57
58 for (i = 0; i <= 16; i++)
59 BUG_ON(test_and_set_bit(i, irq_map));
60}
61
62void __devinit free_irqno(unsigned int irq)
63{
64 smp_mb__before_clear_bit();
65 clear_bit(irq, irq_map);
66 smp_mb__after_clear_bit();
67}
68
69EXPORT_SYMBOL_GPL(free_irqno);
70
29/* 71/*
30 * 'what should we do if we get a hw irq event on an illegal vector'. 72 * 'what should we do if we get a hw irq event on an illegal vector'.
31 * each architecture has to answer this themselves. 73 * each architecture has to answer this themselves.
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 53f4171fc188..7a3ebbeba1f3 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -1055,7 +1055,9 @@ asmlinkage long sys32_newuname(struct new_utsname __user * name)
1055asmlinkage int sys32_personality(unsigned long personality) 1055asmlinkage int sys32_personality(unsigned long personality)
1056{ 1056{
1057 int ret; 1057 int ret;
1058 if (current->personality == PER_LINUX32 && personality == PER_LINUX) 1058 personality &= 0xffffffff;
1059 if (personality(current->personality) == PER_LINUX32 &&
1060 personality == PER_LINUX)
1059 personality = PER_LINUX32; 1061 personality = PER_LINUX32;
1060 ret = sys_personality(personality); 1062 ret = sys_personality(personality);
1061 if (ret == PER_LINUX32) 1063 if (ret == PER_LINUX32)
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 9f307eb1a31e..ec8209f3a0c6 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -358,10 +358,8 @@ static int __init frame_info_init(void)
358 unsigned long size = 0; 358 unsigned long size = 0;
359#ifdef CONFIG_KALLSYMS 359#ifdef CONFIG_KALLSYMS
360 unsigned long ofs; 360 unsigned long ofs;
361 char *modname;
362 char namebuf[KSYM_NAME_LEN + 1];
363 361
364 kallsyms_lookup((unsigned long)schedule, &size, &ofs, &modname, namebuf); 362 kallsyms_lookup_size_offset((unsigned long)schedule, &size, &ofs);
365#endif 363#endif
366 schedule_mfi.func = schedule; 364 schedule_mfi.func = schedule;
367 schedule_mfi.func_size = size; 365 schedule_mfi.func_size = size;
@@ -403,8 +401,6 @@ unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
403{ 401{
404 unsigned long stack_page; 402 unsigned long stack_page;
405 struct mips_frame_info info; 403 struct mips_frame_info info;
406 char *modname;
407 char namebuf[KSYM_NAME_LEN + 1];
408 unsigned long size, ofs; 404 unsigned long size, ofs;
409 int leaf; 405 int leaf;
410 extern void ret_from_irq(void); 406 extern void ret_from_irq(void);
@@ -433,7 +429,7 @@ unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
433 } 429 }
434 return 0; 430 return 0;
435 } 431 }
436 if (!kallsyms_lookup(pc, &size, &ofs, &modname, namebuf)) 432 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
437 return 0; 433 return 0;
438 /* 434 /*
439 * Return ra if an exception occured at the first instruction 435 * Return ra if an exception occured at the first instruction
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index d5c8b82fed72..cc566cf12246 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -85,7 +85,12 @@
85 move $28, a2 85 move $28, a2
86 cpu_restore_nonscratch a1 86 cpu_restore_nonscratch a1
87 87
88#if (_THREAD_SIZE - 32) < 0x10000
88 PTR_ADDIU t0, $28, _THREAD_SIZE - 32 89 PTR_ADDIU t0, $28, _THREAD_SIZE - 32
90#else
91 PTR_LI t0, _THREAD_SIZE - 32
92 PTR_ADDU t0, $28
93#endif
89 set_saved_sp t0, t1, t2 94 set_saved_sp t0, t1, t2
90#ifdef CONFIG_MIPS_MT_SMTC 95#ifdef CONFIG_MIPS_MT_SMTC
91 /* Read-modify-writes of Status must be atomic on a VPE */ 96 /* Read-modify-writes of Status must be atomic on a VPE */
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 61362e6fa9ec..a95f37de080e 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -652,7 +652,10 @@ einval: li v0, -EINVAL
652 sys sys_vmsplice 4 652 sys sys_vmsplice 4
653 sys sys_move_pages 6 653 sys sys_move_pages 6
654 sys sys_set_robust_list 2 654 sys sys_set_robust_list 2
655 sys sys_get_robust_list 3 655 sys sys_get_robust_list 3 /* 4310 */
656 sys sys_ni_syscall 0
657 sys sys_getcpu 3
658 sys sys_epoll_pwait 6
656 .endm 659 .endm
657 660
658 /* We pre-compute the number of _instruction_ bytes needed to 661 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 6c7b5ed0ea6e..8fb0f60f657b 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -468,3 +468,6 @@ sys_call_table:
468 PTR sys_move_pages 468 PTR sys_move_pages
469 PTR sys_set_robust_list 469 PTR sys_set_robust_list
470 PTR sys_get_robust_list 470 PTR sys_get_robust_list
471 PTR sys_ni_syscall /* 5270 */
472 PTR sys_getcpu
473 PTR sys_epoll_pwait
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 6d9f18727ac5..0da5ca2040ff 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -280,7 +280,7 @@ EXPORT(sysn32_call_table)
280 PTR sys_sync 280 PTR sys_sync
281 PTR sys_acct 281 PTR sys_acct
282 PTR sys32_settimeofday 282 PTR sys32_settimeofday
283 PTR sys_mount /* 6160 */ 283 PTR compat_sys_mount /* 6160 */
284 PTR sys_umount 284 PTR sys_umount
285 PTR sys_swapon 285 PTR sys_swapon
286 PTR sys_swapoff 286 PTR sys_swapoff
@@ -394,3 +394,6 @@ EXPORT(sysn32_call_table)
394 PTR sys_move_pages 394 PTR sys_move_pages
395 PTR compat_sys_set_robust_list 395 PTR compat_sys_set_robust_list
396 PTR compat_sys_get_robust_list 396 PTR compat_sys_get_robust_list
397 PTR sys_ni_syscall
398 PTR sys_getcpu
399 PTR sys_epoll_pwait
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 2e6d0673163e..b9d00cae8b5f 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -226,7 +226,7 @@ sys_call_table:
226 PTR sys_ni_syscall /* was sys_stat */ 226 PTR sys_ni_syscall /* was sys_stat */
227 PTR sys_lseek 227 PTR sys_lseek
228 PTR sys_getpid /* 4020 */ 228 PTR sys_getpid /* 4020 */
229 PTR sys_mount 229 PTR compat_sys_mount
230 PTR sys_oldumount 230 PTR sys_oldumount
231 PTR sys_setuid 231 PTR sys_setuid
232 PTR sys_getuid 232 PTR sys_getuid
@@ -516,4 +516,7 @@ sys_call_table:
516 PTR compat_sys_move_pages 516 PTR compat_sys_move_pages
517 PTR compat_sys_set_robust_list 517 PTR compat_sys_set_robust_list
518 PTR compat_sys_get_robust_list /* 4310 */ 518 PTR compat_sys_get_robust_list /* 4310 */
519 PTR sys_ni_syscall
520 PTR sys_getcpu
521 PTR sys_epoll_pwait
519 .size sys_call_table,.-sys_call_table 522 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index fdbb508661c5..8f6e89697ccf 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -223,7 +223,11 @@ disable:
223 223
224#else /* !CONFIG_BLK_DEV_INITRD */ 224#else /* !CONFIG_BLK_DEV_INITRD */
225 225
226#define init_initrd() 0 226static unsigned long __init init_initrd(void)
227{
228 return 0;
229}
230
227#define finalize_initrd() do {} while (0) 231#define finalize_initrd() do {} while (0)
228 232
229#endif 233#endif
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 3b5f3b632622..2ac19a6cbf68 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -140,15 +140,90 @@ static struct irqaction irq_call = {
140 .name = "IPI_call" 140 .name = "IPI_call"
141}; 141};
142 142
143static void __init smp_copy_vpe_config(void)
144{
145 write_vpe_c0_status(
146 (read_c0_status() & ~(ST0_IM | ST0_IE | ST0_KSU)) | ST0_CU0);
147
148 /* set config to be the same as vpe0, particularly kseg0 coherency alg */
149 write_vpe_c0_config( read_c0_config());
150
151 /* make sure there are no software interrupts pending */
152 write_vpe_c0_cause(0);
153
154 /* Propagate Config7 */
155 write_vpe_c0_config7(read_c0_config7());
156
157 write_vpe_c0_count(read_c0_count());
158}
159
160static unsigned int __init smp_vpe_init(unsigned int tc, unsigned int mvpconf0,
161 unsigned int ncpu)
162{
163 if (tc > ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT))
164 return ncpu;
165
166 /* Deactivate all but VPE 0 */
167 if (tc != 0) {
168 unsigned long tmp = read_vpe_c0_vpeconf0();
169
170 tmp &= ~VPECONF0_VPA;
171
172 /* master VPE */
173 tmp |= VPECONF0_MVP;
174 write_vpe_c0_vpeconf0(tmp);
175
176 /* Record this as available CPU */
177 cpu_set(tc, phys_cpu_present_map);
178 __cpu_number_map[tc] = ++ncpu;
179 __cpu_logical_map[ncpu] = tc;
180 }
181
182 /* Disable multi-threading with TC's */
183 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() & ~VPECONTROL_TE);
184
185 if (tc != 0)
186 smp_copy_vpe_config();
187
188 return ncpu;
189}
190
191static void __init smp_tc_init(unsigned int tc, unsigned int mvpconf0)
192{
193 unsigned long tmp;
194
195 if (!tc)
196 return;
197
198 /* bind a TC to each VPE, May as well put all excess TC's
199 on the last VPE */
200 if (tc >= (((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT)+1))
201 write_tc_c0_tcbind(read_tc_c0_tcbind() | ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT));
202 else {
203 write_tc_c0_tcbind(read_tc_c0_tcbind() | tc);
204
205 /* and set XTC */
206 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | (tc << VPECONF0_XTC_SHIFT));
207 }
208
209 tmp = read_tc_c0_tcstatus();
210
211 /* mark not allocated and not dynamically allocatable */
212 tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
213 tmp |= TCSTATUS_IXMT; /* interrupt exempt */
214 write_tc_c0_tcstatus(tmp);
215
216 write_tc_c0_tchalt(TCHALT_H);
217}
218
143/* 219/*
144 * Common setup before any secondaries are started 220 * Common setup before any secondaries are started
145 * Make sure all CPU's are in a sensible state before we boot any of the 221 * Make sure all CPU's are in a sensible state before we boot any of the
146 * secondarys 222 * secondarys
147 */ 223 */
148void plat_smp_setup(void) 224void __init plat_smp_setup(void)
149{ 225{
150 unsigned long val; 226 unsigned int mvpconf0, ntc, tc, ncpu = 0;
151 int i, num;
152 227
153#ifdef CONFIG_MIPS_MT_FPAFF 228#ifdef CONFIG_MIPS_MT_FPAFF
154 /* If we have an FPU, enroll ourselves in the FPU-full mask */ 229 /* If we have an FPU, enroll ourselves in the FPU-full mask */
@@ -167,75 +242,16 @@ void plat_smp_setup(void)
167 /* Put MVPE's into 'configuration state' */ 242 /* Put MVPE's into 'configuration state' */
168 set_c0_mvpcontrol(MVPCONTROL_VPC); 243 set_c0_mvpcontrol(MVPCONTROL_VPC);
169 244
170 val = read_c0_mvpconf0(); 245 mvpconf0 = read_c0_mvpconf0();
246 ntc = (mvpconf0 & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT;
171 247
172 /* we'll always have more TC's than VPE's, so loop setting everything 248 /* we'll always have more TC's than VPE's, so loop setting everything
173 to a sensible state */ 249 to a sensible state */
174 for (i = 0, num = 0; i <= ((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT); i++) { 250 for (tc = 0; tc <= ntc; tc++) {
175 settc(i); 251 settc(tc);
176
177 /* VPE's */
178 if (i <= ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT)) {
179
180 /* deactivate all but vpe0 */
181 if (i != 0) {
182 unsigned long tmp = read_vpe_c0_vpeconf0();
183
184 tmp &= ~VPECONF0_VPA;
185
186 /* master VPE */
187 tmp |= VPECONF0_MVP;
188 write_vpe_c0_vpeconf0(tmp);
189
190 /* Record this as available CPU */
191 cpu_set(i, phys_cpu_present_map);
192 __cpu_number_map[i] = ++num;
193 __cpu_logical_map[num] = i;
194 }
195
196 /* disable multi-threading with TC's */
197 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() & ~VPECONTROL_TE);
198
199 if (i != 0) {
200 write_vpe_c0_status((read_c0_status() & ~(ST0_IM | ST0_IE | ST0_KSU)) | ST0_CU0);
201 252
202 /* set config to be the same as vpe0, particularly kseg0 coherency alg */ 253 smp_tc_init(tc, mvpconf0);
203 write_vpe_c0_config( read_c0_config()); 254 ncpu = smp_vpe_init(tc, mvpconf0, ncpu);
204
205 /* make sure there are no software interrupts pending */
206 write_vpe_c0_cause(0);
207
208 /* Propagate Config7 */
209 write_vpe_c0_config7(read_c0_config7());
210 }
211
212 }
213
214 /* TC's */
215
216 if (i != 0) {
217 unsigned long tmp;
218
219 /* bind a TC to each VPE, May as well put all excess TC's
220 on the last VPE */
221 if ( i >= (((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT)+1) )
222 write_tc_c0_tcbind(read_tc_c0_tcbind() | ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) );
223 else {
224 write_tc_c0_tcbind( read_tc_c0_tcbind() | i);
225
226 /* and set XTC */
227 write_vpe_c0_vpeconf0( read_vpe_c0_vpeconf0() | (i << VPECONF0_XTC_SHIFT));
228 }
229
230 tmp = read_tc_c0_tcstatus();
231
232 /* mark not allocated and not dynamically allocatable */
233 tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
234 tmp |= TCSTATUS_IXMT; /* interrupt exempt */
235 write_tc_c0_tcstatus(tmp);
236
237 write_tc_c0_tchalt(TCHALT_H);
238 }
239 } 255 }
240 256
241 /* Release config state */ 257 /* Release config state */
@@ -243,7 +259,7 @@ void plat_smp_setup(void)
243 259
244 /* We'll wait until starting the secondaries before starting MVPE */ 260 /* We'll wait until starting the secondaries before starting MVPE */
245 261
246 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num); 262 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", ncpu);
247} 263}
248 264
249void __init plat_prepare_cpus(unsigned int max_cpus) 265void __init plat_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 1af3612a1ce8..db80957ada89 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -310,7 +310,7 @@ static void flush_tlb_all_ipi(void *info)
310 310
311void flush_tlb_all(void) 311void flush_tlb_all(void)
312{ 312{
313 on_each_cpu(flush_tlb_all_ipi, 0, 1, 1); 313 on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
314} 314}
315 315
316static void flush_tlb_mm_ipi(void *mm) 316static void flush_tlb_mm_ipi(void *mm)
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S
index 1cb9441f1474..921207c4a83c 100644
--- a/arch/mips/kernel/smtc-asm.S
+++ b/arch/mips/kernel/smtc-asm.S
@@ -101,7 +101,9 @@ FEXPORT(__smtc_ipi_vector)
101 lw t0,PT_PADSLOT5(sp) 101 lw t0,PT_PADSLOT5(sp)
102 /* Argument from sender passed in stack pad slot 4 */ 102 /* Argument from sender passed in stack pad slot 4 */
103 lw a0,PT_PADSLOT4(sp) 103 lw a0,PT_PADSLOT4(sp)
104 PTR_LA ra, _ret_from_irq 104 LONG_L s0, TI_REGS($28)
105 LONG_S sp, TI_REGS($28)
106 PTR_LA ra, ret_from_irq
105 jr t0 107 jr t0
106 108
107/* 109/*
@@ -119,7 +121,10 @@ LEAF(self_ipi)
119 subu t1,sp,PT_SIZE 121 subu t1,sp,PT_SIZE
120 sw ra,PT_EPC(t1) 122 sw ra,PT_EPC(t1)
121 sw a0,PT_PADSLOT4(t1) 123 sw a0,PT_PADSLOT4(t1)
124 LONG_L s0, TI_REGS($28)
125 LONG_S sp, TI_REGS($28)
122 la t2,ipi_decode 126 la t2,ipi_decode
127 LONG_S s0, TI_REGS($28)
123 sw t2,PT_PADSLOT5(t1) 128 sw t2,PT_PADSLOT5(t1)
124 /* Save pre-disable value of TCStatus */ 129 /* Save pre-disable value of TCStatus */
125 sw t0,PT_TCSTATUS(t1) 130 sw t0,PT_TCSTATUS(t1)
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index cc1f7474f7d7..3b78caf112f5 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -476,6 +476,7 @@ void mipsmt_prepare_cpus(void)
476 write_vpe_c0_compare(0); 476 write_vpe_c0_compare(0);
477 /* Propagate Config7 */ 477 /* Propagate Config7 */
478 write_vpe_c0_config7(read_c0_config7()); 478 write_vpe_c0_config7(read_c0_config7());
479 write_vpe_c0_count(read_c0_count());
479 } 480 }
480 /* enable multi-threading within VPE */ 481 /* enable multi-threading within VPE */
481 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE); 482 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);
diff --git a/arch/mips/kernel/stacktrace.c b/arch/mips/kernel/stacktrace.c
index 4aabe526a68e..a586aba337a7 100644
--- a/arch/mips/kernel/stacktrace.c
+++ b/arch/mips/kernel/stacktrace.c
@@ -57,7 +57,7 @@ static void save_context_stack(struct stack_trace *trace,
57 pc = unwind_stack(task, &sp, pc, &ra); 57 pc = unwind_stack(task, &sp, pc, &ra);
58 } while (pc); 58 } while (pc);
59#else 59#else
60 save_raw_context_stack(sp); 60 save_raw_context_stack(trace, sp);
61#endif 61#endif
62} 62}
63 63
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index debe86c2f691..e535f86efa2f 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -11,6 +11,7 @@
11 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/clocksource.h>
14#include <linux/types.h> 15#include <linux/types.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
16#include <linux/init.h> 17#include <linux/init.h>
@@ -67,15 +68,9 @@ int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time;
67int (*rtc_mips_set_mmss)(unsigned long); 68int (*rtc_mips_set_mmss)(unsigned long);
68 69
69 70
70/* usecs per counter cycle, shifted to left by 32 bits */
71static unsigned int sll32_usecs_per_cycle;
72
73/* how many counter cycles in a jiffy */ 71/* how many counter cycles in a jiffy */
74static unsigned long cycles_per_jiffy __read_mostly; 72static unsigned long cycles_per_jiffy __read_mostly;
75 73
76/* Cycle counter value at the previous timer interrupt.. */
77static unsigned int timerhi, timerlo;
78
79/* expirelo is the count value for next CPU timer interrupt */ 74/* expirelo is the count value for next CPU timer interrupt */
80static unsigned int expirelo; 75static unsigned int expirelo;
81 76
@@ -93,7 +88,7 @@ static unsigned int null_hpt_read(void)
93 return 0; 88 return 0;
94} 89}
95 90
96static void null_hpt_init(unsigned int count) 91static void __init null_hpt_init(void)
97{ 92{
98 /* nothing */ 93 /* nothing */
99} 94}
@@ -128,186 +123,18 @@ static unsigned int c0_hpt_read(void)
128 return read_c0_count(); 123 return read_c0_count();
129} 124}
130 125
131/* For use solely as a high precision timer. */
132static void c0_hpt_init(unsigned int count)
133{
134 write_c0_count(read_c0_count() - count);
135}
136
137/* For use both as a high precision timer and an interrupt source. */ 126/* For use both as a high precision timer and an interrupt source. */
138static void c0_hpt_timer_init(unsigned int count) 127static void __init c0_hpt_timer_init(void)
139{ 128{
140 count = read_c0_count() - count; 129 expirelo = read_c0_count() + cycles_per_jiffy;
141 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
142 write_c0_count(expirelo - cycles_per_jiffy);
143 write_c0_compare(expirelo); 130 write_c0_compare(expirelo);
144 write_c0_count(count);
145} 131}
146 132
147int (*mips_timer_state)(void); 133int (*mips_timer_state)(void);
148void (*mips_timer_ack)(void); 134void (*mips_timer_ack)(void);
149unsigned int (*mips_hpt_read)(void); 135unsigned int (*mips_hpt_read)(void);
150void (*mips_hpt_init)(unsigned int); 136void (*mips_hpt_init)(void) __initdata = null_hpt_init;
151 137unsigned int mips_hpt_mask = 0xffffffff;
152/*
153 * Gettimeoffset routines. These routines returns the time duration
154 * since last timer interrupt in usecs.
155 *
156 * If the exact CPU counter frequency is known, use fixed_rate_gettimeoffset.
157 * Otherwise use calibrate_gettimeoffset()
158 *
159 * If the CPU does not have the counter register, you can either supply
160 * your own gettimeoffset() routine, or use null_gettimeoffset(), which
161 * gives the same resolution as HZ.
162 */
163
164static unsigned long null_gettimeoffset(void)
165{
166 return 0;
167}
168
169
170/* The function pointer to one of the gettimeoffset funcs. */
171unsigned long (*do_gettimeoffset)(void) = null_gettimeoffset;
172
173
174static unsigned long fixed_rate_gettimeoffset(void)
175{
176 u32 count;
177 unsigned long res;
178
179 /* Get last timer tick in absolute kernel time */
180 count = mips_hpt_read();
181
182 /* .. relative to previous jiffy (32 bits is enough) */
183 count -= timerlo;
184
185 __asm__("multu %1,%2"
186 : "=h" (res)
187 : "r" (count), "r" (sll32_usecs_per_cycle)
188 : "lo", GCC_REG_ACCUM);
189
190 /*
191 * Due to possible jiffies inconsistencies, we need to check
192 * the result so that we'll get a timer that is monotonic.
193 */
194 if (res >= USECS_PER_JIFFY)
195 res = USECS_PER_JIFFY - 1;
196
197 return res;
198}
199
200
201/*
202 * Cached "1/(clocks per usec) * 2^32" value.
203 * It has to be recalculated once each jiffy.
204 */
205static unsigned long cached_quotient;
206
207/* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
208static unsigned long last_jiffies;
209
210/*
211 * This is moved from dec/time.c:do_ioasic_gettimeoffset() by Maciej.
212 */
213static unsigned long calibrate_div32_gettimeoffset(void)
214{
215 u32 count;
216 unsigned long res, tmp;
217 unsigned long quotient;
218
219 tmp = jiffies;
220
221 quotient = cached_quotient;
222
223 if (last_jiffies != tmp) {
224 last_jiffies = tmp;
225 if (last_jiffies != 0) {
226 unsigned long r0;
227 do_div64_32(r0, timerhi, timerlo, tmp);
228 do_div64_32(quotient, USECS_PER_JIFFY,
229 USECS_PER_JIFFY_FRAC, r0);
230 cached_quotient = quotient;
231 }
232 }
233
234 /* Get last timer tick in absolute kernel time */
235 count = mips_hpt_read();
236
237 /* .. relative to previous jiffy (32 bits is enough) */
238 count -= timerlo;
239
240 __asm__("multu %1,%2"
241 : "=h" (res)
242 : "r" (count), "r" (quotient)
243 : "lo", GCC_REG_ACCUM);
244
245 /*
246 * Due to possible jiffies inconsistencies, we need to check
247 * the result so that we'll get a timer that is monotonic.
248 */
249 if (res >= USECS_PER_JIFFY)
250 res = USECS_PER_JIFFY - 1;
251
252 return res;
253}
254
255static unsigned long calibrate_div64_gettimeoffset(void)
256{
257 u32 count;
258 unsigned long res, tmp;
259 unsigned long quotient;
260
261 tmp = jiffies;
262
263 quotient = cached_quotient;
264
265 if (last_jiffies != tmp) {
266 last_jiffies = tmp;
267 if (last_jiffies) {
268 unsigned long r0;
269 __asm__(".set push\n\t"
270 ".set mips3\n\t"
271 "lwu %0,%3\n\t"
272 "dsll32 %1,%2,0\n\t"
273 "or %1,%1,%0\n\t"
274 "ddivu $0,%1,%4\n\t"
275 "mflo %1\n\t"
276 "dsll32 %0,%5,0\n\t"
277 "or %0,%0,%6\n\t"
278 "ddivu $0,%0,%1\n\t"
279 "mflo %0\n\t"
280 ".set pop"
281 : "=&r" (quotient), "=&r" (r0)
282 : "r" (timerhi), "m" (timerlo),
283 "r" (tmp), "r" (USECS_PER_JIFFY),
284 "r" (USECS_PER_JIFFY_FRAC)
285 : "hi", "lo", GCC_REG_ACCUM);
286 cached_quotient = quotient;
287 }
288 }
289
290 /* Get last timer tick in absolute kernel time */
291 count = mips_hpt_read();
292
293 /* .. relative to previous jiffy (32 bits is enough) */
294 count -= timerlo;
295
296 __asm__("multu %1,%2"
297 : "=h" (res)
298 : "r" (count), "r" (quotient)
299 : "lo", GCC_REG_ACCUM);
300
301 /*
302 * Due to possible jiffies inconsistencies, we need to check
303 * the result so that we'll get a timer that is monotonic.
304 */
305 if (res >= USECS_PER_JIFFY)
306 res = USECS_PER_JIFFY - 1;
307
308 return res;
309}
310
311 138
312/* last time when xtime and rtc are sync'ed up */ 139/* last time when xtime and rtc are sync'ed up */
313static long last_rtc_update; 140static long last_rtc_update;
@@ -334,18 +161,10 @@ void local_timer_interrupt(int irq, void *dev_id)
334 */ 161 */
335irqreturn_t timer_interrupt(int irq, void *dev_id) 162irqreturn_t timer_interrupt(int irq, void *dev_id)
336{ 163{
337 unsigned long j;
338 unsigned int count;
339
340 write_seqlock(&xtime_lock); 164 write_seqlock(&xtime_lock);
341 165
342 count = mips_hpt_read();
343 mips_timer_ack(); 166 mips_timer_ack();
344 167
345 /* Update timerhi/timerlo for intra-jiffy calibration. */
346 timerhi += count < timerlo; /* Wrap around */
347 timerlo = count;
348
349 /* 168 /*
350 * call the generic timer interrupt handling 169 * call the generic timer interrupt handling
351 */ 170 */
@@ -368,47 +187,6 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
368 } 187 }
369 } 188 }
370 189
371 /*
372 * If jiffies has overflown in this timer_interrupt, we must
373 * update the timer[hi]/[lo] to make fast gettimeoffset funcs
374 * quotient calc still valid. -arca
375 *
376 * The first timer interrupt comes late as interrupts are
377 * enabled long after timers are initialized. Therefore the
378 * high precision timer is fast, leading to wrong gettimeoffset()
379 * calculations. We deal with it by setting it based on the
380 * number of its ticks between the second and the third interrupt.
381 * That is still somewhat imprecise, but it's a good estimate.
382 * --macro
383 */
384 j = jiffies;
385 if (j < 4) {
386 static unsigned int prev_count;
387 static int hpt_initialized;
388
389 switch (j) {
390 case 0:
391 timerhi = timerlo = 0;
392 mips_hpt_init(count);
393 break;
394 case 2:
395 prev_count = count;
396 break;
397 case 3:
398 if (!hpt_initialized) {
399 unsigned int c3 = 3 * (count - prev_count);
400
401 timerhi = 0;
402 timerlo = c3;
403 mips_hpt_init(count - c3);
404 hpt_initialized = 1;
405 }
406 break;
407 default:
408 break;
409 }
410 }
411
412 write_sequnlock(&xtime_lock); 190 write_sequnlock(&xtime_lock);
413 191
414 /* 192 /*
@@ -476,12 +254,11 @@ asmlinkage void ll_local_timer_interrupt(int irq)
476 * 1) board_time_init() - 254 * 1) board_time_init() -
477 * a) (optional) set up RTC routines, 255 * a) (optional) set up RTC routines,
478 * b) (optional) calibrate and set the mips_hpt_frequency 256 * b) (optional) calibrate and set the mips_hpt_frequency
479 * (only needed if you intended to use fixed_rate_gettimeoffset 257 * (only needed if you intended to use cpu counter as timer interrupt
480 * or use cpu counter as timer interrupt source) 258 * source)
481 * 2) setup xtime based on rtc_mips_get_time(). 259 * 2) setup xtime based on rtc_mips_get_time().
482 * 3) choose a appropriate gettimeoffset routine. 260 * 3) calculate a couple of cached variables for later usage
483 * 4) calculate a couple of cached variables for later usage 261 * 4) plat_timer_setup() -
484 * 5) plat_timer_setup() -
485 * a) (optional) over-write any choices made above by time_init(). 262 * a) (optional) over-write any choices made above by time_init().
486 * b) machine specific code should setup the timer irqaction. 263 * b) machine specific code should setup the timer irqaction.
487 * c) enable the timer interrupt 264 * c) enable the timer interrupt
@@ -533,13 +310,48 @@ static unsigned int __init calibrate_hpt(void)
533 } while (--i); 310 } while (--i);
534 hpt_end = mips_hpt_read(); 311 hpt_end = mips_hpt_read();
535 312
536 hpt_count = hpt_end - hpt_start; 313 hpt_count = (hpt_end - hpt_start) & mips_hpt_mask;
537 hz = HZ; 314 hz = HZ;
538 frequency = (u64)hpt_count * (u64)hz; 315 frequency = (u64)hpt_count * (u64)hz;
539 316
540 return frequency >> log_2_loops; 317 return frequency >> log_2_loops;
541} 318}
542 319
320static cycle_t read_mips_hpt(void)
321{
322 return (cycle_t)mips_hpt_read();
323}
324
325static struct clocksource clocksource_mips = {
326 .name = "MIPS",
327 .read = read_mips_hpt,
328 .is_continuous = 1,
329};
330
331static void __init init_mips_clocksource(void)
332{
333 u64 temp;
334 u32 shift;
335
336 if (!mips_hpt_frequency || mips_hpt_read == null_hpt_read)
337 return;
338
339 /* Calclate a somewhat reasonable rating value */
340 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
341 /* Find a shift value */
342 for (shift = 32; shift > 0; shift--) {
343 temp = (u64) NSEC_PER_SEC << shift;
344 do_div(temp, mips_hpt_frequency);
345 if ((temp >> 32) == 0)
346 break;
347 }
348 clocksource_mips.shift = shift;
349 clocksource_mips.mult = (u32)temp;
350 clocksource_mips.mask = mips_hpt_mask;
351
352 clocksource_register(&clocksource_mips);
353}
354
543void __init time_init(void) 355void __init time_init(void)
544{ 356{
545 if (board_time_init) 357 if (board_time_init)
@@ -555,41 +367,21 @@ void __init time_init(void)
555 -xtime.tv_sec, -xtime.tv_nsec); 367 -xtime.tv_sec, -xtime.tv_nsec);
556 368
557 /* Choose appropriate high precision timer routines. */ 369 /* Choose appropriate high precision timer routines. */
558 if (!cpu_has_counter && !mips_hpt_read) { 370 if (!cpu_has_counter && !mips_hpt_read)
559 /* No high precision timer -- sorry. */ 371 /* No high precision timer -- sorry. */
560 mips_hpt_read = null_hpt_read; 372 mips_hpt_read = null_hpt_read;
561 mips_hpt_init = null_hpt_init; 373 else if (!mips_hpt_frequency && !mips_timer_state) {
562 } else if (!mips_hpt_frequency && !mips_timer_state) {
563 /* A high precision timer of unknown frequency. */ 374 /* A high precision timer of unknown frequency. */
564 if (!mips_hpt_read) { 375 if (!mips_hpt_read)
565 /* No external high precision timer -- use R4k. */ 376 /* No external high precision timer -- use R4k. */
566 mips_hpt_read = c0_hpt_read; 377 mips_hpt_read = c0_hpt_read;
567 mips_hpt_init = c0_hpt_init;
568 }
569
570 if (cpu_has_mips32r1 || cpu_has_mips32r2 ||
571 (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
572 (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
573 /*
574 * We need to calibrate the counter but we don't have
575 * 64-bit division.
576 */
577 do_gettimeoffset = calibrate_div32_gettimeoffset;
578 else
579 /*
580 * We need to calibrate the counter but we *do* have
581 * 64-bit division.
582 */
583 do_gettimeoffset = calibrate_div64_gettimeoffset;
584 } else { 378 } else {
585 /* We know counter frequency. Or we can get it. */ 379 /* We know counter frequency. Or we can get it. */
586 if (!mips_hpt_read) { 380 if (!mips_hpt_read) {
587 /* No external high precision timer -- use R4k. */ 381 /* No external high precision timer -- use R4k. */
588 mips_hpt_read = c0_hpt_read; 382 mips_hpt_read = c0_hpt_read;
589 383
590 if (mips_timer_state) 384 if (!mips_timer_state) {
591 mips_hpt_init = c0_hpt_init;
592 else {
593 /* No external timer interrupt -- use R4k. */ 385 /* No external timer interrupt -- use R4k. */
594 mips_hpt_init = c0_hpt_timer_init; 386 mips_hpt_init = c0_hpt_timer_init;
595 mips_timer_ack = c0_timer_ack; 387 mips_timer_ack = c0_timer_ack;
@@ -598,16 +390,9 @@ void __init time_init(void)
598 if (!mips_hpt_frequency) 390 if (!mips_hpt_frequency)
599 mips_hpt_frequency = calibrate_hpt(); 391 mips_hpt_frequency = calibrate_hpt();
600 392
601 do_gettimeoffset = fixed_rate_gettimeoffset;
602
603 /* Calculate cache parameters. */ 393 /* Calculate cache parameters. */
604 cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ; 394 cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;
605 395
606 /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */
607 do_div64_32(sll32_usecs_per_cycle,
608 1000000, mips_hpt_frequency / 2,
609 mips_hpt_frequency);
610
611 /* Report the high precision timer rate for a reference. */ 396 /* Report the high precision timer rate for a reference. */
612 printk("Using %u.%03u MHz high precision timer.\n", 397 printk("Using %u.%03u MHz high precision timer.\n",
613 ((mips_hpt_frequency + 500) / 1000) / 1000, 398 ((mips_hpt_frequency + 500) / 1000) / 1000,
@@ -619,7 +404,7 @@ void __init time_init(void)
619 mips_timer_ack = null_timer_ack; 404 mips_timer_ack = null_timer_ack;
620 405
621 /* This sets up the high precision timer for the first interrupt. */ 406 /* This sets up the high precision timer for the first interrupt. */
622 mips_hpt_init(mips_hpt_read()); 407 mips_hpt_init();
623 408
624 /* 409 /*
625 * Call board specific timer interrupt setup. 410 * Call board specific timer interrupt setup.
@@ -633,6 +418,8 @@ void __init time_init(void)
633 * is not invoked accidentally. 418 * is not invoked accidentally.
634 */ 419 */
635 plat_timer_setup(&timer_irqaction); 420 plat_timer_setup(&timer_irqaction);
421
422 init_mips_clocksource();
636} 423}
637 424
638#define FEBRUARY 2 425#define FEBRUARY 2
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index cce8313ec27d..9fda1b8be3a7 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1111,7 +1111,7 @@ static struct shadow_registers {
1111static void mips_srs_init(void) 1111static void mips_srs_init(void)
1112{ 1112{
1113 shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1; 1113 shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
1114 printk(KERN_INFO "%d MIPSR2 register sets available\n", 1114 printk(KERN_INFO "%ld MIPSR2 register sets available\n",
1115 shadow_registers.sr_supported); 1115 shadow_registers.sr_supported);
1116 shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */ 1116 shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */
1117} 1117}
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 0bb9cd889456..79f0317d84ac 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -50,6 +50,16 @@ SECTIONS
50 /* writeable */ 50 /* writeable */
51 .data : { /* Data */ 51 .data : { /* Data */
52 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 52 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
53 /*
54 * This ALIGN is needed as a workaround for a bug a gcc bug upto 4.1 which
55 * limits the maximum alignment to at most 32kB and results in the following
56 * warning:
57 *
58 * CC arch/mips/kernel/init_task.o
59 * arch/mips/kernel/init_task.c:30: warning: alignment of ‘init_thread_union’
60 * is greater than maximum object file alignment. Using 32768
61 */
62 . = ALIGN(_PAGE_SIZE);
53 *(.data.init_task) 63 *(.data.init_task)
54 64
55 *(.data) 65 *(.data)
@@ -91,13 +101,7 @@ SECTIONS
91 101
92 __initcall_start = .; 102 __initcall_start = .;
93 .initcall.init : { 103 .initcall.init : {
94 *(.initcall1.init) 104 INITCALLS
95 *(.initcall2.init)
96 *(.initcall3.init)
97 *(.initcall4.init)
98 *(.initcall5.init)
99 *(.initcall6.init)
100 *(.initcall7.init)
101 } 105 }
102 __initcall_end = .; 106 __initcall_end = .;
103 107
diff --git a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c
index be8261be679b..594df1a05ecc 100644
--- a/arch/mips/lib-64/dump_tlb.c
+++ b/arch/mips/lib-64/dump_tlb.c
@@ -149,7 +149,7 @@ void dump_list_process(struct task_struct *t, void *address)
149 printk("Addr == %08lx\n", addr); 149 printk("Addr == %08lx\n", addr);
150 printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd); 150 printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd);
151 151
152 page_dir = pgd_offset(t->mm, 0); 152 page_dir = pgd_offset(t->mm, 0UL);
153 printk("page_dir == %016lx\n", (unsigned long) page_dir); 153 printk("page_dir == %016lx\n", (unsigned long) page_dir);
154 154
155 pgd = pgd_offset(t->mm, addr); 155 pgd = pgd_offset(t->mm, addr);
@@ -184,13 +184,13 @@ void dump_list_current(void *address)
184 dump_list_process(current, address); 184 dump_list_process(current, address);
185} 185}
186 186
187unsigned int vtop(void *address) 187unsigned long vtop(void *address)
188{ 188{
189 pgd_t *pgd; 189 pgd_t *pgd;
190 pud_t *pud; 190 pud_t *pud;
191 pmd_t *pmd; 191 pmd_t *pmd;
192 pte_t *pte; 192 pte_t *pte;
193 unsigned int addr, paddr; 193 unsigned long addr, paddr;
194 194
195 addr = (unsigned long) address; 195 addr = (unsigned long) address;
196 pgd = pgd_offset(current->mm, addr); 196 pgd = pgd_offset(current->mm, addr);
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index be80c5dd4a0c..eeed944e0f83 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -176,7 +176,7 @@ unsigned long __init prom_free_prom_memory(void)
176 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) 176 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
177 continue; 177 continue;
178 178
179 addr = boot_mem_map.map[i].addr; 179 addr = PAGE_ALIGN(boot_mem_map.map[i].addr);
180 while (addr < boot_mem_map.map[i].addr 180 while (addr < boot_mem_map.map[i].addr
181 + boot_mem_map.map[i].size) { 181 + boot_mem_map.map[i].size) {
182 ClearPageReserved(virt_to_page(__va(addr))); 182 ClearPageReserved(virt_to_page(__va(addr)));
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index 9337f6c8873a..3192a14698c8 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -90,7 +90,7 @@ static struct pci_controller msc_controller = {
90void __init mips_pcibios_init(void) 90void __init mips_pcibios_init(void)
91{ 91{
92 struct pci_controller *controller; 92 struct pci_controller *controller;
93 unsigned long start, end, map, start1, end1, map1, map2, map3, mask; 93 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask;
94 94
95 switch (mips_revision_corid) { 95 switch (mips_revision_corid) {
96 case MIPS_REVISION_CORID_QED_RM5261: 96 case MIPS_REVISION_CORID_QED_RM5261:
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 6f8a9fe7c1e3..d817c60c5ca5 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -187,7 +187,7 @@ out:
187} 187}
188 188
189/* 189/*
190 * Estimate CPU frequency. Sets mips_counter_frequency as a side-effect 190 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
191 */ 191 */
192static unsigned int __init estimate_cpu_frequency(void) 192static unsigned int __init estimate_cpu_frequency(void)
193{ 193{
@@ -208,7 +208,8 @@ static unsigned int __init estimate_cpu_frequency(void)
208 count = 6000000; 208 count = 6000000;
209#endif 209#endif
210#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) 210#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
211 unsigned int flags; 211 unsigned long flags;
212 unsigned int start;
212 213
213 local_irq_save(flags); 214 local_irq_save(flags);
214 215
@@ -217,13 +218,13 @@ static unsigned int __init estimate_cpu_frequency(void)
217 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); 218 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
218 219
219 /* Start r4k counter. */ 220 /* Start r4k counter. */
220 write_c0_count(0); 221 start = read_c0_count();
221 222
222 /* Read counter exactly on falling edge of update flag */ 223 /* Read counter exactly on falling edge of update flag */
223 while (CMOS_READ(RTC_REG_A) & RTC_UIP); 224 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
224 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); 225 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
225 226
226 count = read_c0_count(); 227 count = read_c0_count() - start;
227 228
228 /* restore interrupts */ 229 /* restore interrupts */
229 local_irq_restore(flags); 230 local_irq_restore(flags);
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index 6244d0e2c7de..90ad5bf3e2f1 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -32,6 +32,7 @@
32#include <asm/i8259.h> 32#include <asm/i8259.h>
33#include <asm/irq_cpu.h> 33#include <asm/irq_cpu.h>
34#include <asm/io.h> 34#include <asm/io.h>
35#include <asm/irq_regs.h>
35#include <asm/mips-boards/malta.h> 36#include <asm/mips-boards/malta.h>
36#include <asm/mips-boards/maltaint.h> 37#include <asm/mips-boards/maltaint.h>
37#include <asm/mips-boards/piix4.h> 38#include <asm/mips-boards/piix4.h>
@@ -131,7 +132,7 @@ static void corehi_irqdispatch(void)
131 unsigned int intedge, intsteer, pcicmd, pcibadaddr; 132 unsigned int intedge, intsteer, pcicmd, pcibadaddr;
132 unsigned int pcimstat, intisr, inten, intpol; 133 unsigned int pcimstat, intisr, inten, intpol;
133 unsigned int intrcause,datalo,datahi; 134 unsigned int intrcause,datalo,datahi;
134 struct pt_regs *regs; 135 struct pt_regs *regs = get_irq_regs();
135 136
136 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n"); 137 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n");
137 printk("epc : %08lx\nStatus: %08lx\n" 138 printk("epc : %08lx\nStatus: %08lx\n"
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index c566b9bd0427..24a4ed00cc0a 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -102,7 +102,7 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id)
102 102
103 103
104/* 104/*
105 * Estimate CPU frequency. Sets mips_counter_frequency as a side-effect 105 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
106 */ 106 */
107static unsigned int __init estimate_cpu_frequency(void) 107static unsigned int __init estimate_cpu_frequency(void)
108{ 108{
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index 5537558f19f7..d0ddb4a768a5 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -49,6 +49,15 @@ static unsigned short dcache_sets;
49static unsigned int icache_range_cutoff; 49static unsigned int icache_range_cutoff;
50static unsigned int dcache_range_cutoff; 50static unsigned int dcache_range_cutoff;
51 51
52static inline void sb1_on_each_cpu(void (*func) (void *info), void *info,
53 int retry, int wait)
54{
55 preempt_disable();
56 smp_call_function(func, info, retry, wait);
57 func(info);
58 preempt_enable();
59}
60
52/* 61/*
53 * The dcache is fully coherent to the system, with one 62 * The dcache is fully coherent to the system, with one
54 * big caveat: the instruction stream. In other words, 63 * big caveat: the instruction stream. In other words,
@@ -226,7 +235,7 @@ static void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr,
226 args.vma = vma; 235 args.vma = vma;
227 args.addr = addr; 236 args.addr = addr;
228 args.pfn = pfn; 237 args.pfn = pfn;
229 on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1); 238 sb1_on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
230} 239}
231#else 240#else
232void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn) 241void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
@@ -249,7 +258,7 @@ void sb1___flush_cache_all_ipi(void *ignored)
249 258
250static void sb1___flush_cache_all(void) 259static void sb1___flush_cache_all(void)
251{ 260{
252 on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1); 261 sb1_on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1);
253} 262}
254#else 263#else
255void sb1___flush_cache_all(void) 264void sb1___flush_cache_all(void)
@@ -299,7 +308,7 @@ void sb1_flush_icache_range(unsigned long start, unsigned long end)
299 308
300 args.start = start; 309 args.start = start;
301 args.end = end; 310 args.end = end;
302 on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1); 311 sb1_on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1);
303} 312}
304#else 313#else
305void sb1_flush_icache_range(unsigned long start, unsigned long end) 314void sb1_flush_icache_range(unsigned long start, unsigned long end)
@@ -326,7 +335,7 @@ static void sb1_flush_cache_sigtramp_ipi(void *info)
326 335
327static void sb1_flush_cache_sigtramp(unsigned long addr) 336static void sb1_flush_cache_sigtramp(unsigned long addr)
328{ 337{
329 on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1); 338 sb1_on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
330} 339}
331#else 340#else
332void sb1_flush_cache_sigtramp(unsigned long addr) 341void sb1_flush_cache_sigtramp(unsigned long addr)
@@ -444,7 +453,6 @@ static __init void probe_cache_sizes(void)
444void sb1_cache_init(void) 453void sb1_cache_init(void)
445{ 454{
446 extern char except_vec2_sb1; 455 extern char except_vec2_sb1;
447 extern char handle_vec2_sb1;
448 456
449 /* Special cache error handler for SB1 */ 457 /* Special cache error handler for SB1 */
450 set_uncached_handler (0x100, &except_vec2_sb1, 0x80); 458 set_uncached_handler (0x100, &except_vec2_sb1, 0x80);
@@ -497,5 +505,5 @@ void sb1_cache_init(void)
497 : 505 :
498 : "memory"); 506 : "memory");
499 507
500 flush_cache_all(); 508 local_sb1___flush_cache_all();
501} 509}
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 88b72c9a8495..2de4d3c367a2 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -30,11 +30,34 @@
30#include <asm/cachectl.h> 30#include <asm/cachectl.h>
31#include <asm/cpu.h> 31#include <asm/cpu.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33#include <asm/kmap_types.h>
33#include <asm/mmu_context.h> 34#include <asm/mmu_context.h>
34#include <asm/sections.h> 35#include <asm/sections.h>
35#include <asm/pgtable.h> 36#include <asm/pgtable.h>
36#include <asm/pgalloc.h> 37#include <asm/pgalloc.h>
37#include <asm/tlb.h> 38#include <asm/tlb.h>
39#include <asm/fixmap.h>
40
41/* Atomicity and interruptability */
42#ifdef CONFIG_MIPS_MT_SMTC
43
44#include <asm/mipsmtregs.h>
45
46#define ENTER_CRITICAL(flags) \
47 { \
48 unsigned int mvpflags; \
49 local_irq_save(flags);\
50 mvpflags = dvpe()
51#define EXIT_CRITICAL(flags) \
52 evpe(mvpflags); \
53 local_irq_restore(flags); \
54 }
55#else
56
57#define ENTER_CRITICAL(flags) local_irq_save(flags)
58#define EXIT_CRITICAL(flags) local_irq_restore(flags)
59
60#endif /* CONFIG_MIPS_MT_SMTC */
38 61
39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 62DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
40 63
@@ -80,13 +103,142 @@ unsigned long setup_zero_pages(void)
80 return 1UL << order; 103 return 1UL << order;
81} 104}
82 105
83#ifdef CONFIG_HIGHMEM 106/*
84pte_t *kmap_pte; 107 * These are almost like kmap_atomic / kunmap_atmic except they take an
85pgprot_t kmap_prot; 108 * additional address argument as the hint.
109 */
86 110
87#define kmap_get_fixmap_pte(vaddr) \ 111#define kmap_get_fixmap_pte(vaddr) \
88 pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr)) 112 pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
89 113
114#ifdef CONFIG_MIPS_MT_SMTC
115static pte_t *kmap_coherent_pte;
116static void __init kmap_coherent_init(void)
117{
118 unsigned long vaddr;
119
120 /* cache the first coherent kmap pte */
121 vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
122 kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
123}
124#else
125static inline void kmap_coherent_init(void) {}
126#endif
127
128static inline void *kmap_coherent(struct page *page, unsigned long addr)
129{
130 enum fixed_addresses idx;
131 unsigned long vaddr, flags, entrylo;
132 unsigned long old_ctx;
133 pte_t pte;
134 int tlbidx;
135
136 inc_preempt_count();
137 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
138#ifdef CONFIG_MIPS_MT_SMTC
139 idx += FIX_N_COLOURS * smp_processor_id();
140#endif
141 vaddr = __fix_to_virt(FIX_CMAP_END - idx);
142 pte = mk_pte(page, PAGE_KERNEL);
143#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
144 entrylo = pte.pte_high;
145#else
146 entrylo = pte_val(pte) >> 6;
147#endif
148
149 ENTER_CRITICAL(flags);
150 old_ctx = read_c0_entryhi();
151 write_c0_entryhi(vaddr & (PAGE_MASK << 1));
152 write_c0_entrylo0(entrylo);
153 write_c0_entrylo1(entrylo);
154#ifdef CONFIG_MIPS_MT_SMTC
155 set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte);
156 /* preload TLB instead of local_flush_tlb_one() */
157 mtc0_tlbw_hazard();
158 tlb_probe();
159 tlb_probe_hazard();
160 tlbidx = read_c0_index();
161 mtc0_tlbw_hazard();
162 if (tlbidx < 0)
163 tlb_write_random();
164 else
165 tlb_write_indexed();
166#else
167 tlbidx = read_c0_wired();
168 write_c0_wired(tlbidx + 1);
169 write_c0_index(tlbidx);
170 mtc0_tlbw_hazard();
171 tlb_write_indexed();
172#endif
173 tlbw_use_hazard();
174 write_c0_entryhi(old_ctx);
175 EXIT_CRITICAL(flags);
176
177 return (void*) vaddr;
178}
179
180#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
181
182static inline void kunmap_coherent(struct page *page)
183{
184#ifndef CONFIG_MIPS_MT_SMTC
185 unsigned int wired;
186 unsigned long flags, old_ctx;
187
188 ENTER_CRITICAL(flags);
189 old_ctx = read_c0_entryhi();
190 wired = read_c0_wired() - 1;
191 write_c0_wired(wired);
192 write_c0_index(wired);
193 write_c0_entryhi(UNIQUE_ENTRYHI(wired));
194 write_c0_entrylo0(0);
195 write_c0_entrylo1(0);
196 mtc0_tlbw_hazard();
197 tlb_write_indexed();
198 tlbw_use_hazard();
199 write_c0_entryhi(old_ctx);
200 EXIT_CRITICAL(flags);
201#endif
202 dec_preempt_count();
203 preempt_check_resched();
204}
205
206void copy_to_user_page(struct vm_area_struct *vma,
207 struct page *page, unsigned long vaddr, void *dst, const void *src,
208 unsigned long len)
209{
210 if (cpu_has_dc_aliases) {
211 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
212 memcpy(vto, src, len);
213 kunmap_coherent(page);
214 } else
215 memcpy(dst, src, len);
216 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
217 flush_cache_page(vma, vaddr, page_to_pfn(page));
218}
219
220EXPORT_SYMBOL(copy_to_user_page);
221
222void copy_from_user_page(struct vm_area_struct *vma,
223 struct page *page, unsigned long vaddr, void *dst, const void *src,
224 unsigned long len)
225{
226 if (cpu_has_dc_aliases) {
227 void *vfrom =
228 kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
229 memcpy(dst, vfrom, len);
230 kunmap_coherent(page);
231 } else
232 memcpy(dst, src, len);
233}
234
235EXPORT_SYMBOL(copy_from_user_page);
236
237
238#ifdef CONFIG_HIGHMEM
239pte_t *kmap_pte;
240pgprot_t kmap_prot;
241
90static void __init kmap_init(void) 242static void __init kmap_init(void)
91{ 243{
92 unsigned long kmap_vstart; 244 unsigned long kmap_vstart;
@@ -97,11 +249,12 @@ static void __init kmap_init(void)
97 249
98 kmap_prot = PAGE_KERNEL; 250 kmap_prot = PAGE_KERNEL;
99} 251}
252#endif /* CONFIG_HIGHMEM */
100 253
101#ifdef CONFIG_32BIT
102void __init fixrange_init(unsigned long start, unsigned long end, 254void __init fixrange_init(unsigned long start, unsigned long end,
103 pgd_t *pgd_base) 255 pgd_t *pgd_base)
104{ 256{
257#if defined(CONFIG_HIGHMEM) || defined(CONFIG_MIPS_MT_SMTC)
105 pgd_t *pgd; 258 pgd_t *pgd;
106 pud_t *pud; 259 pud_t *pud;
107 pmd_t *pmd; 260 pmd_t *pmd;
@@ -122,7 +275,7 @@ void __init fixrange_init(unsigned long start, unsigned long end,
122 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { 275 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
123 if (pmd_none(*pmd)) { 276 if (pmd_none(*pmd)) {
124 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 277 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
125 set_pmd(pmd, __pmd(pte)); 278 set_pmd(pmd, __pmd((unsigned long)pte));
126 if (pte != pte_offset_kernel(pmd, 0)) 279 if (pte != pte_offset_kernel(pmd, 0))
127 BUG(); 280 BUG();
128 } 281 }
@@ -132,9 +285,8 @@ void __init fixrange_init(unsigned long start, unsigned long end,
132 } 285 }
133 j = 0; 286 j = 0;
134 } 287 }
288#endif
135} 289}
136#endif /* CONFIG_32BIT */
137#endif /* CONFIG_HIGHMEM */
138 290
139#ifndef CONFIG_NEED_MULTIPLE_NODES 291#ifndef CONFIG_NEED_MULTIPLE_NODES
140extern void pagetable_init(void); 292extern void pagetable_init(void);
@@ -175,6 +327,7 @@ void __init paging_init(void)
175#ifdef CONFIG_HIGHMEM 327#ifdef CONFIG_HIGHMEM
176 kmap_init(); 328 kmap_init();
177#endif 329#endif
330 kmap_coherent_init();
178 331
179 max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT; 332 max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
180 low = max_low_pfn; 333 low = max_low_pfn;
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index 3101d1db5592..cea7d0ea36e4 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -176,7 +176,7 @@ void __iomem * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
176 176
177#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) 177#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
178 178
179void __iounmap(volatile void __iomem *addr) 179void __iounmap(const volatile void __iomem *addr)
180{ 180{
181 struct vm_struct *p; 181 struct vm_struct *p;
182 182
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index b7c749232ffe..d41fc5885e87 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -270,6 +270,20 @@ static inline void build_addiu_a2_a0(unsigned long offset)
270 emit_instruction(mi); 270 emit_instruction(mi);
271} 271}
272 272
273static inline void build_addiu_a2(unsigned long offset)
274{
275 union mips_instruction mi;
276
277 BUG_ON(offset > 0x7fff);
278
279 mi.i_format.opcode = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op;
280 mi.i_format.rs = 6; /* $a2 */
281 mi.i_format.rt = 6; /* $a2 */
282 mi.i_format.simmediate = offset;
283
284 emit_instruction(mi);
285}
286
273static inline void build_addiu_a1(unsigned long offset) 287static inline void build_addiu_a1(unsigned long offset)
274{ 288{
275 union mips_instruction mi; 289 union mips_instruction mi;
@@ -333,6 +347,7 @@ static inline void build_jr_ra(void)
333void __init build_clear_page(void) 347void __init build_clear_page(void)
334{ 348{
335 unsigned int loop_start; 349 unsigned int loop_start;
350 unsigned long off;
336 351
337 epc = (unsigned int *) &clear_page_array; 352 epc = (unsigned int *) &clear_page_array;
338 instruction_pending = 0; 353 instruction_pending = 0;
@@ -369,7 +384,12 @@ void __init build_clear_page(void)
369 } 384 }
370 } 385 }
371 386
372 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0)); 387 off = PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0);
388 if (off > 0x7fff) {
389 build_addiu_a2_a0(off >> 1);
390 build_addiu_a2(off >> 1);
391 } else
392 build_addiu_a2_a0(off);
373 393
374 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 394 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
375 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ 395 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
@@ -420,12 +440,18 @@ dest = label();
420void __init build_copy_page(void) 440void __init build_copy_page(void)
421{ 441{
422 unsigned int loop_start; 442 unsigned int loop_start;
443 unsigned long off;
423 444
424 epc = (unsigned int *) &copy_page_array; 445 epc = (unsigned int *) &copy_page_array;
425 store_offset = load_offset = 0; 446 store_offset = load_offset = 0;
426 instruction_pending = 0; 447 instruction_pending = 0;
427 448
428 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0)); 449 off = PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0);
450 if (off > 0x7fff) {
451 build_addiu_a2_a0(off >> 1);
452 build_addiu_a2(off >> 1);
453 } else
454 build_addiu_a2_a0(off);
429 455
430 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 456 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
431 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ 457 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
index 4bdaa05f485b..4a61e624b0ec 100644
--- a/arch/mips/mm/pgtable-32.c
+++ b/arch/mips/mm/pgtable-32.c
@@ -31,9 +31,10 @@ void pgd_init(unsigned long page)
31 31
32void __init pagetable_init(void) 32void __init pagetable_init(void)
33{ 33{
34#ifdef CONFIG_HIGHMEM
35 unsigned long vaddr; 34 unsigned long vaddr;
36 pgd_t *pgd, *pgd_base; 35 pgd_t *pgd_base;
36#ifdef CONFIG_HIGHMEM
37 pgd_t *pgd;
37 pud_t *pud; 38 pud_t *pud;
38 pmd_t *pmd; 39 pmd_t *pmd;
39 pte_t *pte; 40 pte_t *pte;
@@ -44,7 +45,6 @@ void __init pagetable_init(void)
44 pgd_init((unsigned long)swapper_pg_dir 45 pgd_init((unsigned long)swapper_pg_dir
45 + sizeof(pgd_t) * USER_PTRS_PER_PGD); 46 + sizeof(pgd_t) * USER_PTRS_PER_PGD);
46 47
47#ifdef CONFIG_HIGHMEM
48 pgd_base = swapper_pg_dir; 48 pgd_base = swapper_pg_dir;
49 49
50 /* 50 /*
@@ -53,6 +53,7 @@ void __init pagetable_init(void)
53 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; 53 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
54 fixrange_init(vaddr, 0, pgd_base); 54 fixrange_init(vaddr, 0, pgd_base);
55 55
56#ifdef CONFIG_HIGHMEM
56 /* 57 /*
57 * Permanent kmaps: 58 * Permanent kmaps:
58 */ 59 */
diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c
index 44b5e97fff65..8d600d307d5d 100644
--- a/arch/mips/mm/pgtable-64.c
+++ b/arch/mips/mm/pgtable-64.c
@@ -8,6 +8,7 @@
8 */ 8 */
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <asm/fixmap.h>
11#include <asm/pgtable.h> 12#include <asm/pgtable.h>
12 13
13void pgd_init(unsigned long page) 14void pgd_init(unsigned long page)
@@ -52,7 +53,17 @@ void pmd_init(unsigned long addr, unsigned long pagetable)
52 53
53void __init pagetable_init(void) 54void __init pagetable_init(void)
54{ 55{
56 unsigned long vaddr;
57 pgd_t *pgd_base;
58
55 /* Initialize the entire pgd. */ 59 /* Initialize the entire pgd. */
56 pgd_init((unsigned long)swapper_pg_dir); 60 pgd_init((unsigned long)swapper_pg_dir);
57 pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table); 61 pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
62
63 pgd_base = swapper_pg_dir;
64 /*
65 * Fixed mappings:
66 */
67 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
68 fixrange_init(vaddr, 0, pgd_base);
58} 69}
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 6f8b25cfa6f0..fec318a1c8c5 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -102,7 +102,7 @@ enum opcode {
102 insn_addu, insn_addiu, insn_and, insn_andi, insn_beq, 102 insn_addu, insn_addiu, insn_and, insn_andi, insn_beq,
103 insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl, 103 insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl,
104 insn_bne, insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0, 104 insn_bne, insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0,
105 insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, 105 insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32,
106 insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld, 106 insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld,
107 insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0, 107 insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0,
108 insn_ori, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll, 108 insn_ori, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll,
@@ -145,6 +145,7 @@ static __initdata struct insn insn_table[] = {
145 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE }, 145 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE },
146 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE }, 146 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE },
147 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE }, 147 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE },
148 { insn_dsrl32, M(spec_op,0,0,0,0,dsrl32_op), RT | RD | RE },
148 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD }, 149 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD },
149 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 }, 150 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 },
150 { insn_j, M(j_op,0,0,0,0,0), JIMM }, 151 { insn_j, M(j_op,0,0,0,0,0), JIMM },
@@ -385,6 +386,7 @@ I_u2u1u3(_dsll);
385I_u2u1u3(_dsll32); 386I_u2u1u3(_dsll32);
386I_u2u1u3(_dsra); 387I_u2u1u3(_dsra);
387I_u2u1u3(_dsrl); 388I_u2u1u3(_dsrl);
389I_u2u1u3(_dsrl32);
388I_u3u1u2(_dsubu); 390I_u3u1u2(_dsubu);
389I_0(_eret); 391I_0(_eret);
390I_u1(_j); 392I_u1(_j);
@@ -996,7 +998,12 @@ build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
996#endif 998#endif
997 999
998 l_vmalloc_done(l, *p); 1000 l_vmalloc_done(l, *p);
999 i_dsrl(p, tmp, tmp, PGDIR_SHIFT-3); /* get pgd offset in bytes */ 1001
1002 if (PGDIR_SHIFT - 3 < 32) /* get pgd offset in bytes */
1003 i_dsrl(p, tmp, tmp, PGDIR_SHIFT-3);
1004 else
1005 i_dsrl32(p, tmp, tmp, PGDIR_SHIFT - 3 - 32);
1006
1000 i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3); 1007 i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3);
1001 i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */ 1008 i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */
1002 i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */ 1009 i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1073,7 +1080,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1073 1080
1074static __init void build_adjust_context(u32 **p, unsigned int ctx) 1081static __init void build_adjust_context(u32 **p, unsigned int ctx)
1075{ 1082{
1076 unsigned int shift = 4 - (PTE_T_LOG2 + 1); 1083 unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12;
1077 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1); 1084 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1);
1078 1085
1079 switch (current_cpu_data.cputype) { 1086 switch (current_cpu_data.cputype) {
diff --git a/arch/mips/momentum/ocelot_3/Makefile b/arch/mips/momentum/ocelot_3/Makefile
index 8bcea64dd27b..d5a090a85a15 100644
--- a/arch/mips/momentum/ocelot_3/Makefile
+++ b/arch/mips/momentum/ocelot_3/Makefile
@@ -5,4 +5,4 @@
5# removes any old dependencies. DON'T put your own dependencies here 5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file). 6# unless it's something special (ie not a .c file).
7# 7#
8obj-y += irq.o prom.o reset.o setup.o 8obj-y += irq.o platform.o prom.o reset.o setup.o
diff --git a/arch/mips/momentum/ocelot_3/ocelot_3_fpga.h b/arch/mips/momentum/ocelot_3/ocelot_3_fpga.h
index 227e429fe720..5710a9029f1c 100644
--- a/arch/mips/momentum/ocelot_3/ocelot_3_fpga.h
+++ b/arch/mips/momentum/ocelot_3/ocelot_3_fpga.h
@@ -51,7 +51,9 @@
51 51
52extern unsigned long ocelot_fpga_base; 52extern unsigned long ocelot_fpga_base;
53 53
54#define OCELOT_FPGA_WRITE(x, y) writeb(x, ocelot_fpga_base + OCELOT_3_REG_##y) 54#define __FPGA_REG_TO_ADDR(reg) \
55#define OCELOT_FPGA_READ(x) readb(ocelot_fpga_base + OCELOT_3_REG_##x) 55 ((void *) ocelot_fpga_base + OCELOT_3_REG_##reg)
56#define OCELOT_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg))
57#define OCELOT_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg))
56 58
57#endif 59#endif
diff --git a/arch/mips/momentum/ocelot_3/platform.c b/arch/mips/momentum/ocelot_3/platform.c
new file mode 100644
index 000000000000..eefe5841fbb2
--- /dev/null
+++ b/arch/mips/momentum/ocelot_3/platform.c
@@ -0,0 +1,235 @@
1#include <linux/delay.h>
2#include <linux/if_ether.h>
3#include <linux/ioport.h>
4#include <linux/mv643xx.h>
5#include <linux/platform_device.h>
6
7#include "ocelot_3_fpga.h"
8
9#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
10
11static struct resource mv643xx_eth_shared_resources[] = {
12 [0] = {
13 .name = "ethernet shared base",
14 .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
15 .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
16 MV643XX_ETH_SHARED_REGS_SIZE - 1,
17 .flags = IORESOURCE_MEM,
18 },
19};
20
21static struct platform_device mv643xx_eth_shared_device = {
22 .name = MV643XX_ETH_SHARED_NAME,
23 .id = 0,
24 .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
25 .resource = mv643xx_eth_shared_resources,
26};
27
28#define MV_SRAM_BASE 0xfe000000UL
29#define MV_SRAM_SIZE (256 * 1024)
30
31#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
32#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
33
34#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
35#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
36
37#define MV64x60_IRQ_ETH_0 48
38#define MV64x60_IRQ_ETH_1 49
39#define MV64x60_IRQ_ETH_2 50
40
41#ifdef CONFIG_MV643XX_ETH_0
42
43static struct resource mv64x60_eth0_resources[] = {
44 [0] = {
45 .name = "eth0 irq",
46 .start = MV64x60_IRQ_ETH_0,
47 .end = MV64x60_IRQ_ETH_0,
48 .flags = IORESOURCE_IRQ,
49 },
50};
51
52static char eth0_mac_addr[ETH_ALEN];
53
54static struct mv643xx_eth_platform_data eth0_pd = {
55 .mac_addr = eth0_mac_addr,
56
57 .tx_sram_addr = MV_SRAM_BASE_ETH0,
58 .tx_sram_size = MV_SRAM_TXRING_SIZE,
59 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
60
61 .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
62 .rx_sram_size = MV_SRAM_RXRING_SIZE,
63 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
64};
65
66static struct platform_device eth0_device = {
67 .name = MV643XX_ETH_NAME,
68 .id = 0,
69 .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
70 .resource = mv64x60_eth0_resources,
71 .dev = {
72 .platform_data = &eth0_pd,
73 },
74};
75#endif /* CONFIG_MV643XX_ETH_0 */
76
77#ifdef CONFIG_MV643XX_ETH_1
78
79static struct resource mv64x60_eth1_resources[] = {
80 [0] = {
81 .name = "eth1 irq",
82 .start = MV64x60_IRQ_ETH_1,
83 .end = MV64x60_IRQ_ETH_1,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88static char eth1_mac_addr[ETH_ALEN];
89
90static struct mv643xx_eth_platform_data eth1_pd = {
91 .mac_addr = eth1_mac_addr,
92
93 .tx_sram_addr = MV_SRAM_BASE_ETH1,
94 .tx_sram_size = MV_SRAM_TXRING_SIZE,
95 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
96
97 .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
98 .rx_sram_size = MV_SRAM_RXRING_SIZE,
99 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
100};
101
102static struct platform_device eth1_device = {
103 .name = MV643XX_ETH_NAME,
104 .id = 1,
105 .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
106 .resource = mv64x60_eth1_resources,
107 .dev = {
108 .platform_data = &eth1_pd,
109 },
110};
111#endif /* CONFIG_MV643XX_ETH_1 */
112
113#ifdef CONFIG_MV643XX_ETH_2
114
115static struct resource mv64x60_eth2_resources[] = {
116 [0] = {
117 .name = "eth2 irq",
118 .start = MV64x60_IRQ_ETH_2,
119 .end = MV64x60_IRQ_ETH_2,
120 .flags = IORESOURCE_IRQ,
121 },
122};
123
124static char eth2_mac_addr[ETH_ALEN];
125
126static struct mv643xx_eth_platform_data eth2_pd = {
127 .mac_addr = eth2_mac_addr,
128};
129
130static struct platform_device eth2_device = {
131 .name = MV643XX_ETH_NAME,
132 .id = 1,
133 .num_resources = ARRAY_SIZE(mv64x60_eth2_resources),
134 .resource = mv64x60_eth2_resources,
135 .dev = {
136 .platform_data = &eth2_pd,
137 },
138};
139#endif /* CONFIG_MV643XX_ETH_2 */
140
141static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
142 &mv643xx_eth_shared_device,
143#ifdef CONFIG_MV643XX_ETH_0
144 &eth0_device,
145#endif
146#ifdef CONFIG_MV643XX_ETH_1
147 &eth1_device,
148#endif
149#ifdef CONFIG_MV643XX_ETH_2
150 &eth2_device,
151#endif
152};
153
154static u8 __init exchange_bit(u8 val, u8 cs)
155{
156 /* place the data */
157 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
158 udelay(1);
159
160 /* turn the clock on */
161 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
162 udelay(1);
163
164 /* turn the clock off and read-strobe */
165 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
166
167 /* return the data */
168 return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
169}
170
171static void __init get_mac(char dest[6])
172{
173 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
174 int i,j;
175
176 for (i = 0; i < 12; i++)
177 exchange_bit(read_opcode[i], 1);
178
179 for (j = 0; j < 6; j++) {
180 dest[j] = 0;
181 for (i = 0; i < 8; i++) {
182 dest[j] <<= 1;
183 dest[j] |= exchange_bit(0, 1);
184 }
185 }
186
187 /* turn off CS */
188 exchange_bit(0,0);
189}
190
191/*
192 * Copy and increment ethernet MAC address by a small value.
193 *
194 * This is useful for systems where the only one MAC address is stored in
195 * non-volatile memory for multiple ports.
196 */
197static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
198 unsigned int add)
199{
200 int i;
201
202 BUG_ON(add >= 256);
203
204 for (i = ETH_ALEN; i >= 0; i--) {
205 dst[i] = src[i] + add;
206 add = dst[i] < src[i]; /* compute carry */
207 }
208
209 WARN_ON(add);
210}
211
212static int __init mv643xx_eth_add_pds(void)
213{
214 unsigned char mac[ETH_ALEN];
215 int ret;
216
217 get_mac(mac);
218#ifdef CONFIG_MV643XX_ETH_0
219 eth_mac_add(eth1_mac_addr, mac, 0);
220#endif
221#ifdef CONFIG_MV643XX_ETH_1
222 eth_mac_add(eth1_mac_addr, mac, 1);
223#endif
224#ifdef CONFIG_MV643XX_ETH_2
225 eth_mac_add(eth2_mac_addr, mac, 2);
226#endif
227 ret = platform_add_devices(mv643xx_eth_pd_devs,
228 ARRAY_SIZE(mv643xx_eth_pd_devs));
229
230 return ret;
231}
232
233device_initcall(mv643xx_eth_add_pds);
234
235#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c
index 296d945bc248..6ce9b7fdb824 100644
--- a/arch/mips/momentum/ocelot_3/prom.c
+++ b/arch/mips/momentum/ocelot_3/prom.c
@@ -34,64 +34,11 @@ struct callvectors* debug_vectors;
34extern unsigned long marvell_base; 34extern unsigned long marvell_base;
35extern unsigned long cpu_clock; 35extern unsigned long cpu_clock;
36 36
37#ifdef CONFIG_MV643XX_ETH
38extern unsigned char prom_mac_addr_base[6];
39#endif
40
41const char *get_system_type(void) 37const char *get_system_type(void)
42{ 38{
43 return "Momentum Ocelot-3"; 39 return "Momentum Ocelot-3";
44} 40}
45 41
46#ifdef CONFIG_MV643XX_ETH
47void burn_clocks(void)
48{
49 int i;
50
51 /* this loop should burn at least 1us -- this should be plenty */
52 for (i = 0; i < 0x10000; i++)
53 ;
54}
55
56u8 exchange_bit(u8 val, u8 cs)
57{
58 /* place the data */
59 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
60 burn_clocks();
61
62 /* turn the clock on */
63 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
64 burn_clocks();
65
66 /* turn the clock off and read-strobe */
67 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
68
69 /* return the data */
70 return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
71}
72
73void get_mac(char dest[6])
74{
75 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
76 int i,j;
77
78 for (i = 0; i < 12; i++)
79 exchange_bit(read_opcode[i], 1);
80
81 for (j = 0; j < 6; j++) {
82 dest[j] = 0;
83 for (i = 0; i < 8; i++) {
84 dest[j] <<= 1;
85 dest[j] |= exchange_bit(0, 1);
86 }
87 }
88
89 /* turn off CS */
90 exchange_bit(0,0);
91}
92#endif
93
94
95#ifdef CONFIG_64BIT 42#ifdef CONFIG_64BIT
96 43
97unsigned long signext(unsigned long addr) 44unsigned long signext(unsigned long addr)
@@ -228,11 +175,6 @@ void __init prom_init(void)
228 mips_machgroup = MACH_GROUP_MOMENCO; 175 mips_machgroup = MACH_GROUP_MOMENCO;
229 mips_machtype = MACH_MOMENCO_OCELOT_3; 176 mips_machtype = MACH_MOMENCO_OCELOT_3;
230 177
231#ifdef CONFIG_MV643XX_ETH
232 /* get the base MAC address for on-board ethernet ports */
233 get_mac(prom_mac_addr_base);
234#endif
235
236#ifndef CONFIG_64BIT 178#ifndef CONFIG_64BIT
237 debug_vectors->printf("Booting Linux kernel...\n"); 179 debug_vectors->printf("Booting Linux kernel...\n");
238#endif 180#endif
diff --git a/arch/mips/momentum/ocelot_3/setup.c b/arch/mips/momentum/ocelot_3/setup.c
index 7d74f8c54129..ff0829f81116 100644
--- a/arch/mips/momentum/ocelot_3/setup.c
+++ b/arch/mips/momentum/ocelot_3/setup.c
@@ -4,7 +4,7 @@
4 * BRIEF MODULE DESCRIPTION 4 * BRIEF MODULE DESCRIPTION
5 * Momentum Computer Ocelot-3 board dependent boot routines 5 * Momentum Computer Ocelot-3 board dependent boot routines
6 * 6 *
7 * Copyright (C) 1996, 1997, 01, 05 Ralf Baechle 7 * Copyright (C) 1996, 1997, 01, 05 - 06 Ralf Baechle
8 * Copyright (C) 2000 RidgeRun, Inc. 8 * Copyright (C) 2000 RidgeRun, Inc.
9 * Copyright (C) 2001 Red Hat, Inc. 9 * Copyright (C) 2001 Red Hat, Inc.
10 * Copyright (C) 2002 Momentum Computer 10 * Copyright (C) 2002 Momentum Computer
diff --git a/arch/mips/momentum/ocelot_c/Makefile b/arch/mips/momentum/ocelot_c/Makefile
index 94802b4db472..d69161aa1675 100644
--- a/arch/mips/momentum/ocelot_c/Makefile
+++ b/arch/mips/momentum/ocelot_c/Makefile
@@ -2,7 +2,7 @@
2# Makefile for Momentum Computer's Ocelot-C and -CS boards. 2# Makefile for Momentum Computer's Ocelot-C and -CS boards.
3# 3#
4 4
5obj-y += cpci-irq.o irq.o prom.o reset.o \ 5obj-y += cpci-irq.o irq.o platform.o prom.o reset.o \
6 setup.o uart-irq.o 6 setup.o uart-irq.o
7 7
8obj-$(CONFIG_KGDB) += dbg_io.o 8obj-$(CONFIG_KGDB) += dbg_io.o
diff --git a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
index 7228cd19e5ea..f0f5581dcb50 100644
--- a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
+++ b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
@@ -53,7 +53,9 @@
53#define OCELOT_C_REG_INTSET 0xe 53#define OCELOT_C_REG_INTSET 0xe
54#define OCELOT_C_REG_INTCLR 0xf 54#define OCELOT_C_REG_INTCLR 0xf
55 55
56#define OCELOT_FPGA_WRITE(x, y) writeb(x, OCELOT_C_CS0_ADDR + OCELOT_C_REG_##y) 56#define __FPGA_REG_TO_ADDR(reg) \
57#define OCELOT_FPGA_READ(x) readb(OCELOT_C_CS0_ADDR + OCELOT_C_REG_##x) 57 ((void *) OCELOT_C_CS0_ADDR + OCELOT_C_REG_##reg)
58#define OCELOT_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg))
59#define OCELOT_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg))
58 60
59#endif 61#endif
diff --git a/arch/mips/momentum/ocelot_c/platform.c b/arch/mips/momentum/ocelot_c/platform.c
new file mode 100644
index 000000000000..6c495b2f1560
--- /dev/null
+++ b/arch/mips/momentum/ocelot_c/platform.c
@@ -0,0 +1,201 @@
1#include <linux/delay.h>
2#include <linux/if_ether.h>
3#include <linux/ioport.h>
4#include <linux/mv643xx.h>
5#include <linux/platform_device.h>
6
7#include "ocelot_c_fpga.h"
8
9#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
10
11static struct resource mv643xx_eth_shared_resources[] = {
12 [0] = {
13 .name = "ethernet shared base",
14 .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
15 .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
16 MV643XX_ETH_SHARED_REGS_SIZE - 1,
17 .flags = IORESOURCE_MEM,
18 },
19};
20
21static struct platform_device mv643xx_eth_shared_device = {
22 .name = MV643XX_ETH_SHARED_NAME,
23 .id = 0,
24 .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
25 .resource = mv643xx_eth_shared_resources,
26};
27
28#define MV_SRAM_BASE 0xfe000000UL
29#define MV_SRAM_SIZE (256 * 1024)
30
31#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
32#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
33
34#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
35#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
36
37#define MV64x60_IRQ_ETH_0 48
38#define MV64x60_IRQ_ETH_1 49
39
40#ifdef CONFIG_MV643XX_ETH_0
41
42static struct resource mv64x60_eth0_resources[] = {
43 [0] = {
44 .name = "eth0 irq",
45 .start = MV64x60_IRQ_ETH_0,
46 .end = MV64x60_IRQ_ETH_0,
47 .flags = IORESOURCE_IRQ,
48 },
49};
50
51static char eth0_mac_addr[ETH_ALEN];
52
53static struct mv643xx_eth_platform_data eth0_pd = {
54 .mac_addr = eth0_mac_addr,
55
56 .tx_sram_addr = MV_SRAM_BASE_ETH0,
57 .tx_sram_size = MV_SRAM_TXRING_SIZE,
58 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
59
60 .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
61 .rx_sram_size = MV_SRAM_RXRING_SIZE,
62 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
63};
64
65static struct platform_device eth0_device = {
66 .name = MV643XX_ETH_NAME,
67 .id = 0,
68 .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
69 .resource = mv64x60_eth0_resources,
70 .dev = {
71 .platform_data = &eth0_pd,
72 },
73};
74#endif /* CONFIG_MV643XX_ETH_0 */
75
76#ifdef CONFIG_MV643XX_ETH_1
77
78static struct resource mv64x60_eth1_resources[] = {
79 [0] = {
80 .name = "eth1 irq",
81 .start = MV64x60_IRQ_ETH_1,
82 .end = MV64x60_IRQ_ETH_1,
83 .flags = IORESOURCE_IRQ,
84 },
85};
86
87static char eth1_mac_addr[ETH_ALEN];
88
89static struct mv643xx_eth_platform_data eth1_pd = {
90 .mac_addr = eth1_mac_addr,
91
92 .tx_sram_addr = MV_SRAM_BASE_ETH1,
93 .tx_sram_size = MV_SRAM_TXRING_SIZE,
94 .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
95
96 .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
97 .rx_sram_size = MV_SRAM_RXRING_SIZE,
98 .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
99};
100
101static struct platform_device eth1_device = {
102 .name = MV643XX_ETH_NAME,
103 .id = 1,
104 .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
105 .resource = mv64x60_eth1_resources,
106 .dev = {
107 .platform_data = &eth1_pd,
108 },
109};
110#endif /* CONFIG_MV643XX_ETH_1 */
111
112static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
113 &mv643xx_eth_shared_device,
114#ifdef CONFIG_MV643XX_ETH_0
115 &eth0_device,
116#endif
117#ifdef CONFIG_MV643XX_ETH_1
118 &eth1_device,
119#endif
120 /* The third port is not wired up on the Ocelot C */
121};
122
123static u8 __init exchange_bit(u8 val, u8 cs)
124{
125 /* place the data */
126 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
127 udelay(1);
128
129 /* turn the clock on */
130 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
131 udelay(1);
132
133 /* turn the clock off and read-strobe */
134 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
135
136 /* return the data */
137 return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
138}
139
140static void __init get_mac(char dest[6])
141{
142 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
143 int i,j;
144
145 for (i = 0; i < 12; i++)
146 exchange_bit(read_opcode[i], 1);
147
148 for (j = 0; j < 6; j++) {
149 dest[j] = 0;
150 for (i = 0; i < 8; i++) {
151 dest[j] <<= 1;
152 dest[j] |= exchange_bit(0, 1);
153 }
154 }
155
156 /* turn off CS */
157 exchange_bit(0,0);
158}
159
160/*
161 * Copy and increment ethernet MAC address by a small value.
162 *
163 * This is useful for systems where the only one MAC address is stored in
164 * non-volatile memory for multiple ports.
165 */
166static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
167 unsigned int add)
168{
169 int i;
170
171 BUG_ON(add >= 256);
172
173 for (i = ETH_ALEN; i >= 0; i--) {
174 dst[i] = src[i] + add;
175 add = dst[i] < src[i]; /* compute carry */
176 }
177
178 WARN_ON(add);
179}
180
181static int __init mv643xx_eth_add_pds(void)
182{
183 unsigned char mac[ETH_ALEN];
184 int ret;
185
186 get_mac(mac);
187#ifdef CONFIG_MV643XX_ETH_0
188 eth_mac_add(eth1_mac_addr, mac, 0);
189#endif
190#ifdef CONFIG_MV643XX_ETH_1
191 eth_mac_add(eth1_mac_addr, mac, 1);
192#endif
193 ret = platform_add_devices(mv643xx_eth_pd_devs,
194 ARRAY_SIZE(mv643xx_eth_pd_devs));
195
196 return ret;
197}
198
199device_initcall(mv643xx_eth_add_pds);
200
201#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c
index 4c50a147f429..d0b77e101d74 100644
--- a/arch/mips/momentum/ocelot_c/prom.c
+++ b/arch/mips/momentum/ocelot_c/prom.c
@@ -29,11 +29,7 @@
29struct callvectors* debug_vectors; 29struct callvectors* debug_vectors;
30 30
31extern unsigned long marvell_base; 31extern unsigned long marvell_base;
32extern unsigned long cpu_clock; 32extern unsigned int cpu_clock;
33
34#ifdef CONFIG_MV643XX_ETH
35extern unsigned char prom_mac_addr_base[6];
36#endif
37 33
38const char *get_system_type(void) 34const char *get_system_type(void)
39{ 35{
@@ -44,55 +40,6 @@ const char *get_system_type(void)
44#endif 40#endif
45} 41}
46 42
47#ifdef CONFIG_MV643XX_ETH
48static void burn_clocks(void)
49{
50 int i;
51
52 /* this loop should burn at least 1us -- this should be plenty */
53 for (i = 0; i < 0x10000; i++)
54 ;
55}
56
57static u8 exchange_bit(u8 val, u8 cs)
58{
59 /* place the data */
60 OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
61 burn_clocks();
62
63 /* turn the clock on */
64 OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
65 burn_clocks();
66
67 /* turn the clock off and read-strobe */
68 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
69
70 /* return the data */
71 return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
72}
73
74void get_mac(char dest[6])
75{
76 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
77 int i,j;
78
79 for (i = 0; i < 12; i++)
80 exchange_bit(read_opcode[i], 1);
81
82 for (j = 0; j < 6; j++) {
83 dest[j] = 0;
84 for (i = 0; i < 8; i++) {
85 dest[j] <<= 1;
86 dest[j] |= exchange_bit(0, 1);
87 }
88 }
89
90 /* turn off CS */
91 exchange_bit(0,0);
92}
93#endif
94
95
96#ifdef CONFIG_64BIT 43#ifdef CONFIG_64BIT
97 44
98unsigned long signext(unsigned long addr) 45unsigned long signext(unsigned long addr)
@@ -226,11 +173,6 @@ void __init prom_init(void)
226 mips_machgroup = MACH_GROUP_MOMENCO; 173 mips_machgroup = MACH_GROUP_MOMENCO;
227 mips_machtype = MACH_MOMENCO_OCELOT_C; 174 mips_machtype = MACH_MOMENCO_OCELOT_C;
228 175
229#ifdef CONFIG_MV643XX_ETH
230 /* get the base MAC address for on-board ethernet ports */
231 get_mac(prom_mac_addr_base);
232#endif
233
234#ifndef CONFIG_64BIT 176#ifndef CONFIG_64BIT
235 debug_vectors->printf("Booting Linux kernel...\n"); 177 debug_vectors->printf("Booting Linux kernel...\n");
236#endif 178#endif
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 9c0c462af650..0b6b2338cfb4 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -69,8 +69,7 @@
69#include "ocelot_c_fpga.h" 69#include "ocelot_c_fpga.h"
70 70
71unsigned long marvell_base; 71unsigned long marvell_base;
72extern unsigned long mv64340_sram_base; 72unsigned int cpu_clock;
73unsigned long cpu_clock;
74 73
75/* These functions are used for rebooting or halting the machine*/ 74/* These functions are used for rebooting or halting the machine*/
76extern void momenco_ocelot_restart(char *command); 75extern void momenco_ocelot_restart(char *command);
@@ -119,7 +118,6 @@ void PMON_v2_setup(void)
119 add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfffffffffe000000, PM_16M); 118 add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfffffffffe000000, PM_16M);
120 119
121 marvell_base = 0xfffffffff4000000; 120 marvell_base = 0xfffffffff4000000;
122 mv64340_sram_base = 0xfffffffffe000000;
123#else 121#else
124 /* marvell and extra space */ 122 /* marvell and extra space */
125 add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xf4000000, PM_64K); 123 add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xf4000000, PM_64K);
@@ -129,7 +127,6 @@ void PMON_v2_setup(void)
129 add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfe000000, PM_16M); 127 add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfe000000, PM_16M);
130 128
131 marvell_base = 0xf4000000; 129 marvell_base = 0xf4000000;
132 mv64340_sram_base = 0xfe000000;
133#endif 130#endif
134} 131}
135 132
@@ -346,22 +343,20 @@ void __init plat_mem_setup(void)
346 } 343 }
347} 344}
348 345
349#ifndef CONFIG_64BIT 346/*
350/* This needs to be one of the first initcalls, because no I/O port access 347 * This needs to be one of the first initcalls, because no I/O port access
351 can work before this */ 348 * can work before this
349 */
352static int io_base_ioremap(void) 350static int io_base_ioremap(void)
353{ 351{
354 /* we're mapping PCI accesses from 0xc0000000 to 0xf0000000 */ 352 void __iomem * io_remap_range = ioremap(0xc0000000UL, 0x10000);
355 void *io_remap_range = ioremap(0xc0000000, 0x30000000);
356 353
357 if (!io_remap_range) { 354 if (!io_remap_range)
358 panic("Could not ioremap I/O port range"); 355 panic("Could not ioremap I/O port range");
359 } 356
360 printk("io_remap_range set at 0x%08x\n", (uint32_t)io_remap_range); 357 set_io_port_base((unsigned long) io_remap_range);
361 set_io_port_base(io_remap_range - 0xc0000000);
362 358
363 return 0; 359 return 0;
364} 360}
365 361
366module_init(io_base_ioremap); 362module_init(io_base_ioremap);
367#endif
diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c
index 7b5cc6648f7e..e5576bd50fa9 100644
--- a/arch/mips/momentum/ocelot_g/gt-irq.c
+++ b/arch/mips/momentum/ocelot_g/gt-irq.c
@@ -27,7 +27,7 @@ unsigned long bus_clock;
27 * be handled and ack'ed differently than other MIPS interrupts. 27 * be handled and ack'ed differently than other MIPS interrupts.
28 */ 28 */
29 29
30#if CURRENTLY_UNUSED 30#if 0
31 31
32struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH]; 32struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH];
33void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr); 33void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr);
@@ -95,7 +95,7 @@ int disable_galileo_irq(int int_cause, int bit_num)
95 return 0; 95 return 0;
96 return 1; 96 return 1;
97} 97}
98#endif /* UNUSED */ 98#endif /* 0 */
99 99
100/* 100/*
101 * Interrupt handler for interrupts coming from the Galileo chip via P0_INT#. 101 * Interrupt handler for interrupts coming from the Galileo chip via P0_INT#.
@@ -196,7 +196,7 @@ void gt64240_time_init(void)
196 196
197void gt64240_irq_init(void) 197void gt64240_irq_init(void)
198{ 198{
199#if CURRENTLY_UNUSED 199#if 0
200 int i, j; 200 int i, j;
201 201
202 /* Reset irq handlers pointers to NULL */ 202 /* Reset irq handlers pointers to NULL */
@@ -208,5 +208,5 @@ void gt64240_irq_init(void)
208 irq_handlers[i][j].data = NULL; 208 irq_handlers[i][j].data = NULL;
209 } 209 }
210 } 210 }
211#endif 211#endif /* 0 */
212} 212}
diff --git a/arch/mips/momentum/ocelot_g/ocelot_pld.h b/arch/mips/momentum/ocelot_g/ocelot_pld.h
index fcb8275e219d..95e0534026d0 100644
--- a/arch/mips/momentum/ocelot_g/ocelot_pld.h
+++ b/arch/mips/momentum/ocelot_g/ocelot_pld.h
@@ -23,8 +23,8 @@
23#define OCELOT_REG_INTSET (12) 23#define OCELOT_REG_INTSET (12)
24#define OCELOT_REG_INTCLR (13) 24#define OCELOT_REG_INTCLR (13)
25 25
26#define OCELOT_PLD_WRITE(x, y) writeb(x, OCELOT_CS0_ADDR + OCELOT_REG_##y) 26#define __PLD_REG_TO_ADDR(reg) ((void *) OCELOT_CS0_ADDR + OCELOT_REG_##reg)
27#define OCELOT_PLD_READ(x) readb(OCELOT_CS0_ADDR + OCELOT_REG_##x) 27#define OCELOT_PLD_WRITE(x, reg) writeb(x, __PLD_REG_TO_ADDR(reg))
28 28#define OCELOT_PLD_READ(reg) readb(__PLD_REG_TO_ADDR(reg))
29 29
30#endif /* __MOMENCO_OCELOT_PLD_H__ */ 30#endif /* __MOMENCO_OCELOT_PLD_H__ */
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c
index 56ec47039c16..d288f7b01842 100644
--- a/arch/mips/momentum/ocelot_g/setup.c
+++ b/arch/mips/momentum/ocelot_g/setup.c
@@ -57,6 +57,7 @@
57#include <asm/gt64240.h> 57#include <asm/gt64240.h>
58#include <asm/irq.h> 58#include <asm/irq.h>
59#include <asm/pci.h> 59#include <asm/pci.h>
60#include <asm/pgtable.h>
60#include <asm/processor.h> 61#include <asm/processor.h>
61#include <asm/reboot.h> 62#include <asm/reboot.h>
62#include <linux/bootmem.h> 63#include <linux/bootmem.h>
@@ -160,6 +161,10 @@ static void __init setup_l3cache(unsigned long size)
160 printk("Done\n"); 161 printk("Done\n");
161} 162}
162 163
164void __init plat_timer_setup(struct irqaction *irq)
165{
166}
167
163void __init plat_mem_setup(void) 168void __init plat_mem_setup(void)
164{ 169{
165 void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache); 170 void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache);
diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h
index 354e54496406..fa6b4aae7523 100644
--- a/arch/mips/oprofile/op_impl.h
+++ b/arch/mips/oprofile/op_impl.h
@@ -10,8 +10,6 @@
10#ifndef OP_IMPL_H 10#ifndef OP_IMPL_H
11#define OP_IMPL_H 1 11#define OP_IMPL_H 1
12 12
13struct pt_regs;
14
15extern int null_perf_irq(void); 13extern int null_perf_irq(void);
16extern int (*perf_irq)(void); 14extern int (*perf_irq)(void);
17 15
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index dd0aec9c3ce1..1fb240c57bac 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -31,16 +31,18 @@
31#define M_COUNTER_OVERFLOW (1UL << 31) 31#define M_COUNTER_OVERFLOW (1UL << 31)
32 32
33#ifdef CONFIG_MIPS_MT_SMP 33#ifdef CONFIG_MIPS_MT_SMP
34#define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id())) 34#define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
35#define vpe_id() smp_processor_id()
35#else 36#else
36#define WHAT 0 37#define WHAT 0
38#define vpe_id() smp_processor_id()
37#endif 39#endif
38 40
39#define __define_perf_accessors(r, n, np) \ 41#define __define_perf_accessors(r, n, np) \
40 \ 42 \
41static inline unsigned int r_c0_ ## r ## n(void) \ 43static inline unsigned int r_c0_ ## r ## n(void) \
42{ \ 44{ \
43 unsigned int cpu = smp_processor_id(); \ 45 unsigned int cpu = vpe_id(); \
44 \ 46 \
45 switch (cpu) { \ 47 switch (cpu) { \
46 case 0: \ 48 case 0: \
@@ -55,7 +57,7 @@ static inline unsigned int r_c0_ ## r ## n(void) \
55 \ 57 \
56static inline void w_c0_ ## r ## n(unsigned int value) \ 58static inline void w_c0_ ## r ## n(unsigned int value) \
57{ \ 59{ \
58 unsigned int cpu = smp_processor_id(); \ 60 unsigned int cpu = vpe_id(); \
59 \ 61 \
60 switch (cpu) { \ 62 switch (cpu) { \
61 case 0: \ 63 case 0: \
@@ -218,7 +220,7 @@ static inline int n_counters(void)
218{ 220{
219 int counters = __n_counters(); 221 int counters = __n_counters();
220 222
221#ifndef CONFIG_SMP 223#ifdef CONFIG_MIPS_MT_SMP
222 if (current_cpu_data.cputype == CPU_34K) 224 if (current_cpu_data.cputype == CPU_34K)
223 return counters >> 1; 225 return counters >> 1;
224#endif 226#endif
diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c
index b7063fefa65b..7dc9bf6f1321 100644
--- a/arch/mips/oprofile/op_model_rm9000.c
+++ b/arch/mips/oprofile/op_model_rm9000.c
@@ -80,8 +80,7 @@ static void rm9000_cpu_stop(void *args)
80 write_c0_perfcontrol(0); 80 write_c0_perfcontrol(0);
81} 81}
82 82
83static irqreturn_t rm9000_perfcount_handler(int irq, void * dev_id, 83static irqreturn_t rm9000_perfcount_handler(int irq, void * dev_id)
84 struct pt_regs *regs)
85{ 84{
86 unsigned int control = read_c0_perfcontrol(); 85 unsigned int control = read_c0_perfcontrol();
87 uint32_t counter1, counter2; 86 uint32_t counter1, counter2;
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 3cf0dd4ba548..70cb55b89df6 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -26,7 +26,7 @@ obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
26obj-$(CONFIG_LASAT) += pci-lasat.o 26obj-$(CONFIG_LASAT) += pci-lasat.o
27obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o 27obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
28obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o 28obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
29obj-$(CONFIG_MIPS_EV64120) += fixup-ev64120.o 29obj-$(CONFIG_MIPS_EV64120) += pci-ev64120.o
30obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o 30obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
31obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o 31obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
32obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o 32obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
diff --git a/arch/mips/pci/fixup-ev64120.c b/arch/mips/pci/fixup-ev64120.c
deleted file mode 100644
index 8dbb90d63f0a..000000000000
--- a/arch/mips/pci/fixup-ev64120.c
+++ /dev/null
@@ -1,34 +0,0 @@
1#include <linux/pci.h>
2#include <linux/init.h>
3
4int pci_range_ck(unsigned char bus, unsigned char dev)
5{
6 if (((bus == 0) || (bus == 1)) && (dev >= 6) && (dev <= 8))
7 return 0;
8
9 return -1;
10}
11
12/*
13 * After detecting all agents over the PCI , this function is called
14 * in order to give an interrupt number for each PCI device starting
15 * from IRQ 20. It does also enables master for each device.
16 */
17void __devinit pcibios_fixup_bus(struct pci_bus *bus)
18{
19 unsigned int irq = 20;
20 struct pci_bus *current_bus = bus;
21 struct pci_dev *dev;
22 struct list_head *devices_link;
23
24 list_for_each(devices_link, &(current_bus->devices)) {
25 dev = pci_dev_b(devices_link);
26 if (dev != NULL) {
27 dev->irq = irq++;
28
29 /* Assign an interrupt number for the device */
30 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
31 pcibios_set_master(dev);
32 }
33 }
34}
diff --git a/arch/mips/pci/pci-ev64120.c b/arch/mips/pci/pci-ev64120.c
new file mode 100644
index 000000000000..9cd859ef1842
--- /dev/null
+++ b/arch/mips/pci/pci-ev64120.c
@@ -0,0 +1,21 @@
1#include <linux/pci.h>
2
3int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
4{
5 int irq;
6
7 if (!pin)
8 return 0;
9
10 irq = allocate_irqno();
11 if (irq < 0)
12 return 0;
13
14 return irq;
15}
16
17/* Do platform specific device initialization at pci_enable_device() time */
18int pcibios_plat_dev_init(struct pci_dev *dev)
19{
20 return 0;
21}
diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c
index 0af655b1f330..65c440e8480b 100644
--- a/arch/mips/philips/pnx8550/common/time.c
+++ b/arch/mips/philips/pnx8550/common/time.c
@@ -41,8 +41,8 @@ extern unsigned int mips_hpt_frequency;
41 * 1) board_time_init() - 41 * 1) board_time_init() -
42 * a) (optional) set up RTC routines, 42 * a) (optional) set up RTC routines,
43 * b) (optional) calibrate and set the mips_hpt_frequency 43 * b) (optional) calibrate and set the mips_hpt_frequency
44 * (only needed if you intended to use fixed_rate_gettimeoffset 44 * (only needed if you intended to use cpu counter as timer interrupt
45 * or use cpu counter as timer interrupt source) 45 * source)
46 */ 46 */
47 47
48void pnx8550_time_init(void) 48void pnx8550_time_init(void)
diff --git a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c
index 416da22b3bf4..85b14c73c226 100644
--- a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c
+++ b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c
@@ -74,7 +74,7 @@ static int titan_i2c_poll(void)
74int titan_i2c_xfer(unsigned int slave_addr, titan_i2c_command * cmd, 74int titan_i2c_xfer(unsigned int slave_addr, titan_i2c_command * cmd,
75 int size, unsigned int *addr) 75 int size, unsigned int *addr)
76{ 76{
77 int loop = 0, bytes, i; 77 int loop, bytes = 0, i;
78 unsigned int *write_data, data, *read_data; 78 unsigned int *write_data, data, *read_data;
79 unsigned long reg_val, val; 79 unsigned long reg_val, val;
80 80
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 65fa3a23ea5e..3cc0436db6cf 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -3,9 +3,7 @@
3 3
4#include <asm/pmon.h> 4#include <asm/pmon.h>
5#include <asm/titan_dep.h> 5#include <asm/titan_dep.h>
6 6#include <asm/time.h>
7extern unsigned int (*mips_hpt_read)(void);
8extern void (*mips_hpt_init)(unsigned int);
9 7
10#define LAUNCHSTACK_SIZE 256 8#define LAUNCHSTACK_SIZE 256
11 9
@@ -101,7 +99,7 @@ void prom_cpus_done(void)
101 */ 99 */
102void prom_init_secondary(void) 100void prom_init_secondary(void)
103{ 101{
104 mips_hpt_init(mips_hpt_read()); 102 mips_hpt_init();
105 103
106 set_c0_status(ST0_CO | ST0_IE | ST0_IM); 104 set_c0_status(ST0_CO | ST0_IE | ST0_IM);
107} 105}
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index f01ba1f90770..270ecd3e6b4a 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -354,29 +354,6 @@ static struct irq_chip bridge_irq_type = {
354 .end = end_bridge_irq, 354 .end = end_bridge_irq,
355}; 355};
356 356
357static unsigned long irq_map[NR_IRQS / BITS_PER_LONG];
358
359int allocate_irqno(void)
360{
361 int irq;
362
363again:
364 irq = find_first_zero_bit(irq_map, NR_IRQS);
365
366 if (irq >= NR_IRQS)
367 return -ENOSPC;
368
369 if (test_and_set_bit(irq, irq_map))
370 goto again;
371
372 return irq;
373}
374
375void free_irqno(unsigned int irq)
376{
377 clear_bit(irq, irq_map);
378}
379
380void __devinit register_bridge_irq(unsigned int irq) 357void __devinit register_bridge_irq(unsigned int irq)
381{ 358{
382 irq_desc[irq].status = IRQ_DISABLED; 359 irq_desc[irq].status = IRQ_DISABLED;
diff --git a/arch/mips/sgi-ip27/ip27-klnuma.c b/arch/mips/sgi-ip27/ip27-klnuma.c
index d777b7d1a9fe..f9f404a8ddad 100644
--- a/arch/mips/sgi-ip27/ip27-klnuma.c
+++ b/arch/mips/sgi-ip27/ip27-klnuma.c
@@ -26,7 +26,7 @@ static cpumask_t ktext_repmask;
26 * kernel. For example, we should never put a copy on a headless node, 26 * kernel. For example, we should never put a copy on a headless node,
27 * and we should respect the topology of the machine. 27 * and we should respect the topology of the machine.
28 */ 28 */
29void __init setup_replication_mask() 29void __init setup_replication_mask(void)
30{ 30{
31 cnodeid_t cnode; 31 cnodeid_t cnode;
32 32
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 4e870fc4469b..5e82a268e3c9 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -134,13 +134,6 @@ again:
134 irq_exit(); 134 irq_exit();
135} 135}
136 136
137unsigned long ip27_do_gettimeoffset(void)
138{
139 unsigned long ct_cur1;
140 ct_cur1 = REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT) + CYCLES_PER_JIFFY;
141 return (ct_cur1 - ct_cur[0]) * NSEC_PER_CYCLE / 1000;
142}
143
144/* Includes for ioc3_init(). */ 137/* Includes for ioc3_init(). */
145#include <asm/sn/types.h> 138#include <asm/sn/types.h>
146#include <asm/sn/sn0/addrs.h> 139#include <asm/sn/sn0/addrs.h>
@@ -221,8 +214,6 @@ static struct irqaction rt_irqaction = {
221 .name = "timer" 214 .name = "timer"
222}; 215};
223 216
224extern int allocate_irqno(void);
225
226void __init plat_timer_setup(struct irqaction *irq) 217void __init plat_timer_setup(struct irqaction *irq)
227{ 218{
228 int irqno = allocate_irqno(); 219 int irqno = allocate_irqno();
@@ -248,12 +239,17 @@ void __init plat_timer_setup(struct irqaction *irq)
248 setup_irq(irqno, &rt_irqaction); 239 setup_irq(irqno, &rt_irqaction);
249} 240}
250 241
242static unsigned int ip27_hpt_read(void)
243{
244 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
245}
246
251void __init ip27_time_init(void) 247void __init ip27_time_init(void)
252{ 248{
249 mips_hpt_read = ip27_hpt_read;
250 mips_hpt_frequency = CYCLES_PER_SEC;
253 xtime.tv_sec = get_m48t35_time(); 251 xtime.tv_sec = get_m48t35_time();
254 xtime.tv_nsec = 0; 252 xtime.tv_nsec = 0;
255
256 do_gettimeoffset = ip27_do_gettimeoffset;
257} 253}
258 254
259void __init cpu_time_init(void) 255void __init cpu_time_init(void)
diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c
index fd0932b2d521..db8084411538 100644
--- a/arch/mips/sgi-ip32/ip32-reset.c
+++ b/arch/mips/sgi-ip32/ip32-reset.c
@@ -135,7 +135,7 @@ static inline void ip32_power_button(void)
135 add_timer(&power_timer); 135 add_timer(&power_timer);
136} 136}
137 137
138static irqreturn_t ip32_rtc_int(int irq, void *dev_id, struct pt_regs *regs) 138static irqreturn_t ip32_rtc_int(int irq, void *dev_id)
139{ 139{
140 volatile unsigned char reg_c; 140 volatile unsigned char reg_c;
141 141
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index 6eac36d1b8c8..bf328277c775 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -34,21 +34,21 @@ extern void smp_call_function_interrupt(void);
34 * independent of board/firmware 34 * independent of board/firmware
35 */ 35 */
36 36
37static void *mailbox_0_set_regs[] = { 37static volatile void *mailbox_0_set_regs[] = {
38 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 38 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
39 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 39 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
40 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 40 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
41 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 41 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
42}; 42};
43 43
44static void *mailbox_0_clear_regs[] = { 44static volatile void *mailbox_0_clear_regs[] = {
45 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 45 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
46 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 46 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
47 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 47 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
48 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 48 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
49}; 49};
50 50
51static void *mailbox_0_regs[] = { 51static volatile void *mailbox_0_regs[] = {
52 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 52 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
53 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 53 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
54 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 54 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index bf12af46132e..e136bde5248e 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -47,6 +47,12 @@
47#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 47#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1
48#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 48#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2
49 49
50#ifdef CONFIG_SIMULATION
51#define BCM1480_HPT_VALUE 50000
52#else
53#define BCM1480_HPT_VALUE 1000000
54#endif
55
50extern int bcm1480_steal_irq(int irq); 56extern int bcm1480_steal_irq(int irq);
51 57
52void bcm1480_time_init(void) 58void bcm1480_time_init(void)
@@ -59,11 +65,6 @@ void bcm1480_time_init(void)
59 BUG(); 65 BUG();
60 } 66 }
61 67
62 if (!cpu) {
63 /* Use our own gettimeoffset() routine */
64 do_gettimeoffset = bcm1480_gettimeoffset;
65 }
66
67 bcm1480_mask_irq(cpu, irq); 68 bcm1480_mask_irq(cpu, irq);
68 69
69 /* Map the timer interrupt to ip[4] of this cpu */ 70 /* Map the timer interrupt to ip[4] of this cpu */
@@ -74,11 +75,7 @@ void bcm1480_time_init(void)
74 /* Disable the timer and set up the count */ 75 /* Disable the timer and set up the count */
75 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 76 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
76 __raw_writeq( 77 __raw_writeq(
77#ifndef CONFIG_SIMULATION 78 BCM1480_HPT_VALUE/HZ
78 1000000/HZ
79#else
80 50000/HZ
81#endif
82 , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); 79 , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
83 80
84 /* Set the timer running */ 81 /* Set the timer running */
@@ -122,16 +119,16 @@ void bcm1480_timer_interrupt(void)
122 } 119 }
123} 120}
124 121
125/* 122static unsigned int bcm1480_hpt_read(void)
126 * We use our own do_gettimeoffset() instead of the generic one,
127 * because the generic one does not work for SMP case.
128 * In addition, since we use general timer 0 for system time,
129 * we can get accurate intra-jiffy offset without calibration.
130 */
131unsigned long bcm1480_gettimeoffset(void)
132{ 123{
124 /* We assume this function is called xtime_lock held. */
133 unsigned long count = 125 unsigned long count =
134 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); 126 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
127 return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count;
128}
135 129
136 return 1000000/HZ - count; 130void __init bcm1480_hpt_setup(void)
131{
132 mips_hpt_read = bcm1480_hpt_read;
133 mips_hpt_frequency = BCM1480_HPT_VALUE;
137} 134}
diff --git a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
index 992e0d8dbb67..d1a906e683b2 100644
--- a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
+++ b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
@@ -88,7 +88,7 @@ static void arm_tb(void)
88 sbp.tb_armed = 1; 88 sbp.tb_armed = 1;
89} 89}
90 90
91static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs) 91static irqreturn_t sbprof_tb_intr(int irq, void *dev_id)
92{ 92{
93 int i; 93 int i;
94 DBG(printk(DEVNAME ": tb_intr\n")); 94 DBG(printk(DEVNAME ": tb_intr\n"));
@@ -138,7 +138,7 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs)
138 return IRQ_HANDLED; 138 return IRQ_HANDLED;
139} 139}
140 140
141static irqreturn_t sbprof_pc_intr(int irq, void *dev_id, struct pt_regs *regs) 141static irqreturn_t sbprof_pc_intr(int irq, void *dev_id)
142{ 142{
143 printk(DEVNAME ": unexpected pc_intr"); 143 printk(DEVNAME ": unexpected pc_intr");
144 return IRQ_NONE; 144 return IRQ_NONE;
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index bb90649fbc48..45274bd3cd8b 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -171,7 +171,7 @@ static void create_proc_decoder(struct bw_stats_struct *stats)
171 * notes: possible re-entry due to multiple sources 171 * notes: possible re-entry due to multiple sources
172 * should check/indicate saturation 172 * should check/indicate saturation
173 */ 173 */
174static irqreturn_t sibyte_bw_int(int irq, void *data, struct pt_regs *regs) 174static irqreturn_t sibyte_bw_int(int irq, void *data)
175{ 175{
176 struct bw_stats_struct *stats = data; 176 struct bw_stats_struct *stats = data;
177 unsigned long cntr; 177 unsigned long cntr;
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 0ccf1796dd78..bcb74f2c1948 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -47,15 +47,11 @@
47 47
48#define SB1250_HPT_NUM 3 48#define SB1250_HPT_NUM 3
49#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */ 49#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
50#define SB1250_HPT_SHIFT ((sizeof(unsigned int)*8)-V_SCD_TIMER_WIDTH)
51 50
52 51
53extern int sb1250_steal_irq(int irq); 52extern int sb1250_steal_irq(int irq);
54 53
55static unsigned int sb1250_hpt_read(void); 54static unsigned int sb1250_hpt_read(void);
56static void sb1250_hpt_init(unsigned int);
57
58static unsigned int hpt_offset;
59 55
60void __init sb1250_hpt_setup(void) 56void __init sb1250_hpt_setup(void)
61{ 57{
@@ -69,13 +65,9 @@ void __init sb1250_hpt_setup(void)
69 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 65 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
70 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); 66 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
71 67
72 /* 68 mips_hpt_frequency = V_SCD_TIMER_FREQ;
73 * we need to fill 32 bits, so just use the upper 23 bits and pretend
74 * the timer is going 512Mhz instead of 1Mhz
75 */
76 mips_hpt_frequency = V_SCD_TIMER_FREQ << SB1250_HPT_SHIFT;
77 mips_hpt_init = sb1250_hpt_init;
78 mips_hpt_read = sb1250_hpt_read; 69 mips_hpt_read = sb1250_hpt_read;
70 mips_hpt_mask = M_SCD_TIMER_INIT;
79 } 71 }
80} 72}
81 73
@@ -149,11 +141,7 @@ void sb1250_timer_interrupt(void)
149 141
150/* 142/*
151 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over 143 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
152 * again. There's no easy way to set to a specific value so store init value 144 * again.
153 * in hpt_offset and subtract each time.
154 *
155 * Note: Timer isn't full 32bits so shift it into the upper part making
156 * it appear to run at a higher frequency.
157 */ 145 */
158static unsigned int sb1250_hpt_read(void) 146static unsigned int sb1250_hpt_read(void)
159{ 147{
@@ -161,13 +149,5 @@ static unsigned int sb1250_hpt_read(void)
161 149
162 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); 150 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
163 151
164 count = (SB1250_HPT_VALUE - count) << SB1250_HPT_SHIFT; 152 return SB1250_HPT_VALUE - count;
165
166 return count - hpt_offset;
167}
168
169static void sb1250_hpt_init(unsigned int count)
170{
171 hpt_offset = count;
172 return;
173} 153}
diff --git a/arch/mips/tx4927/common/smsc_fdc37m81x.c b/arch/mips/tx4927/common/smsc_fdc37m81x.c
new file mode 100644
index 000000000000..33f517bc9a08
--- /dev/null
+++ b/arch/mips/tx4927/common/smsc_fdc37m81x.c
@@ -0,0 +1,172 @@
1/*
2 * Interface for smsc fdc48m81x Super IO chip
3 *
4 * Author: MontaVista Software, Inc. source@mvista.com
5 *
6 * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 * Copyright 2004 (c) MontaVista Software, Inc.
12 */
13#include <linux/init.h>
14#include <linux/types.h>
15#include <asm/io.h>
16#include <asm/tx4927/smsc_fdc37m81x.h>
17
18#define DEBUG
19
20/* Common Registers */
21#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
22#define SMSC_FDC37M81X_CONFIG_DATA 0x01
23#define SMSC_FDC37M81X_CONF 0x02
24#define SMSC_FDC37M81X_INDEX 0x03
25#define SMSC_FDC37M81X_DNUM 0x07
26#define SMSC_FDC37M81X_DID 0x20
27#define SMSC_FDC37M81X_DREV 0x21
28#define SMSC_FDC37M81X_PCNT 0x22
29#define SMSC_FDC37M81X_PMGT 0x23
30#define SMSC_FDC37M81X_OSC 0x24
31#define SMSC_FDC37M81X_CONFPA0 0x26
32#define SMSC_FDC37M81X_CONFPA1 0x27
33#define SMSC_FDC37M81X_TEST4 0x2B
34#define SMSC_FDC37M81X_TEST5 0x2C
35#define SMSC_FDC37M81X_TEST1 0x2D
36#define SMSC_FDC37M81X_TEST2 0x2E
37#define SMSC_FDC37M81X_TEST3 0x2F
38
39/* Logical device numbers */
40#define SMSC_FDC37M81X_FDD 0x00
41#define SMSC_FDC37M81X_SERIAL1 0x04
42#define SMSC_FDC37M81X_SERIAL2 0x05
43#define SMSC_FDC37M81X_KBD 0x07
44
45/* Logical device Config Registers */
46#define SMSC_FDC37M81X_ACTIVE 0x30
47#define SMSC_FDC37M81X_BASEADDR0 0x60
48#define SMSC_FDC37M81X_BASEADDR1 0x61
49#define SMSC_FDC37M81X_INT 0x70
50#define SMSC_FDC37M81X_INT2 0x72
51#define SMSC_FDC37M81X_MODE 0xF0
52
53/* Chip Config Values */
54#define SMSC_FDC37M81X_CONFIG_ENTER 0x55
55#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
56#define SMSC_FDC37M81X_CHIP_ID 0x4d
57
58static unsigned long g_smsc_fdc37m81x_base = 0;
59
60static inline unsigned char smsc_fdc37m81x_rd(unsigned char index)
61{
62 outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
63
64 return inb(g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);
65}
66
67static inline void smsc_dc37m81x_wr(unsigned char index, unsigned char data)
68{
69 outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
70 outb(data, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);
71}
72
73void smsc_fdc37m81x_config_beg(void)
74{
75 if (g_smsc_fdc37m81x_base) {
76 outb(SMSC_FDC37M81X_CONFIG_ENTER,
77 g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
78 }
79}
80
81void smsc_fdc37m81x_config_end(void)
82{
83 if (g_smsc_fdc37m81x_base)
84 outb(SMSC_FDC37M81X_CONFIG_EXIT,
85 g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
86}
87
88u8 smsc_fdc37m81x_config_get(u8 reg)
89{
90 u8 val = 0;
91
92 if (g_smsc_fdc37m81x_base)
93 val = smsc_fdc37m81x_rd(reg);
94
95 return val;
96}
97
98void smsc_fdc37m81x_config_set(u8 reg, u8 val)
99{
100 if (g_smsc_fdc37m81x_base)
101 smsc_dc37m81x_wr(reg, val);
102}
103
104unsigned long __init smsc_fdc37m81x_init(unsigned long port)
105{
106 const int field = sizeof(unsigned long) * 2;
107 u8 chip_id;
108
109 if (g_smsc_fdc37m81x_base)
110 printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n",
111 field, g_smsc_fdc37m81x_base);
112
113 g_smsc_fdc37m81x_base = port;
114
115 smsc_fdc37m81x_config_beg();
116
117 chip_id = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DID);
118 if (chip_id == SMSC_FDC37M81X_CHIP_ID)
119 smsc_fdc37m81x_config_end();
120 else {
121 printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n",
122 chip_id);
123 g_smsc_fdc37m81x_base = 0;
124 }
125
126 return g_smsc_fdc37m81x_base;
127}
128
129#ifdef DEBUG
130void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg)
131{
132 printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg,
133 smsc_fdc37m81x_rd(reg));
134}
135
136void smsc_fdc37m81x_config_dump(void)
137{
138 u8 orig;
139 char *fname = "smsc_fdc37m81x_config_dump()";
140
141 smsc_fdc37m81x_config_beg();
142
143 orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM);
144
145 printk("%s: common\n", fname);
146 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
147 SMSC_FDC37M81X_DNUM);
148 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
149 SMSC_FDC37M81X_DID);
150 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
151 SMSC_FDC37M81X_DREV);
152 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
153 SMSC_FDC37M81X_PCNT);
154 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
155 SMSC_FDC37M81X_PMGT);
156
157 printk("%s: keyboard\n", fname);
158 smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD);
159 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
160 SMSC_FDC37M81X_ACTIVE);
161 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
162 SMSC_FDC37M81X_INT);
163 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
164 SMSC_FDC37M81X_INT2);
165 smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
166 SMSC_FDC37M81X_LDCR_F0);
167
168 smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, orig);
169
170 smsc_fdc37m81x_config_end();
171}
172#endif
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 4658b2ae4833..941c441729b0 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -112,8 +112,6 @@ void print_cp0(char *key, int num, char *name, u32 val)
112 return; 112 return;
113} 113}
114 114
115indent: Standard input:25: Error:Unexpected end of file
116
117void 115void
118dump_cp0(char *key) 116dump_cp0(char *key)
119{ 117{
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
index b926e6a75c29..08b20cdfd7b3 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
@@ -36,14 +36,18 @@ void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)
36 36
37static DECLARE_WAIT_QUEUE_HEAD(txx9_spi_wait); 37static DECLARE_WAIT_QUEUE_HEAD(txx9_spi_wait);
38 38
39static void txx9_spi_interrupt(int irq, void *dev_id) 39static irqreturn_t txx9_spi_interrupt(int irq, void *dev_id)
40{ 40{
41 /* disable rx intr */ 41 /* disable rx intr */
42 tx4938_spiptr->cr0 &= ~TXx9_SPCR0_RBSIE; 42 tx4938_spiptr->cr0 &= ~TXx9_SPCR0_RBSIE;
43 wake_up(&txx9_spi_wait); 43 wake_up(&txx9_spi_wait);
44
45 return IRQ_HANDLED;
44} 46}
47
45static struct irqaction txx9_spi_action = { 48static struct irqaction txx9_spi_action = {
46 txx9_spi_interrupt, 0, 0, "spi", NULL, NULL, 49 .handler = txx9_spi_interrupt,
50 .name = "spi",
47}; 51};
48 52
49void __init txx9_spi_irqinit(int irc_irq) 53void __init txx9_spi_irqinit(int irc_irq)
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-08 15:47:04 -0500