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authorFlorian Fainelli <florian@openwrt.org>2010-10-31 18:49:58 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-12-16 13:10:56 -0500
commit0bc6791707694c77b3543de39f77972a65de917a (patch)
treeb3c0f870535093c701816abcde5cd617b1cbf46e /arch/mips
parentff42d62047e45075c54a5543bd4f110dfd032d11 (diff)
MIPS: AR7: Fix loops per jiffies on TNETD7200 devices
TNETD7200 run their CPU clock faster than the default CPU clock we assume. In order to have the correct loops per jiffies settings, initialize clocks right before setting mips_hpt_frequency. As a side effect, we can no longer use msleep in clocks.c which requires other parts of the kernel to be initialized, so replace these with mdelay. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1749/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/ar7/clock.c9
-rw-r--r--arch/mips/ar7/time.c3
-rw-r--r--arch/mips/include/asm/mach-ar7/ar7.h1
3 files changed, 7 insertions, 6 deletions
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index fc0e7154e8d6..2ca4ada1c291 100644
--- a/arch/mips/ar7/clock.c
+++ b/arch/mips/ar7/clock.c
@@ -239,12 +239,12 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
239 calculate(base_clock, frequency, &prediv, &postdiv, &mul); 239 calculate(base_clock, frequency, &prediv, &postdiv, &mul);
240 240
241 writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl); 241 writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
242 msleep(1); 242 mdelay(1);
243 writel(4, &clock->pll); 243 writel(4, &clock->pll);
244 while (readl(&clock->pll) & PLL_STATUS) 244 while (readl(&clock->pll) & PLL_STATUS)
245 ; 245 ;
246 writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); 246 writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
247 msleep(75); 247 mdelay(75);
248} 248}
249 249
250static void __init tnetd7300_init_clocks(void) 250static void __init tnetd7300_init_clocks(void)
@@ -456,7 +456,7 @@ void clk_put(struct clk *clk)
456} 456}
457EXPORT_SYMBOL(clk_put); 457EXPORT_SYMBOL(clk_put);
458 458
459int __init ar7_init_clocks(void) 459void __init ar7_init_clocks(void)
460{ 460{
461 switch (ar7_chip_id()) { 461 switch (ar7_chip_id()) {
462 case AR7_CHIP_7100: 462 case AR7_CHIP_7100:
@@ -472,7 +472,4 @@ int __init ar7_init_clocks(void)
472 } 472 }
473 /* adjust vbus clock rate */ 473 /* adjust vbus clock rate */
474 vbus_clk.rate = bus_clk.rate / 2; 474 vbus_clk.rate = bus_clk.rate / 2;
475
476 return 0;
477} 475}
478arch_initcall(ar7_init_clocks);
diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c
index 5fb8a0134085..22c93213b233 100644
--- a/arch/mips/ar7/time.c
+++ b/arch/mips/ar7/time.c
@@ -30,6 +30,9 @@ void __init plat_time_init(void)
30{ 30{
31 struct clk *cpu_clk; 31 struct clk *cpu_clk;
32 32
33 /* Initialize ar7 clocks so the CPU clock frequency is correct */
34 ar7_init_clocks();
35
33 cpu_clk = clk_get(NULL, "cpu"); 36 cpu_clk = clk_get(NULL, "cpu");
34 if (IS_ERR(cpu_clk)) { 37 if (IS_ERR(cpu_clk)) {
35 printk(KERN_ERR "unable to get cpu clock\n"); 38 printk(KERN_ERR "unable to get cpu clock\n");
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h
index 31c7ff539830..07d3fadb2443 100644
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -201,5 +201,6 @@ static inline void ar7_device_off(u32 bit)
201} 201}
202 202
203int __init ar7_gpio_init(void); 203int __init ar7_gpio_init(void);
204void __init ar7_init_clocks(void);
204 205
205#endif /* __AR7_H__ */ 206#endif /* __AR7_H__ */