diff options
author | Jayachandran C <jchandra@broadcom.com> | 2013-03-23 13:27:58 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-07 19:19:05 -0400 |
commit | 033e6f288733f1477e7a8774999673ca82206ece (patch) | |
tree | b159387b8620127c7c284f4183b477e58ae80a60 /arch/mips | |
parent | 1ad4af852bc3b352ac36ceffd2e30dbba413bc1a (diff) |
MIPS: Netlogic: Remove unused code
Remove unused functions and redundant comments from
arch/mips/include/asm/netlogic/haldefs.h
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5029/
Acked-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/include/asm/netlogic/haldefs.h | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/mips/include/asm/netlogic/haldefs.h b/arch/mips/include/asm/netlogic/haldefs.h index 61fecb85e66f..79c7cccdc22c 100644 --- a/arch/mips/include/asm/netlogic/haldefs.h +++ b/arch/mips/include/asm/netlogic/haldefs.h | |||
@@ -42,34 +42,6 @@ | |||
42 | * and will provide a way to read 32/64 bit memory mapped registers in | 42 | * and will provide a way to read 32/64 bit memory mapped registers in |
43 | * all ABIs | 43 | * all ABIs |
44 | */ | 44 | */ |
45 | /* | ||
46 | * For o32 compilation, we have to disable interrupts and enable KX bit to | ||
47 | * access 64 bit addresses or data. | ||
48 | * | ||
49 | * We need to disable interrupts because we save just the lower 32 bits of | ||
50 | * registers in interrupt handling. So if we get hit by an interrupt while | ||
51 | * using the upper 32 bits of a register, we lose. | ||
52 | */ | ||
53 | static inline uint32_t nlm_save_flags_kx(void) | ||
54 | { | ||
55 | return change_c0_status(ST0_KX | ST0_IE, ST0_KX); | ||
56 | } | ||
57 | |||
58 | static inline uint32_t nlm_save_flags_cop2(void) | ||
59 | { | ||
60 | return change_c0_status(ST0_CU2 | ST0_IE, ST0_CU2); | ||
61 | } | ||
62 | |||
63 | static inline void nlm_restore_flags(uint32_t sr) | ||
64 | { | ||
65 | write_c0_status(sr); | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * The n64 implementations are simple, the o32 implementations when they | ||
70 | * are added, will have to disable interrupts and enable KX before doing | ||
71 | * 64 bit ops. | ||
72 | */ | ||
73 | static inline uint32_t | 45 | static inline uint32_t |
74 | nlm_read_reg(uint64_t base, uint32_t reg) | 46 | nlm_read_reg(uint64_t base, uint32_t reg) |
75 | { | 47 | { |
@@ -187,14 +159,6 @@ nlm_pcicfg_base(uint32_t devoffset) | |||
187 | return nlm_io_base + devoffset; | 159 | return nlm_io_base + devoffset; |
188 | } | 160 | } |
189 | 161 | ||
190 | static inline uint64_t | ||
191 | nlm_xkphys_map_pcibar0(uint64_t pcibase) | ||
192 | { | ||
193 | uint64_t paddr; | ||
194 | |||
195 | paddr = nlm_read_reg(pcibase, 0x4) & ~0xfu; | ||
196 | return (uint64_t)0x9000000000000000 | paddr; | ||
197 | } | ||
198 | #elif defined(CONFIG_CPU_XLR) | 162 | #elif defined(CONFIG_CPU_XLR) |
199 | 163 | ||
200 | static inline uint64_t | 164 | static inline uint64_t |