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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-18 17:28:48 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-18 17:28:48 -0500
commit5d7e8af3c5727626b9e7f909c778b9ac9b4a1809 (patch)
tree13d51e31ee070113538a6d26d9a52503ba4a3cd0 /arch/mips/txx9
parentaa891f6b3f440402c6879ad1ecf332d318137422 (diff)
parent79aa18d557bef02171da42ee928c23509e6ef4f7 (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits) MIPS: Malta: enable Cirrus FB console MIPS: add CONFIG_VIRTUALIZATION for virtio support MIPS: Implement __read_mostly MIPS: ath79: add common WMAC device for AR913X based boards MIPS: ath79: Add initial support for the Atheros AP81 reference board MIPS: ath79: add common SPI controller device SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs MIPS: ath79: add common GPIO buttons device MIPS: ath79: add common watchdog device MIPS: ath79: add common GPIO LEDs device MIPS: ath79: add initial support for the Atheros PB44 reference board MIPS: ath79: utilize the MIPS multi-machine support MIPS: ath79: add GPIOLIB support MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs MIPS: jump label: Add MIPS support. MIPS: Use WARN() in uasm for better diagnostics. MIPS: Optimize TLB handlers for Octeon CPUs MIPS: Add LDX and LWX instructions to uasm. MIPS: Use BBIT instructions in TLB handlers MIPS: Declare uasm bbit0 and bbit1 functions. ...
Diffstat (limited to 'arch/mips/txx9')
-rw-r--r--arch/mips/txx9/generic/pci.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index 96e69a00ffc8..85a87de17eb4 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -213,11 +213,8 @@ txx9_alloc_pci_controller(struct pci_controller *pcic,
213 213
214 pcic->mem_offset = 0; /* busaddr == physaddr */ 214 pcic->mem_offset = 0; /* busaddr == physaddr */
215 215
216 printk(KERN_INFO "PCI: IO 0x%08llx-0x%08llx MEM 0x%08llx-0x%08llx\n", 216 printk(KERN_INFO "PCI: IO %pR MEM %pR\n",
217 (unsigned long long)pcic->mem_resource[1].start, 217 &pcic->mem_resource[1], &pcic->mem_resource[0]);
218 (unsigned long long)pcic->mem_resource[1].end,
219 (unsigned long long)pcic->mem_resource[0].start,
220 (unsigned long long)pcic->mem_resource[0].end);
221 218
222 /* register_pci_controller() will request MEM resource */ 219 /* register_pci_controller() will request MEM resource */
223 release_resource(&pcic->mem_resource[0]); 220 release_resource(&pcic->mem_resource[0]);