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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-07-18 12:51:47 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-07-20 09:38:21 -0400
commit94a4c32939dede9328c6e4face335eb8441fc18d (patch)
tree0ac510bf3b90cb79fe94112b95dd77d96c190bf9 /arch/mips/txx9/rbtx4927
parent255033a9bb900a06c9a7798908ce12557d24fb66 (diff)
[MIPS] TXx9: Add 64-bit support
SYS_SUPPORTS_64BIT_KERNEL is enabled for RBTX4927/RBTX4938, but actually it was broken for long time (or from the beginning). Now it should work. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/txx9/rbtx4927')
-rw-r--r--arch/mips/txx9/rbtx4927/irq.c12
-rw-r--r--arch/mips/txx9/rbtx4927/setup.c89
2 files changed, 31 insertions, 70 deletions
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
index 70f13211bc2a..cd748a930328 100644
--- a/arch/mips/txx9/rbtx4927/irq.c
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -126,14 +126,12 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
126 .mask_ack = toshiba_rbtx4927_irq_ioc_disable, 126 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
127 .unmask = toshiba_rbtx4927_irq_ioc_enable, 127 .unmask = toshiba_rbtx4927_irq_ioc_enable,
128}; 128};
129#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
130#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
131 129
132static int toshiba_rbtx4927_irq_nested(int sw_irq) 130static int toshiba_rbtx4927_irq_nested(int sw_irq)
133{ 131{
134 u8 level3; 132 u8 level3;
135 133
136 level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; 134 level3 = readb(rbtx4927_imstat_addr) & 0x1f;
137 if (level3) 135 if (level3)
138 sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; 136 sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
139 return (sw_irq); 137 return (sw_irq);
@@ -154,18 +152,18 @@ static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
154{ 152{
155 unsigned char v; 153 unsigned char v;
156 154
157 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); 155 v = readb(rbtx4927_imask_addr);
158 v |= (1 << (irq - RBTX4927_IRQ_IOC)); 156 v |= (1 << (irq - RBTX4927_IRQ_IOC));
159 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); 157 writeb(v, rbtx4927_imask_addr);
160} 158}
161 159
162static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) 160static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
163{ 161{
164 unsigned char v; 162 unsigned char v;
165 163
166 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); 164 v = readb(rbtx4927_imask_addr);
167 v &= ~(1 << (irq - RBTX4927_IRQ_IOC)); 165 v &= ~(1 << (irq - RBTX4927_IRQ_IOC));
168 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); 166 writeb(v, rbtx4927_imask_addr);
169 mmiowb(); 167 mmiowb();
170} 168}
171 169
diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c
index 1657fd935da8..3da20ea3e55c 100644
--- a/arch/mips/txx9/rbtx4927/setup.c
+++ b/arch/mips/txx9/rbtx4927/setup.c
@@ -53,17 +53,10 @@
53#include <asm/io.h> 53#include <asm/io.h>
54#include <asm/processor.h> 54#include <asm/processor.h>
55#include <asm/reboot.h> 55#include <asm/reboot.h>
56#include <asm/time.h>
57#include <asm/txx9tmr.h>
58#include <asm/txx9/generic.h> 56#include <asm/txx9/generic.h>
59#include <asm/txx9/pci.h> 57#include <asm/txx9/pci.h>
60#include <asm/txx9/rbtx4927.h> 58#include <asm/txx9/rbtx4927.h>
61#include <asm/txx9/tx4938.h> /* for TX4937 */ 59#include <asm/txx9/tx4938.h> /* for TX4937 */
62#ifdef CONFIG_SERIAL_TXX9
63#include <linux/serial_core.h>
64#endif
65
66static int tx4927_ccfg_toeon = 1;
67 60
68#ifdef CONFIG_PCI 61#ifdef CONFIG_PCI
69static void __init tx4927_pci_setup(void) 62static void __init tx4927_pci_setup(void)
@@ -184,14 +177,14 @@ static void toshiba_rbtx4927_restart(char *command)
184 printk(KERN_NOTICE "System Rebooting...\n"); 177 printk(KERN_NOTICE "System Rebooting...\n");
185 178
186 /* enable the s/w reset register */ 179 /* enable the s/w reset register */
187 writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE); 180 writeb(1, rbtx4927_softresetlock_addr);
188 181
189 /* wait for enable to be seen */ 182 /* wait for enable to be seen */
190 while ((readb(RBTX4927_SW_RESET_ENABLE) & 183 while (!(readb(rbtx4927_softresetlock_addr) & 1))
191 RBTX4927_SW_RESET_ENABLE_SET) == 0x00); 184 ;
192 185
193 /* do a s/w reset */ 186 /* do a s/w reset */
194 writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO); 187 writeb(1, rbtx4927_softreset_addr);
195 188
196 /* do something passive while waiting for reset */ 189 /* do something passive while waiting for reset */
197 local_irq_disable(); 190 local_irq_disable();
@@ -213,9 +206,11 @@ static void toshiba_rbtx4927_power_off(void)
213 /* no return */ 206 /* no return */
214} 207}
215 208
209static void __init rbtx4927_clock_init(void);
210static void __init rbtx4937_clock_init(void);
211
216static void __init rbtx4927_mem_setup(void) 212static void __init rbtx4927_mem_setup(void)
217{ 213{
218 int i;
219 u32 cp0_config; 214 u32 cp0_config;
220 char *argptr; 215 char *argptr;
221 216
@@ -227,16 +222,18 @@ static void __init rbtx4927_mem_setup(void)
227 cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); 222 cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
228 write_c0_config(cp0_config); 223 write_c0_config(cp0_config);
229 224
230 ioport_resource.end = 0xffffffff; 225 if (TX4927_REV_PCODE() == 0x4927) {
231 iomem_resource.end = 0xffffffff; 226 rbtx4927_clock_init();
227 tx4927_setup();
228 } else {
229 rbtx4937_clock_init();
230 tx4938_setup();
231 }
232 232
233 _machine_restart = toshiba_rbtx4927_restart; 233 _machine_restart = toshiba_rbtx4927_restart;
234 _machine_halt = toshiba_rbtx4927_halt; 234 _machine_halt = toshiba_rbtx4927_halt;
235 pm_power_off = toshiba_rbtx4927_power_off; 235 pm_power_off = toshiba_rbtx4927_power_off;
236 236
237 for (i = 0; i < TX4927_NR_TMR; i++)
238 txx9_tmr_init(TX4927_TMR_REG(0) & 0xfffffffffULL);
239
240#ifdef CONFIG_PCI 237#ifdef CONFIG_PCI
241 txx9_alloc_pci_controller(&txx9_primary_pcic, 238 txx9_alloc_pci_controller(&txx9_primary_pcic,
242 RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE, 239 RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
@@ -245,36 +242,13 @@ static void __init rbtx4927_mem_setup(void)
245 set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET); 242 set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
246#endif 243#endif
247 244
248 /* CCFG */ 245 tx4927_setup_serial();
249 /* do reset on watchdog */
250 tx4927_ccfg_set(TX4927_CCFG_WR);
251 /* enable Timeout BusError */
252 if (tx4927_ccfg_toeon)
253 tx4927_ccfg_set(TX4927_CCFG_TOE);
254
255#ifdef CONFIG_SERIAL_TXX9
256 {
257 extern int early_serial_txx9_setup(struct uart_port *port);
258 struct uart_port req;
259 for(i = 0; i < 2; i++) {
260 memset(&req, 0, sizeof(req));
261 req.line = i;
262 req.iotype = UPIO_MEM;
263 req.membase = (char *)(0xff1ff300 + i * 0x100);
264 req.mapbase = 0xff1ff300 + i * 0x100;
265 req.irq = TXX9_IRQ_BASE + TX4927_IR_SIO(i);
266 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
267 req.uartclk = 50000000;
268 early_serial_txx9_setup(&req);
269 }
270 }
271#ifdef CONFIG_SERIAL_TXX9_CONSOLE 246#ifdef CONFIG_SERIAL_TXX9_CONSOLE
272 argptr = prom_getcmdline(); 247 argptr = prom_getcmdline();
273 if (strstr(argptr, "console=") == NULL) { 248 if (strstr(argptr, "console=") == NULL) {
274 strcat(argptr, " console=ttyS0,38400"); 249 strcat(argptr, " console=ttyS0,38400");
275 } 250 }
276#endif 251#endif
277#endif
278 252
279#ifdef CONFIG_ROOT_NFS 253#ifdef CONFIG_ROOT_NFS
280 argptr = prom_getcmdline(); 254 argptr = prom_getcmdline();
@@ -291,19 +265,7 @@ static void __init rbtx4927_mem_setup(void)
291#endif 265#endif
292} 266}
293 267
294static void __init rbtx49x7_common_time_init(void) 268static void __init rbtx4927_clock_init(void)
295{
296 /* change default value to udelay/mdelay take reasonable time */
297 loops_per_jiffy = txx9_cpu_clock / HZ / 2;
298
299 mips_hpt_frequency = txx9_cpu_clock / 2;
300 if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_TINTDIS)
301 txx9_clockevent_init(TX4927_TMR_REG(0) & 0xfffffffffULL,
302 TXX9_IRQ_BASE + 17,
303 50000000);
304}
305
306static void __init rbtx4927_time_init(void)
307{ 269{
308 /* 270 /*
309 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz. 271 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
@@ -325,11 +287,9 @@ static void __init rbtx4927_time_init(void)
325 default: 287 default:
326 txx9_cpu_clock = 200000000; /* 200MHz */ 288 txx9_cpu_clock = 200000000; /* 200MHz */
327 } 289 }
328
329 rbtx49x7_common_time_init();
330} 290}
331 291
332static void __init rbtx4937_time_init(void) 292static void __init rbtx4937_clock_init(void)
333{ 293{
334 /* 294 /*
335 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz. 295 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
@@ -357,15 +317,18 @@ static void __init rbtx4937_time_init(void)
357 default: 317 default:
358 txx9_cpu_clock = 333333333; /* 333MHz */ 318 txx9_cpu_clock = 333333333; /* 333MHz */
359 } 319 }
320}
360 321
361 rbtx49x7_common_time_init(); 322static void __init rbtx4927_time_init(void)
323{
324 tx4927_time_init(0);
362} 325}
363 326
364static int __init toshiba_rbtx4927_rtc_init(void) 327static int __init toshiba_rbtx4927_rtc_init(void)
365{ 328{
366 static struct resource __initdata res = { 329 struct resource res = {
367 .start = 0x1c010000, 330 .start = RBTX4927_BRAMRTC_BASE - IO_BASE,
368 .end = 0x1c010000 + 0x800 - 1, 331 .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1,
369 .flags = IORESOURCE_MEM, 332 .flags = IORESOURCE_MEM,
370 }; 333 };
371 struct platform_device *dev = 334 struct platform_device *dev =
@@ -375,7 +338,7 @@ static int __init toshiba_rbtx4927_rtc_init(void)
375 338
376static int __init rbtx4927_ne_init(void) 339static int __init rbtx4927_ne_init(void)
377{ 340{
378 static struct resource __initdata res[] = { 341 struct resource res[] = {
379 { 342 {
380 .start = RBTX4927_RTL_8019_BASE, 343 .start = RBTX4927_RTL_8019_BASE,
381 .end = RBTX4927_RTL_8019_BASE + 0x20 - 1, 344 .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
@@ -434,7 +397,7 @@ struct txx9_board_vec rbtx4937_vec __initdata = {
434 .prom_init = rbtx4927_prom_init, 397 .prom_init = rbtx4927_prom_init,
435 .mem_setup = rbtx4927_mem_setup, 398 .mem_setup = rbtx4927_mem_setup,
436 .irq_setup = rbtx4927_irq_setup, 399 .irq_setup = rbtx4927_irq_setup,
437 .time_init = rbtx4937_time_init, 400 .time_init = rbtx4927_time_init,
438 .device_init = rbtx4927_device_init, 401 .device_init = rbtx4927_device_init,
439 .arch_init = rbtx4937_arch_init, 402 .arch_init = rbtx4937_arch_init,
440#ifdef CONFIG_PCI 403#ifdef CONFIG_PCI