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authorRalf Baechle <ralf@linux-mips.org>2006-10-07 14:44:33 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-07 21:38:28 -0400
commit937a801576f954bd030d7c4a5a94571710d87c0b (patch)
tree48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/sni
parent31aa36658a123263a9a69896e348b9600e050679 (diff)
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sni')
-rw-r--r--arch/mips/sni/irq.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
index cda165f42b6a..48fb74a7aaec 100644
--- a/arch/mips/sni/irq.c
+++ b/arch/mips/sni/irq.c
@@ -69,20 +69,20 @@ static struct irq_chip pciasic_irq_type = {
69 * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug 69 * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
70 * button interrupts. Later ... 70 * button interrupts. Later ...
71 */ 71 */
72static void pciasic_hwint0(struct pt_regs *regs) 72static void pciasic_hwint0(void)
73{ 73{
74 panic("Received int0 but no handler yet ..."); 74 panic("Received int0 but no handler yet ...");
75} 75}
76 76
77/* This interrupt was used for the com1 console on the first prototypes. */ 77/* This interrupt was used for the com1 console on the first prototypes. */
78static void pciasic_hwint2(struct pt_regs *regs) 78static void pciasic_hwint2(void)
79{ 79{
80 /* I think this shouldn't happen on production machines. */ 80 /* I think this shouldn't happen on production machines. */
81 panic("hwint2 and no handler yet"); 81 panic("hwint2 and no handler yet");
82} 82}
83 83
84/* hwint5 is the r4k count / compare interrupt */ 84/* hwint5 is the r4k count / compare interrupt */
85static void pciasic_hwint5(struct pt_regs *regs) 85static void pciasic_hwint5(void)
86{ 86{
87 panic("hwint5 and no handler yet"); 87 panic("hwint5 and no handler yet");
88} 88}
@@ -103,7 +103,7 @@ static unsigned int ls1bit8(unsigned int x)
103 * 103 *
104 * The EISA_INT bit in CSITPEND is high active, all others are low active. 104 * The EISA_INT bit in CSITPEND is high active, all others are low active.
105 */ 105 */
106static void pciasic_hwint1(struct pt_regs *regs) 106static void pciasic_hwint1(void)
107{ 107{
108 u8 pend = *(volatile char *)PCIMT_CSITPEND; 108 u8 pend = *(volatile char *)PCIMT_CSITPEND;
109 unsigned long flags; 109 unsigned long flags;
@@ -119,13 +119,13 @@ static void pciasic_hwint1(struct pt_regs *regs)
119 if (unlikely(irq < 0)) 119 if (unlikely(irq < 0))
120 return; 120 return;
121 121
122 do_IRQ(irq, regs); 122 do_IRQ(irq);
123 } 123 }
124 124
125 if (!(pend & IT_SCSI)) { 125 if (!(pend & IT_SCSI)) {
126 flags = read_c0_status(); 126 flags = read_c0_status();
127 clear_c0_status(ST0_IM); 127 clear_c0_status(ST0_IM);
128 do_IRQ(PCIMT_IRQ_SCSI, regs); 128 do_IRQ(PCIMT_IRQ_SCSI);
129 write_c0_status(flags); 129 write_c0_status(flags);
130 } 130 }
131} 131}
@@ -133,7 +133,7 @@ static void pciasic_hwint1(struct pt_regs *regs)
133/* 133/*
134 * hwint 3 should deal with the PCI A - D interrupts, 134 * hwint 3 should deal with the PCI A - D interrupts,
135 */ 135 */
136static void pciasic_hwint3(struct pt_regs *regs) 136static void pciasic_hwint3(void)
137{ 137{
138 u8 pend = *(volatile char *)PCIMT_CSITPEND; 138 u8 pend = *(volatile char *)PCIMT_CSITPEND;
139 int irq; 139 int irq;
@@ -141,21 +141,21 @@ static void pciasic_hwint3(struct pt_regs *regs)
141 pend &= (IT_INTA | IT_INTB | IT_INTC | IT_INTD); 141 pend &= (IT_INTA | IT_INTB | IT_INTC | IT_INTD);
142 clear_c0_status(IE_IRQ3); 142 clear_c0_status(IE_IRQ3);
143 irq = PCIMT_IRQ_INT2 + ls1bit8(pend); 143 irq = PCIMT_IRQ_INT2 + ls1bit8(pend);
144 do_IRQ(irq, regs); 144 do_IRQ(irq);
145 set_c0_status(IE_IRQ3); 145 set_c0_status(IE_IRQ3);
146} 146}
147 147
148/* 148/*
149 * hwint 4 is used for only the onboard PCnet 32. 149 * hwint 4 is used for only the onboard PCnet 32.
150 */ 150 */
151static void pciasic_hwint4(struct pt_regs *regs) 151static void pciasic_hwint4(void)
152{ 152{
153 clear_c0_status(IE_IRQ4); 153 clear_c0_status(IE_IRQ4);
154 do_IRQ(PCIMT_IRQ_ETHERNET, regs); 154 do_IRQ(PCIMT_IRQ_ETHERNET);
155 set_c0_status(IE_IRQ4); 155 set_c0_status(IE_IRQ4);
156} 156}
157 157
158asmlinkage void plat_irq_dispatch(struct pt_regs *regs) 158asmlinkage void plat_irq_dispatch(void)
159{ 159{
160 unsigned int pending = read_c0_status() & read_c0_cause(); 160 unsigned int pending = read_c0_status() & read_c0_cause();
161 static unsigned char led_cache; 161 static unsigned char led_cache;
@@ -163,17 +163,17 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
163 *(volatile unsigned char *) PCIMT_CSLED = ++led_cache; 163 *(volatile unsigned char *) PCIMT_CSLED = ++led_cache;
164 164
165 if (pending & 0x0800) 165 if (pending & 0x0800)
166 pciasic_hwint1(regs); 166 pciasic_hwint1();
167 else if (pending & 0x4000) 167 else if (pending & 0x4000)
168 pciasic_hwint4(regs); 168 pciasic_hwint4();
169 else if (pending & 0x2000) 169 else if (pending & 0x2000)
170 pciasic_hwint3(regs); 170 pciasic_hwint3();
171 else if (pending & 0x1000) 171 else if (pending & 0x1000)
172 pciasic_hwint2(regs); 172 pciasic_hwint2();
173 else if (pending & 0x8000) 173 else if (pending & 0x8000)
174 pciasic_hwint5(regs); 174 pciasic_hwint5();
175 else if (pending & 0x0400) 175 else if (pending & 0x0400)
176 pciasic_hwint0(regs); 176 pciasic_hwint0();
177} 177}
178 178
179void __init init_pciasic(void) 179void __init init_pciasic(void)