diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-01 12:08:36 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:46 -0500 |
commit | 1603b5aca4f15b34848fb5594d0c7b6333b99144 (patch) | |
tree | 79272aa41d6510b7256df62e287676885c3960cf /arch/mips/sni | |
parent | c87b6ebaea034c0e0ce86127870cf1511a307b64 (diff) |
[MIPS] IRQ cleanups
This is a big irq cleanup patch.
* Use set_irq_chip() to register irq_chip.
* Initialize .mask, .unmask, .mask_ack field. Functions for these
method are already exist in most case.
* Do not initialize .startup, .shutdown, .enable, .disable fields if
default routines provided by irq_chip_set_defaults() were suitable.
* Remove redundant irq_desc initializations.
* Remove unnecessary local_irq_save/local_irq_restore, spin_lock.
With this cleanup, it would be easy to switch to slightly lightwait
irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ().
Though whole this patch is quite large, changes in each irq_chip are
not quite simple. Please review and test on your platform. Thanks.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sni')
-rw-r--r-- | arch/mips/sni/irq.c | 40 |
1 files changed, 6 insertions, 34 deletions
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 48fb74a7aaec..8511bcc6d99d 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c | |||
@@ -11,44 +11,25 @@ | |||
11 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
12 | #include <linux/irq.h> | 12 | #include <linux/irq.h> |
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/spinlock.h> | ||
15 | 14 | ||
16 | #include <asm/i8259.h> | 15 | #include <asm/i8259.h> |
17 | #include <asm/io.h> | 16 | #include <asm/io.h> |
18 | #include <asm/sni.h> | 17 | #include <asm/sni.h> |
19 | 18 | ||
20 | DEFINE_SPINLOCK(pciasic_lock); | ||
21 | |||
22 | static void enable_pciasic_irq(unsigned int irq) | 19 | static void enable_pciasic_irq(unsigned int irq) |
23 | { | 20 | { |
24 | unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); | 21 | unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); |
25 | unsigned long flags; | ||
26 | 22 | ||
27 | spin_lock_irqsave(&pciasic_lock, flags); | ||
28 | *(volatile u8 *) PCIMT_IRQSEL |= mask; | 23 | *(volatile u8 *) PCIMT_IRQSEL |= mask; |
29 | spin_unlock_irqrestore(&pciasic_lock, flags); | ||
30 | } | ||
31 | |||
32 | static unsigned int startup_pciasic_irq(unsigned int irq) | ||
33 | { | ||
34 | enable_pciasic_irq(irq); | ||
35 | return 0; /* never anything pending */ | ||
36 | } | 24 | } |
37 | 25 | ||
38 | #define shutdown_pciasic_irq disable_pciasic_irq | ||
39 | |||
40 | void disable_pciasic_irq(unsigned int irq) | 26 | void disable_pciasic_irq(unsigned int irq) |
41 | { | 27 | { |
42 | unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); | 28 | unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); |
43 | unsigned long flags; | ||
44 | 29 | ||
45 | spin_lock_irqsave(&pciasic_lock, flags); | ||
46 | *(volatile u8 *) PCIMT_IRQSEL &= mask; | 30 | *(volatile u8 *) PCIMT_IRQSEL &= mask; |
47 | spin_unlock_irqrestore(&pciasic_lock, flags); | ||
48 | } | 31 | } |
49 | 32 | ||
50 | #define mask_and_ack_pciasic_irq disable_pciasic_irq | ||
51 | |||
52 | static void end_pciasic_irq(unsigned int irq) | 33 | static void end_pciasic_irq(unsigned int irq) |
53 | { | 34 | { |
54 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 35 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
@@ -57,11 +38,10 @@ static void end_pciasic_irq(unsigned int irq) | |||
57 | 38 | ||
58 | static struct irq_chip pciasic_irq_type = { | 39 | static struct irq_chip pciasic_irq_type = { |
59 | .typename = "ASIC-PCI", | 40 | .typename = "ASIC-PCI", |
60 | .startup = startup_pciasic_irq, | 41 | .ack = disable_pciasic_irq, |
61 | .shutdown = shutdown_pciasic_irq, | 42 | .mask = disable_pciasic_irq, |
62 | .enable = enable_pciasic_irq, | 43 | .mask_ack = disable_pciasic_irq, |
63 | .disable = disable_pciasic_irq, | 44 | .unmask = enable_pciasic_irq, |
64 | .ack = mask_and_ack_pciasic_irq, | ||
65 | .end = end_pciasic_irq, | 45 | .end = end_pciasic_irq, |
66 | }; | 46 | }; |
67 | 47 | ||
@@ -178,12 +158,8 @@ asmlinkage void plat_irq_dispatch(void) | |||
178 | 158 | ||
179 | void __init init_pciasic(void) | 159 | void __init init_pciasic(void) |
180 | { | 160 | { |
181 | unsigned long flags; | ||
182 | |||
183 | spin_lock_irqsave(&pciasic_lock, flags); | ||
184 | * (volatile u8 *) PCIMT_IRQSEL = | 161 | * (volatile u8 *) PCIMT_IRQSEL = |
185 | IT_EISA | IT_INTA | IT_INTB | IT_INTC | IT_INTD; | 162 | IT_EISA | IT_INTA | IT_INTB | IT_INTC | IT_INTD; |
186 | spin_unlock_irqrestore(&pciasic_lock, flags); | ||
187 | } | 163 | } |
188 | 164 | ||
189 | /* | 165 | /* |
@@ -199,12 +175,8 @@ void __init arch_init_irq(void) | |||
199 | init_pciasic(); | 175 | init_pciasic(); |
200 | 176 | ||
201 | /* Actually we've got more interrupts to handle ... */ | 177 | /* Actually we've got more interrupts to handle ... */ |
202 | for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) { | 178 | for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) |
203 | irq_desc[i].status = IRQ_DISABLED; | 179 | set_irq_chip(i, &pciasic_irq_type); |
204 | irq_desc[i].action = 0; | ||
205 | irq_desc[i].depth = 1; | ||
206 | irq_desc[i].chip = &pciasic_irq_type; | ||
207 | } | ||
208 | 180 | ||
209 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); | 181 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); |
210 | } | 182 | } |