Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

5 files changed, 46 insertions, 82 deletions

diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index e6980892834a..c48194c3073b 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -10,6 +10,7 @@
 
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
 
@@ -167,33 +168,22 @@ static u32 a20r_ack_hwint(void)
         return status;
 }
 
-static inline void unmask_a20r_irq(unsigned int irq)
+static inline void unmask_a20r_irq(struct irq_data *d)
 {
-        set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
+        set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
         irq_enable_hazard();
 }
 
-static inline void mask_a20r_irq(unsigned int irq)
+static inline void mask_a20r_irq(struct irq_data *d)
 {
-        clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
+        clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
         irq_disable_hazard();
 }
 
-static void end_a20r_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                a20r_ack_hwint();
-                unmask_a20r_irq(irq);
-        }
-}
-
 static struct irq_chip a20r_irq_type = {
         .name           = "A20R",
-        .ack            = mask_a20r_irq,
-        .mask           = mask_a20r_irq,
-        .mask_ack       = mask_a20r_irq,
-        .unmask         = unmask_a20r_irq,
-        .end            = end_a20r_irq,
+        .irq_mask       = mask_a20r_irq,
+        .irq_unmask     = unmask_a20r_irq,
 };
 
 /*
@@ -219,7 +209,7 @@ void __init sni_a20r_irq_init(void)
         int i;
 
         for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++)
-                set_irq_chip_and_handler(i, &a20r_irq_type, handle_level_irq);
+                irq_set_chip_and_handler(i, &a20r_irq_type, handle_level_irq);
         sni_hwint = a20r_hwint;
         change_c0_status(ST0_IM, IE_IRQ0);
         setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 51e62bbaa23b..ed3b3d317358 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -11,6 +11,7 @@
 
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/pci.h>
 #include <linux/serial_8250.h>
 
@@ -193,33 +194,24 @@ static struct pci_controller sni_controller = {
         .io_map_base    = SNI_PORT_BASE
 };
 
-static void enable_pcimt_irq(unsigned int irq)
+static void enable_pcimt_irq(struct irq_data *d)
 {
-        unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
+        unsigned int mask = 1 << (d->irq - PCIMT_IRQ_INT2);
 
         *(volatile u8 *) PCIMT_IRQSEL |= mask;
 }
 
-void disable_pcimt_irq(unsigned int irq)
+void disable_pcimt_irq(struct irq_data *d)
 {
-        unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2));
+        unsigned int mask = ~(1 << (d->irq - PCIMT_IRQ_INT2));
 
         *(volatile u8 *) PCIMT_IRQSEL &= mask;
 }
 
-static void end_pcimt_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_pcimt_irq(irq);
-}
-
 static struct irq_chip pcimt_irq_type = {
         .name = "PCIMT",
-        .ack = disable_pcimt_irq,
-        .mask = disable_pcimt_irq,
-        .mask_ack = disable_pcimt_irq,
-        .unmask = enable_pcimt_irq,
-        .end = end_pcimt_irq,
+        .irq_mask = disable_pcimt_irq,
+        .irq_unmask = enable_pcimt_irq,
 };
 
 /*
@@ -304,7 +296,7 @@ void __init sni_pcimt_irq_init(void)
         mips_cpu_irq_init();
         /* Actually we've got more interrupts to handle ...  */
         for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++)
-                set_irq_chip_and_handler(i, &pcimt_irq_type, handle_level_irq);
+                irq_set_chip_and_handler(i, &pcimt_irq_type, handle_level_irq);
         sni_hwint = sni_pcimt_hwint;
         change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3);
 }
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index f4699d35858b..b5246373d16b 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -10,6 +10,7 @@
 
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/pci.h>
 #include <linux/serial_8250.h>
 
@@ -155,33 +156,24 @@ static struct pci_controller sni_pcit_controller = {
         .io_map_base    = SNI_PORT_BASE
 };
 
-static void enable_pcit_irq(unsigned int irq)
+static void enable_pcit_irq(struct irq_data *d)
 {
-        u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
+        u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
 
         *(volatile u32 *)SNI_PCIT_INT_REG |= mask;
 }
 
-void disable_pcit_irq(unsigned int irq)
+void disable_pcit_irq(struct irq_data *d)
 {
-        u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
+        u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
 
         *(volatile u32 *)SNI_PCIT_INT_REG &= ~mask;
 }
 
-void end_pcit_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_pcit_irq(irq);
-}
-
 static struct irq_chip pcit_irq_type = {
         .name = "PCIT",
-        .ack = disable_pcit_irq,
-        .mask = disable_pcit_irq,
-        .mask_ack = disable_pcit_irq,
-        .unmask = enable_pcit_irq,
-        .end = end_pcit_irq,
+        .irq_mask = disable_pcit_irq,
+        .irq_unmask = enable_pcit_irq,
 };
 
 static void pcit_hwint1(void)
@@ -246,7 +238,7 @@ void __init sni_pcit_irq_init(void)
 
         mips_cpu_irq_init();
         for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
-                set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
+                irq_set_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
         *(volatile u32 *)SNI_PCIT_INT_REG = 0;
         sni_hwint = sni_pcit_hwint;
         change_c0_status(ST0_IM, IE_IRQ1);
@@ -259,7 +251,7 @@ void __init sni_pcit_cplus_irq_init(void)
 
         mips_cpu_irq_init();
         for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
-                set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
+                irq_set_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
         *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
         sni_hwint = sni_pcit_hwint_cplus;
         change_c0_status(ST0_IM, IE_IRQ0);
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 90c558f7c0fa..a7e5a6d917b1 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -13,6 +13,7 @@
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
 #include <linux/io.h>
@@ -154,12 +155,11 @@ static __iomem u8 *rm200_pic_slave;
 #define cached_master_mask      (rm200_cached_irq_mask)
 #define cached_slave_mask       (rm200_cached_irq_mask >> 8)
 
-static void sni_rm200_disable_8259A_irq(unsigned int irq)
+static void sni_rm200_disable_8259A_irq(struct irq_data *d)
 {
-        unsigned int mask;
+        unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
         unsigned long flags;
 
-        irq -= RM200_I8259A_IRQ_BASE;
         mask = 1 << irq;
         raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
         rm200_cached_irq_mask |= mask;
@@ -170,12 +170,11 @@ static void sni_rm200_disable_8259A_irq(unsigned int irq)
         raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags);
 }
 
-static void sni_rm200_enable_8259A_irq(unsigned int irq)
+static void sni_rm200_enable_8259A_irq(struct irq_data *d)
 {
-        unsigned int mask;
+        unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
         unsigned long flags;
 
-        irq -= RM200_I8259A_IRQ_BASE;
         mask = ~(1 << irq);
         raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
         rm200_cached_irq_mask &= mask;
@@ -209,12 +208,11 @@ static inline int sni_rm200_i8259A_irq_real(unsigned int irq)
  * first, _then_ send the EOI, and the order of EOI
  * to the two 8259s is important!
  */
-void sni_rm200_mask_and_ack_8259A(unsigned int irq)
+void sni_rm200_mask_and_ack_8259A(struct irq_data *d)
 {
-        unsigned int irqmask;
+        unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE;
         unsigned long flags;
 
-        irq -= RM200_I8259A_IRQ_BASE;
         irqmask = 1 << irq;
         raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
         /*
@@ -284,9 +282,9 @@ spurious_8259A_irq:
 
 static struct irq_chip sni_rm200_i8259A_chip = {
         .name           = "RM200-XT-PIC",
-        .mask           = sni_rm200_disable_8259A_irq,
-        .unmask         = sni_rm200_enable_8259A_irq,
-        .mask_ack       = sni_rm200_mask_and_ack_8259A,
+        .irq_mask       = sni_rm200_disable_8259A_irq,
+        .irq_unmask     = sni_rm200_enable_8259A_irq,
+        .irq_mask_ack   = sni_rm200_mask_and_ack_8259A,
 };
 
 /*
@@ -415,7 +413,7 @@ void __init sni_rm200_i8259_irqs(void)
         sni_rm200_init_8259A();
 
         for (i = RM200_I8259A_IRQ_BASE; i < RM200_I8259A_IRQ_BASE + 16; i++)
-                set_irq_chip_and_handler(i, &sni_rm200_i8259A_chip,
+                irq_set_chip_and_handler(i, &sni_rm200_i8259A_chip,
                                          handle_level_irq);
 
         setup_irq(RM200_I8259A_IRQ_BASE + PIC_CASCADE_IR, &sni_rm200_irq2);
@@ -428,33 +426,24 @@ void __init sni_rm200_i8259_irqs(void)
 #define SNI_RM200_INT_START  24
 #define SNI_RM200_INT_END    28
 
-static void enable_rm200_irq(unsigned int irq)
+static void enable_rm200_irq(struct irq_data *d)
 {
-        unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
+        unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
 
         *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask;
 }
 
-void disable_rm200_irq(unsigned int irq)
+void disable_rm200_irq(struct irq_data *d)
 {
-        unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
+        unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
 
         *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask;
 }
 
-void end_rm200_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_rm200_irq(irq);
-}
-
 static struct irq_chip rm200_irq_type = {
         .name = "RM200",
-        .ack = disable_rm200_irq,
-        .mask = disable_rm200_irq,
-        .mask_ack = disable_rm200_irq,
-        .unmask = enable_rm200_irq,
-        .end = end_rm200_irq,
+        .irq_mask = disable_rm200_irq,
+        .irq_unmask = enable_rm200_irq,
 };
 
 static void sni_rm200_hwint(void)
@@ -488,7 +477,7 @@ void __init sni_rm200_irq_init(void)
         mips_cpu_irq_init();
         /* Actually we've got more interrupts to handle ...  */
         for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++)
-                set_irq_chip_and_handler(i, &rm200_irq_type, handle_level_irq);
+                irq_set_chip_and_handler(i, &rm200_irq_type, handle_level_irq);
         sni_hwint = sni_rm200_hwint;
         change_c0_status(ST0_IM, IE_IRQ0);
         setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq);
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index f3b60e671207..0904d4d30cb3 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -1,5 +1,6 @@
 #include <linux/types.h>
 #include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/smp.h>
 #include <linux/time.h>
 #include <linux/clockchips.h>
@@ -94,7 +95,7 @@ static void __init sni_a20r_timer_setup(void)
 static __init unsigned long dosample(void)
 {
         u32 ct0, ct1;
-        volatile u8 msb, lsb;
+        volatile u8 msb;
 
         /* Start the counter. */
         outb_p(0x34, 0x43);
@@ -107,7 +108,7 @@ static __init unsigned long dosample(void)
         /* Latch and spin until top byte of counter0 is zero */
         do {
                 outb(0x00, 0x43);
-                lsb = inb(0x40);
+                (void) inb(0x40);
                 msb = inb(0x40);
                 ct1 = read_c0_count();
         } while (msb);