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authorLinus Torvalds <torvalds@linux-foundation.org>2009-01-31 18:52:02 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2009-01-31 18:52:02 -0500
commitc5e18af910f4bc2e3d0732ea98b99c0fd884e73c (patch)
treef6624e0fb83d482d4fcb265c616ae3f5e5ea53f1 /arch/mips/rb532/serial.c
parent878b8619f711280fd05845e21956434b5e588cc4 (diff)
parent2d2eca4d11933bd37a4944aae06e6122efffaea8 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (27 commits) MIPS: Alchemy: time.c build fix MIPS: RB532: Export rb532_gpio_set_func() MIPS: RB532: Update headers MIPS: RB532: Simplify dev3 init MIPS: RB532: Remove {get,set}_434_reg() MIPS: RB532: Move dev3 init code to devices.c MIPS: RB532: Fix set_latch_u5() MIPS: RB532: Fix init of rb532_dev3_ctl_res MIPS: RB532: Use driver_data instead of platform_data MIPS: RB532: Detect uart type, add platform device MIPS: RB532: remove useless CF GPIO initialisation MIPS: RB532: Auto disable GPIO alternate function MIPS: RB532: Add set_type() function to IRQ struct. MIPS: RC32434: Define io_map_base for PCI controller MIPS: RB532: Fix bit swapping in rb532_set_bit() MIPS: Use hardware watchpoints on all R1 and R2 CPUs. MIPS: Read watch registers with interrupts disabled. MIPS: Fix a typo in watchpoint register structure. MIPS: TXx9: Add support for TX4939 internal RTC MIPS: R2: Fix broken installation of cache error handler. ...
Diffstat (limited to 'arch/mips/rb532/serial.c')
-rw-r--r--arch/mips/rb532/serial.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/rb532/serial.c b/arch/mips/rb532/serial.c
index 3e0d7ec3a579..00ed19f0bdb5 100644
--- a/arch/mips/rb532/serial.c
+++ b/arch/mips/rb532/serial.c
@@ -36,7 +36,7 @@
36extern unsigned int idt_cpu_freq; 36extern unsigned int idt_cpu_freq;
37 37
38static struct uart_port rb532_uart = { 38static struct uart_port rb532_uart = {
39 .type = PORT_16550A, 39 .flags = UPF_BOOT_AUTOCONF,
40 .line = 0, 40 .line = 0,
41 .irq = UART0_IRQ, 41 .irq = UART0_IRQ,
42 .iotype = UPIO_MEM, 42 .iotype = UPIO_MEM,