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authorGabor Juhos <juhosg@openwrt.org>2013-01-31 14:43:30 -0500
committerJohn Crispin <blogic@openwrt.org>2013-02-16 19:25:34 -0500
commitd3d2b4200b5a42851365e903d101f8f0882eb9eb (patch)
tree5ec4fd3eedce5d38619e6705da1fa91a27ce8d1e /arch/mips/ralink
parent0916b46962cbcac9465d253d0a398435b3965fd5 (diff)
MIPS: ralink: add CPU interrupt controller to of_irq_ids
Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF mappings. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4900/
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/dts/rt3050.dtsi10
-rw-r--r--arch/mips/ralink/irq.c10
2 files changed, 17 insertions, 3 deletions
diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
index fd49daacbf08..069d0660e1dd 100644
--- a/arch/mips/ralink/dts/rt3050.dtsi
+++ b/arch/mips/ralink/dts/rt3050.dtsi
@@ -13,6 +13,13 @@
13 bootargs = "console=ttyS0,57600 init=/init"; 13 bootargs = "console=ttyS0,57600 init=/init";
14 }; 14 };
15 15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
16 palmbus@10000000 { 23 palmbus@10000000 {
17 compatible = "palmbus"; 24 compatible = "palmbus";
18 reg = <0x10000000 0x200000>; 25 reg = <0x10000000 0x200000>;
@@ -37,6 +44,9 @@
37 44
38 interrupt-controller; 45 interrupt-controller;
39 #interrupt-cells = <1>; 46 #interrupt-cells = <1>;
47
48 interrupt-parent = <&cpuintc>;
49 interrupts = <2>;
40 }; 50 };
41 51
42 memc@300 { 52 memc@300 {
diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
index e62c9751e2d8..6d054c5ec9ab 100644
--- a/arch/mips/ralink/irq.c
+++ b/arch/mips/ralink/irq.c
@@ -128,8 +128,11 @@ static int __init intc_of_init(struct device_node *node,
128{ 128{
129 struct resource res; 129 struct resource res;
130 struct irq_domain *domain; 130 struct irq_domain *domain;
131 int irq;
131 132
132 mips_cpu_irq_init(); 133 irq = irq_of_parse_and_map(node, 0);
134 if (!irq)
135 panic("Failed to get INTC IRQ");
133 136
134 if (of_address_to_resource(node, 0, &res)) 137 if (of_address_to_resource(node, 0, &res))
135 panic("Failed to get intc memory range"); 138 panic("Failed to get intc memory range");
@@ -156,8 +159,8 @@ static int __init intc_of_init(struct device_node *node,
156 159
157 rt_intc_w32(INTC_INT_GLOBAL, INTC_REG_ENABLE); 160 rt_intc_w32(INTC_INT_GLOBAL, INTC_REG_ENABLE);
158 161
159 irq_set_chained_handler(RALINK_CPU_IRQ_INTC, ralink_intc_irq_handler); 162 irq_set_chained_handler(irq, ralink_intc_irq_handler);
160 irq_set_handler_data(RALINK_CPU_IRQ_INTC, domain); 163 irq_set_handler_data(irq, domain);
161 164
162 cp0_perfcount_irq = irq_create_mapping(domain, 9); 165 cp0_perfcount_irq = irq_create_mapping(domain, 9);
163 166
@@ -165,6 +168,7 @@ static int __init intc_of_init(struct device_node *node,
165} 168}
166 169
167static struct of_device_id __initdata of_irq_ids[] = { 170static struct of_device_id __initdata of_irq_ids[] = {
171 { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
168 { .compatible = "ralink,rt2880-intc", .data = intc_of_init }, 172 { .compatible = "ralink,rt2880-intc", .data = intc_of_init },
169 {}, 173 {},
170}; 174};