diff options
author | John Crispin <blogic@openwrt.org> | 2013-01-20 16:01:29 -0500 |
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committer | John Crispin <blogic@openwrt.org> | 2013-02-16 19:25:30 -0500 |
commit | 3f0a06b0368d25608841843e9d65a7289ad9f14a (patch) | |
tree | d2e005f4a7db2a905910552af77f8635d33a3579 /arch/mips/ralink | |
parent | 7e47cefa69c8ed2c889522ce29fcce73ce8cf08e (diff) |
MIPS: ralink: adds clkdev code
These SoCs have a limited number of fixed rate clocks. Add support for the
clk and clkdev api.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4894/
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r-- | arch/mips/ralink/clk.c | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c new file mode 100644 index 000000000000..8dfa22ff300b --- /dev/null +++ b/arch/mips/ralink/clk.c | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * This program is free software; you can redistribute it and/or modify it | ||
3 | * under the terms of the GNU General Public License version 2 as published | ||
4 | * by the Free Software Foundation. | ||
5 | * | ||
6 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> | ||
7 | * Copyright (C) 2013 John Crispin <blogic@openwrt.org> | ||
8 | */ | ||
9 | |||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/clkdev.h> | ||
13 | #include <linux/clk.h> | ||
14 | |||
15 | #include <asm/time.h> | ||
16 | |||
17 | #include "common.h" | ||
18 | |||
19 | struct clk { | ||
20 | struct clk_lookup cl; | ||
21 | unsigned long rate; | ||
22 | }; | ||
23 | |||
24 | void ralink_clk_add(const char *dev, unsigned long rate) | ||
25 | { | ||
26 | struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL); | ||
27 | |||
28 | if (!clk) | ||
29 | panic("failed to add clock\n"); | ||
30 | |||
31 | clk->cl.dev_id = dev; | ||
32 | clk->cl.clk = clk; | ||
33 | |||
34 | clk->rate = rate; | ||
35 | |||
36 | clkdev_add(&clk->cl); | ||
37 | } | ||
38 | |||
39 | /* | ||
40 | * Linux clock API | ||
41 | */ | ||
42 | int clk_enable(struct clk *clk) | ||
43 | { | ||
44 | return 0; | ||
45 | } | ||
46 | EXPORT_SYMBOL_GPL(clk_enable); | ||
47 | |||
48 | void clk_disable(struct clk *clk) | ||
49 | { | ||
50 | } | ||
51 | EXPORT_SYMBOL_GPL(clk_disable); | ||
52 | |||
53 | unsigned long clk_get_rate(struct clk *clk) | ||
54 | { | ||
55 | return clk->rate; | ||
56 | } | ||
57 | EXPORT_SYMBOL_GPL(clk_get_rate); | ||
58 | |||
59 | void __init plat_time_init(void) | ||
60 | { | ||
61 | struct clk *clk; | ||
62 | |||
63 | ralink_of_remap(); | ||
64 | |||
65 | ralink_clk_init(); | ||
66 | clk = clk_get_sys("cpu", NULL); | ||
67 | if (IS_ERR(clk)) | ||
68 | panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); | ||
69 | pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000); | ||
70 | mips_hpt_frequency = clk_get_rate(clk) / 2; | ||
71 | clk_put(clk); | ||
72 | } | ||