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authorMark.Zhan <rongkai.zhan@windriver.com>2006-05-06 05:04:20 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 12:39:18 -0400
commita240a469649eaab03f0c4c7fbb21ea5041bf5572 (patch)
tree71801adbf35a8a449a76398a4a5d7c34066313b4 /arch/mips/pci
parenta643d2b57403dc943fd4d9a3c803addd1c6b0ddc (diff)
[MIPS] Wind River 4KC PPMC Eval Board Support
Support for the GT-64120-based Wind River 4KC PPMC Evaluation board. Signed-off-by: Rongkai.Zhan <Rongkai.zhan@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/Makefile1
-rw-r--r--arch/mips/pci/fixup-wrppmc.c37
2 files changed, 38 insertions, 0 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 16205b587338..fb50d410773b 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -57,3 +57,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
57obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o 57obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o
58obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o 58obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
59obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o 59obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
60obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
diff --git a/arch/mips/pci/fixup-wrppmc.c b/arch/mips/pci/fixup-wrppmc.c
new file mode 100644
index 000000000000..3357c1300bb1
--- /dev/null
+++ b/arch/mips/pci/fixup-wrppmc.c
@@ -0,0 +1,37 @@
1/*
2 * fixup-wrppmc.c: PPMC board specific PCI fixup
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2006, Wind River Inc. Rongkai.zhan (rongkai.zhan@windriver.com)
9 */
10#include <linux/init.h>
11#include <linux/pci.h>
12#include <asm/gt64120.h>
13
14/* PCI interrupt pins */
15#define PCI_INTA 1
16#define PCI_INTB 2
17#define PCI_INTC 3
18#define PCI_INTD 4
19
20#define PCI_SLOT_MAXNR 32 /* Each PCI bus has 32 physical slots */
21
22static char pci_irq_tab[PCI_SLOT_MAXNR][5] __initdata = {
23 /* 0 INTA INTB INTC INTD */
24 [0] = {0, 0, 0, 0, 0}, /* Slot 0: GT64120 PCI bridge */
25 [6] = {0, WRPPMC_PCI_INTA_IRQ, 0, 0, 0},
26};
27
28int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
29{
30 return pci_irq_tab[slot][pin];
31}
32
33/* Do platform specific device initialization at pci_enable_device() time */
34int pcibios_plat_dev_init(struct pci_dev *dev)
35{
36 return 0;
37}