Fix common misspellings

Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>

4 files changed, 6 insertions, 6 deletions

diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c
index 68798f869c0f..8fbfbf2b931c 100644
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -344,7 +344,7 @@ static irqreturn_t bpci_interrupt(int irq, void *dev_id)
  *                              PCI_ACCESS_WRITE and PCI_ACCESS_READ.
  *
  *               bus          - pointer to the bus number of the device to
- *                              be targetted for the configuration cycle.
+ *                              be targeted for the configuration cycle.
  *                              The only element of the pci_bus structure
  *                              used is bus->number. This argument determines
  *                              if the configuration access will be Type 0 or
@@ -354,7 +354,7 @@ static irqreturn_t bpci_interrupt(int irq, void *dev_id)
  *
  *               devfn        - this is an 8-bit field. The lower three bits
  *                              specify the function number of the device to
- *                              be targetted for the configuration cycle, with
+ *                              be targeted for the configuration cycle, with
  *                              all three-bit combinations being legal. The
  *                              upper five bits specify the device number,
  *                              with legal values being 10 to 31.
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index 6f5e24c6ae67..af8c31996965 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -210,7 +210,7 @@ static int __init bcm1480_pcibios_init(void)
         PCIBIOS_MIN_IO = 0x00008000UL;
         PCIBIOS_MIN_MEM = 0x01000000UL;
 
-        /* Set I/O resource limits. - unlimited for now to accomodate HT */
+        /* Set I/O resource limits. - unlimited for now to accommodate HT */
         ioport_resource.end = 0xffffffffUL;
         iomem_resource.end = 0xffffffffUL;
 
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index 2d74fc9ae3ba..ed1c54284b8f 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -441,7 +441,7 @@ static void octeon_pci_initialize(void)
 
         /*
          * TDOMC must be set to one in PCI mode. TDOMC should be set to 4
-         * in PCI-X mode to allow four oustanding splits. Otherwise,
+         * in PCI-X mode to allow four outstanding splits. Otherwise,
          * should not change from its reset value. Don't write PCI_CFG19
          * in PCI mode (0x82000001 reset value), write it to 0x82000004
          * after PCI-X mode is known. MRBCI,MDWE,MDRE -> must be zero.
@@ -515,7 +515,7 @@ static void octeon_pci_initialize(void)
 #endif  /* USE_OCTEON_INTERNAL_ARBITER */
 
         /*
-         * Preferrably written to 1 to set MLTD. [RDSATI,TRTAE,
+         * Preferably written to 1 to set MLTD. [RDSATI,TRTAE,
          * TWTAE,TMAE,DPPMR -> must be zero. TILT -> must not be set to
          * 1..7.
          */
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 38bc28005b4a..33bba7bff258 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -125,7 +125,7 @@ void __devinit register_pci_controller(struct pci_controller *hose)
         hose_tail = &hose->next;
 
         /*
-         * Do not panic here but later - this might hapen before console init.
+         * Do not panic here but later - this might happen before console init.
          */
         if (!hose->io_map_base) {
                 printk(KERN_WARNING