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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2007-04-08 07:28:44 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-04-27 11:20:25 -0400
commit639702bd725b3cc1a9bd442a7822c83849d66e91 (patch)
tree814babe3c4496a86dad078206e675e37a69c9eba /arch/mips/pci/pci.c
parent3c5e370600c2dda8a4f59f841f323df04e6ce7b2 (diff)
[MIPS] Register PCI host bridge resource earlier
PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA bridge. So the PCI IO range must start at 0x0000. Changing that will break the PCI bus, because i8259.c already has registered it's IO addresses before the PCI bus gets initialized. Below is a patch, which will register the PCI host bridge resources inside register_pci_controller(). It also changes i8259.c to use insert_region(), because request_resource() will fail, if the IO space of the PIT hanging of the PCI host bridge (maybe passing the resource parent to init_i8259_irqs() is a cleaner fix for that). Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci.c')
-rw-r--r--arch/mips/pci/pci.c25
1 files changed, 12 insertions, 13 deletions
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index de7cfc559ddb..8108231f2e20 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -77,6 +77,13 @@ pcibios_align_resource(void *data, struct resource *res,
77 77
78void __init register_pci_controller(struct pci_controller *hose) 78void __init register_pci_controller(struct pci_controller *hose)
79{ 79{
80 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
81 goto out;
82 if (request_resource(&ioport_resource, hose->io_resource) < 0) {
83 release_resource(hose->mem_resource);
84 goto out;
85 }
86
80 *hose_tail = hose; 87 *hose_tail = hose;
81 hose_tail = &hose->next; 88 hose_tail = &hose->next;
82 89
@@ -87,6 +94,11 @@ void __init register_pci_controller(struct pci_controller *hose)
87 printk(KERN_WARNING 94 printk(KERN_WARNING
88 "registering PCI controller with io_map_base unset\n"); 95 "registering PCI controller with io_map_base unset\n");
89 } 96 }
97 return;
98
99out:
100 printk(KERN_WARNING
101 "Skipping PCI bus scan due to resource conflict\n");
90} 102}
91 103
92/* Most MIPS systems have straight-forward swizzling needs. */ 104/* Most MIPS systems have straight-forward swizzling needs. */
@@ -121,11 +133,6 @@ static int __init pcibios_init(void)
121 /* Scan all of the recorded PCI controllers. */ 133 /* Scan all of the recorded PCI controllers. */
122 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { 134 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
123 135
124 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
125 goto out;
126 if (request_resource(&ioport_resource, hose->io_resource) < 0)
127 goto out_free_mem_resource;
128
129 if (!hose->iommu) 136 if (!hose->iommu)
130 PCI_DMA_BUS_IS_PHYS = 1; 137 PCI_DMA_BUS_IS_PHYS = 1;
131 138
@@ -144,14 +151,6 @@ static int __init pcibios_init(void)
144 need_domain_info = 1; 151 need_domain_info = 1;
145 } 152 }
146 } 153 }
147 continue;
148
149out_free_mem_resource:
150 release_resource(hose->mem_resource);
151
152out:
153 printk(KERN_WARNING
154 "Skipping PCI bus scan due to resource conflict\n");
155 } 154 }
156 155
157 if (!pci_probe_only) 156 if (!pci_probe_only)