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authorDaniel Laird <daniel.j.laird@nxp.com>2008-03-06 04:07:18 -0500
committerRalf Baechle <ralf@linux-mips.org>2008-04-28 12:14:26 -0400
commita92b05880d261e9017ef8e7d5b6b01e0e5aa991d (patch)
tree663109c57e75dd2183507818a035c99ab53fff25 /arch/mips/nxp/pnx8550/common/platform.c
parent389310e2b0c195f176e7d4be788bc245e9102412 (diff)
[MIPS] Move arch/mips/philips to arch/mips/nxp
Signed-off-by: daniel.j.laird <daniel.j.laird@nxp.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/nxp/pnx8550/common/platform.c')
-rw-r--r--arch/mips/nxp/pnx8550/common/platform.c132
1 files changed, 132 insertions, 0 deletions
diff --git a/arch/mips/nxp/pnx8550/common/platform.c b/arch/mips/nxp/pnx8550/common/platform.c
new file mode 100644
index 000000000000..c7c763dbe588
--- /dev/null
+++ b/arch/mips/nxp/pnx8550/common/platform.c
@@ -0,0 +1,132 @@
1/*
2 * Platform device support for NXP PNX8550 SoCs
3 *
4 * Copyright 2005, Embedded Alley Solutions, Inc
5 *
6 * Based on arch/mips/au1000/common/platform.c
7 * Platform device support for Au1x00 SoCs.
8 *
9 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15#include <linux/device.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/resource.h>
19#include <linux/serial.h>
20#include <linux/serial_pnx8xxx.h>
21#include <linux/platform_device.h>
22
23#include <int.h>
24#include <usb.h>
25#include <uart.h>
26
27static struct resource pnx8550_usb_ohci_resources[] = {
28 [0] = {
29 .start = PNX8550_USB_OHCI_OP_BASE,
30 .end = PNX8550_USB_OHCI_OP_BASE +
31 PNX8550_USB_OHCI_OP_LEN,
32 .flags = IORESOURCE_MEM,
33 },
34 [1] = {
35 .start = PNX8550_INT_USB,
36 .end = PNX8550_INT_USB,
37 .flags = IORESOURCE_IRQ,
38 },
39};
40
41static struct resource pnx8550_uart_resources[] = {
42 [0] = {
43 .start = PNX8550_UART_PORT0,
44 .end = PNX8550_UART_PORT0 + 0xfff,
45 .flags = IORESOURCE_MEM,
46 },
47 [1] = {
48 .start = PNX8550_UART_INT(0),
49 .end = PNX8550_UART_INT(0),
50 .flags = IORESOURCE_IRQ,
51 },
52 [2] = {
53 .start = PNX8550_UART_PORT1,
54 .end = PNX8550_UART_PORT1 + 0xfff,
55 .flags = IORESOURCE_MEM,
56 },
57 [3] = {
58 .start = PNX8550_UART_INT(1),
59 .end = PNX8550_UART_INT(1),
60 .flags = IORESOURCE_IRQ,
61 },
62};
63
64struct pnx8xxx_port pnx8xxx_ports[] = {
65 [0] = {
66 .port = {
67 .type = PORT_PNX8XXX,
68 .iotype = UPIO_MEM,
69 .membase = (void __iomem *)PNX8550_UART_PORT0,
70 .mapbase = PNX8550_UART_PORT0,
71 .irq = PNX8550_UART_INT(0),
72 .uartclk = 3692300,
73 .fifosize = 16,
74 .flags = UPF_BOOT_AUTOCONF,
75 .line = 0,
76 },
77 },
78 [1] = {
79 .port = {
80 .type = PORT_PNX8XXX,
81 .iotype = UPIO_MEM,
82 .membase = (void __iomem *)PNX8550_UART_PORT1,
83 .mapbase = PNX8550_UART_PORT1,
84 .irq = PNX8550_UART_INT(1),
85 .uartclk = 3692300,
86 .fifosize = 16,
87 .flags = UPF_BOOT_AUTOCONF,
88 .line = 1,
89 },
90 },
91};
92
93/* The dmamask must be set for OHCI to work */
94static u64 ohci_dmamask = ~(u32)0;
95
96static u64 uart_dmamask = ~(u32)0;
97
98static struct platform_device pnx8550_usb_ohci_device = {
99 .name = "pnx8550-ohci",
100 .id = -1,
101 .dev = {
102 .dma_mask = &ohci_dmamask,
103 .coherent_dma_mask = 0xffffffff,
104 },
105 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
106 .resource = pnx8550_usb_ohci_resources,
107};
108
109static struct platform_device pnx8550_uart_device = {
110 .name = "pnx8xxx-uart",
111 .id = -1,
112 .dev = {
113 .dma_mask = &uart_dmamask,
114 .coherent_dma_mask = 0xffffffff,
115 .platform_data = pnx8xxx_ports,
116 },
117 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
118 .resource = pnx8550_uart_resources,
119};
120
121static struct platform_device *pnx8550_platform_devices[] __initdata = {
122 &pnx8550_usb_ohci_device,
123 &pnx8550_uart_device,
124};
125
126static int __init pnx8550_platform_init(void)
127{
128 return platform_add_devices(pnx8550_platform_devices,
129 ARRAY_SIZE(pnx8550_platform_devices));
130}
131
132arch_initcall(pnx8550_platform_init);