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authorJayachandran C <jchandra@broadcom.com>2013-01-14 10:11:57 -0500
committerJohn Crispin <blogic@openwrt.org>2013-02-16 18:15:20 -0500
commit4e45e542cd742c1c3e30e7f252640644c66548b5 (patch)
treed2c744190851b06cf7cd326ff3df16d2a6badae3 /arch/mips/netlogic
parenta69ba6293d11b7dfd395a742f3449d6ddda8ecad (diff)
MIPS: Netlogic: Use PIC timer as a clocksource
The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC frequencey. One of these can be used as a clocksource to provide timestamps that is common across cores. This can be used in place of the count/compare clocksource which is per-CPU. On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits of the PIC counter. On XLP, the whole 64-bit can be used. Provide common macros and functions for PIC timer registers on XLR/XLS and XLP, and use them to register a PIC clocksource. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4786/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/netlogic')
-rw-r--r--arch/mips/netlogic/common/irq.c2
-rw-r--r--arch/mips/netlogic/common/time.c52
-rw-r--r--arch/mips/netlogic/xlr/platform.c2
-rw-r--r--arch/mips/netlogic/xlr/setup.c2
4 files changed, 55 insertions, 3 deletions
diff --git a/arch/mips/netlogic/common/irq.c b/arch/mips/netlogic/common/irq.c
index d42cd1a2a124..642f1e4c2717 100644
--- a/arch/mips/netlogic/common/irq.c
+++ b/arch/mips/netlogic/common/irq.c
@@ -217,7 +217,7 @@ static void nlm_init_node_irqs(int node)
217 nlm_setup_pic_irq(node, i, i, irt); 217 nlm_setup_pic_irq(node, i, i, irt);
218 /* set interrupts to first cpu in node */ 218 /* set interrupts to first cpu in node */
219 nlm_pic_init_irt(nodep->picbase, irt, i, 219 nlm_pic_init_irt(nodep->picbase, irt, i,
220 node * NLM_CPUS_PER_NODE); 220 node * NLM_CPUS_PER_NODE, 0);
221 irqmask |= (1ull << i); 221 irqmask |= (1ull << i);
222 } 222 }
223 nodep->irqmask = irqmask; 223 nodep->irqmask = irqmask;
diff --git a/arch/mips/netlogic/common/time.c b/arch/mips/netlogic/common/time.c
index bd3e498157ff..20f89bc0507f 100644
--- a/arch/mips/netlogic/common/time.c
+++ b/arch/mips/netlogic/common/time.c
@@ -35,16 +35,68 @@
35#include <linux/init.h> 35#include <linux/init.h>
36 36
37#include <asm/time.h> 37#include <asm/time.h>
38#include <asm/cpu-features.h>
39
38#include <asm/netlogic/interrupt.h> 40#include <asm/netlogic/interrupt.h>
39#include <asm/netlogic/common.h> 41#include <asm/netlogic/common.h>
42#include <asm/netlogic/haldefs.h>
43#include <asm/netlogic/common.h>
44
45#if defined(CONFIG_CPU_XLP)
46#include <asm/netlogic/xlp-hal/iomap.h>
47#include <asm/netlogic/xlp-hal/xlp.h>
48#include <asm/netlogic/xlp-hal/pic.h>
49#elif defined(CONFIG_CPU_XLR)
50#include <asm/netlogic/xlr/iomap.h>
51#include <asm/netlogic/xlr/pic.h>
52#include <asm/netlogic/xlr/xlr.h>
53#else
54#error "Unknown CPU"
55#endif
40 56
41unsigned int __cpuinit get_c0_compare_int(void) 57unsigned int __cpuinit get_c0_compare_int(void)
42{ 58{
43 return IRQ_TIMER; 59 return IRQ_TIMER;
44} 60}
45 61
62static cycle_t nlm_get_pic_timer(struct clocksource *cs)
63{
64 uint64_t picbase = nlm_get_node(0)->picbase;
65
66 return ~nlm_pic_read_timer(picbase, PIC_CLOCK_TIMER);
67}
68
69static cycle_t nlm_get_pic_timer32(struct clocksource *cs)
70{
71 uint64_t picbase = nlm_get_node(0)->picbase;
72
73 return ~nlm_pic_read_timer32(picbase, PIC_CLOCK_TIMER);
74}
75
76static struct clocksource csrc_pic = {
77 .name = "PIC",
78 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
79};
80
81static void nlm_init_pic_timer(void)
82{
83 uint64_t picbase = nlm_get_node(0)->picbase;
84
85 nlm_pic_set_timer(picbase, PIC_CLOCK_TIMER, ~0ULL, 0, 0);
86 if (current_cpu_data.cputype == CPU_XLR) {
87 csrc_pic.mask = CLOCKSOURCE_MASK(32);
88 csrc_pic.read = nlm_get_pic_timer32;
89 } else {
90 csrc_pic.mask = CLOCKSOURCE_MASK(64);
91 csrc_pic.read = nlm_get_pic_timer;
92 }
93 csrc_pic.rating = 1000;
94 clocksource_register_hz(&csrc_pic, PIC_CLK_HZ);
95}
96
46void __init plat_time_init(void) 97void __init plat_time_init(void)
47{ 98{
99 nlm_init_pic_timer();
48 mips_hpt_frequency = nlm_get_cpu_frequency(); 100 mips_hpt_frequency = nlm_get_cpu_frequency();
49 pr_info("MIPS counter frequency [%ld]\n", 101 pr_info("MIPS counter frequency [%ld]\n",
50 (unsigned long)mips_hpt_frequency); 102 (unsigned long)mips_hpt_frequency);
diff --git a/arch/mips/netlogic/xlr/platform.c b/arch/mips/netlogic/xlr/platform.c
index 507230eeb768..ce838f951356 100644
--- a/arch/mips/netlogic/xlr/platform.c
+++ b/arch/mips/netlogic/xlr/platform.c
@@ -64,7 +64,7 @@ void nlm_xlr_uart_out(struct uart_port *p, int offset, int value)
64 .iotype = UPIO_MEM32, \ 64 .iotype = UPIO_MEM32, \
65 .flags = (UPF_SKIP_TEST | \ 65 .flags = (UPF_SKIP_TEST | \
66 UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF),\ 66 UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF),\
67 .uartclk = PIC_CLKS_PER_SEC, \ 67 .uartclk = PIC_CLK_HZ, \
68 .type = PORT_16550A, \ 68 .type = PORT_16550A, \
69 .serial_in = nlm_xlr_uart_in, \ 69 .serial_in = nlm_xlr_uart_in, \
70 .serial_out = nlm_xlr_uart_out, \ 70 .serial_out = nlm_xlr_uart_out, \
diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c
index c5ce6992ac4c..54b301c809e1 100644
--- a/arch/mips/netlogic/xlr/setup.c
+++ b/arch/mips/netlogic/xlr/setup.c
@@ -70,7 +70,7 @@ static void __init nlm_early_serial_setup(void)
70 s.iotype = UPIO_MEM32; 70 s.iotype = UPIO_MEM32;
71 s.regshift = 2; 71 s.regshift = 2;
72 s.irq = PIC_UART_0_IRQ; 72 s.irq = PIC_UART_0_IRQ;
73 s.uartclk = PIC_CLKS_PER_SEC; 73 s.uartclk = PIC_CLK_HZ;
74 s.serial_in = nlm_xlr_uart_in; 74 s.serial_in = nlm_xlr_uart_in;
75 s.serial_out = nlm_xlr_uart_out; 75 s.serial_out = nlm_xlr_uart_out;
76 s.mapbase = uart_base; 76 s.mapbase = uart_base;