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authorJayachandran C <jchandra@broadcom.com>2013-06-10 02:41:07 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-06-13 11:46:43 -0400
commit4033d38ceb9d84ed66b925c1740c1a88f8a4a8f9 (patch)
tree8843816a53e8a4bc8e163f08fe1aa2d2bd995841 /arch/mips/netlogic
parent9f1f1e7b8b76d8503673a3777b3ee743d8c50e13 (diff)
MIPS: Netlogic: wait for all hardware threads
Earlier we just waited for the first thread of the CPU to come online before proceeding to wake up others. Update it to wait for all the CPUs in the core. This will be useful when the boot-up is slow, like while debugging or when running in a simulator. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5429/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/netlogic')
-rw-r--r--arch/mips/netlogic/xlp/wakeup.c27
1 files changed, 20 insertions, 7 deletions
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index feb573670f90..0cce37cbffef 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -77,13 +77,28 @@ static int xlp_wakeup_core(uint64_t sysbase, int node, int core)
77 return count != 0; 77 return count != 0;
78} 78}
79 79
80static int wait_for_cpus(int cpu, int bootcpu)
81{
82 volatile uint32_t *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY);
83 int i, count, notready;
84
85 count = 0x20000000;
86 do {
87 notready = nlm_threads_per_core;
88 for (i = 0; i < nlm_threads_per_core; i++)
89 if (cpu_ready[cpu + i] || cpu == bootcpu)
90 --notready;
91 } while (notready != 0 && --count > 0);
92
93 return count != 0;
94}
95
80static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask) 96static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
81{ 97{
82 struct nlm_soc_info *nodep; 98 struct nlm_soc_info *nodep;
83 uint64_t syspcibase; 99 uint64_t syspcibase;
84 uint32_t syscoremask; 100 uint32_t syscoremask;
85 volatile uint32_t *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY); 101 int core, n, cpu;
86 int core, n, cpu, count, val;
87 102
88 for (n = 0; n < NLM_NR_NODES; n++) { 103 for (n = 0; n < NLM_NR_NODES; n++) {
89 syspcibase = nlm_get_sys_pcibase(n); 104 syspcibase = nlm_get_sys_pcibase(n);
@@ -123,11 +138,8 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
123 /* core is up */ 138 /* core is up */
124 nodep->coremask |= 1u << core; 139 nodep->coremask |= 1u << core;
125 140
126 /* spin until the first hw thread sets its ready */ 141 /* spin until the hw threads sets their ready */
127 count = 0x20000000; 142 wait_for_cpus(cpu, 0);
128 do {
129 val = cpu_ready[cpu];
130 } while (val == 0 && --count > 0);
131 } 143 }
132 } 144 }
133} 145}
@@ -139,6 +151,7 @@ void xlp_wakeup_secondary_cpus()
139 * first wakeup core 0 threads 151 * first wakeup core 0 threads
140 */ 152 */
141 xlp_boot_core0_siblings(); 153 xlp_boot_core0_siblings();
154 wait_for_cpus(0, 0);
142 155
143 /* now get other cores out of reset */ 156 /* now get other cores out of reset */
144 xlp_enable_secondary_cores(&nlm_cpumask); 157 xlp_enable_secondary_cores(&nlm_cpumask);