MIPS: Netlogic: PIC IRQ handling update for multi-chip

Create struct nlm_pic_irq for interrupts handled by the PIC.
This simplifies IRQ handling for multi-SoC as well as
the single SoC cases. Also split the setup of percpu and PIC
interrupts so that we can configure the PIC interrupts for
every node.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4467
Signed-off-by: John Crispin <blogic@openwrt.org>

1 files changed, 5 insertions, 2 deletions

diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index e40b467f6184..0315b298a648 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -114,8 +114,11 @@ void nlm_early_init_secondary(int cpu)
  */
 static void __cpuinit nlm_init_secondary(void)
 {
-        current_cpu_data.core = hard_smp_processor_id() / NLM_THREADS_PER_CORE;
-        nlm_smp_irq_init();
+        int hwtid;
+
+        hwtid = hard_smp_processor_id();
+        current_cpu_data.core = hwtid / NLM_THREADS_PER_CORE;
+        nlm_smp_irq_init(hwtid);
 }
 
 void nlm_prepare_cpus(unsigned int max_cpus)