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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-17 15:50:54 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-17 15:50:54 -0400 |
commit | bfaf245022b4b8661af2e35f467cf0e91943c24c (patch) | |
tree | b5a6ee49a047557a791eb897c8c9545a155e36b7 /arch/mips/netlogic/common/reset.S | |
parent | 96d928ed75c4ba4253e82910a697ec7b06ace8b4 (diff) | |
parent | 3e20a26b02bd4f24945c87407df51948dd488620 (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for MIPS for Linux 4.1. Most
noteworthy:
- Add more Octeon-optimized crypto functions
- Octeon crypto preemption and locking fixes
- Little endian support for Octeon
- Use correct CSR to soft reset Octeons
- Support LEDs on the Octeon-based DSR-1000N
- Fix PCI interrupt mapping for the Octeon-based DSR-1000N
- Mark prom_free_prom_memory() as __init for a number of systems
- Support for Imagination's Pistachio SOC. This includes arch and
CLK bits. I'd like to merge pinctrl bits later
- Improve parallelism of csum_partial for certain pipelines
- Organize DTB files in subdirs like other architectures
- Implement read_sched_clock for all MIPS platforms other than
Octeon
- Massive series of 38 fixes and cleanups for the FPU emulator /
kernel
- Further FPU remulator work to support new features. This sits on a
separate branch which also has been pulled into the 4.1 KVM branch
- Clean up and fixes for the SEAD3 eval board; remove unused file
- Various updates for Netlogic platforms
- A number of small updates for Loongson 3 platforms
- Increase the memory limit for ATH79 platforms to 256MB
- A fair number of fixes and updates for BCM47xx platforms
- Finish the implementation of XPA support
- MIPS FDC support. No, not floppy controller but Fast Debug Channel :)
- Detect the R16000 used in SGI legacy platforms
- Fix Kconfig dependencies for the SSB bus support"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (265 commits)
MIPS: Makefile: Fix MIPS ASE detection code
MIPS: asm: elf: Set O32 default FPU flags
MIPS: BCM47XX: Fix detecting Microsoft MN-700 & Asus WL500G
MIPS: Kconfig: Disable SMP/CPS for 64-bit
MIPS: Hibernate: flush TLB entries earlier
MIPS: smp-cps: cpu_set FPU mask if FPU present
MIPS: lose_fpu(): Disable FPU when MSA enabled
MIPS: ralink: add missing symbol for RALINK_ILL_ACC
MIPS: ralink: Fix bad config symbol in PCI makefile.
SSB: fix Kconfig dependencies
MIPS: Malta: Detect and fix bad memsize values
Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."
MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.
MIPS: Fix cpu_has_mips_r2_exec_hazard.
MIPS: kernel: entry.S: Set correct ISA level for mips_ihb
MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case
MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes
MIPS: Kconfig: Fix typo for the r2-to-r6 emulator kernel parameter
MIPS: unaligned: Fix regular load/store instruction emulation for EVA
MIPS: unaligned: Surround load/store macros in do {} while statements
...
Diffstat (limited to 'arch/mips/netlogic/common/reset.S')
-rw-r--r-- | arch/mips/netlogic/common/reset.S | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S index 701c4bcb9e47..edbab9b8691f 100644 --- a/arch/mips/netlogic/common/reset.S +++ b/arch/mips/netlogic/common/reset.S | |||
@@ -60,7 +60,7 @@ | |||
60 | li t0, LSU_DEFEATURE | 60 | li t0, LSU_DEFEATURE |
61 | mfcr t1, t0 | 61 | mfcr t1, t0 |
62 | 62 | ||
63 | lui t2, 0xc080 /* SUE, Enable Unaligned Access, L2HPE */ | 63 | lui t2, 0x4080 /* Enable Unaligned Access, L2HPE */ |
64 | or t1, t1, t2 | 64 | or t1, t1, t2 |
65 | mtcr t1, t0 | 65 | mtcr t1, t0 |
66 | 66 | ||
@@ -235,6 +235,26 @@ EXPORT(nlm_boot_siblings) | |||
235 | mfc0 v0, CP0_EBASE, 1 | 235 | mfc0 v0, CP0_EBASE, 1 |
236 | andi v0, 0x3ff /* v0 <- node/core */ | 236 | andi v0, 0x3ff /* v0 <- node/core */ |
237 | 237 | ||
238 | /* | ||
239 | * Errata: to avoid potential live lock, setup IFU_BRUB_RESERVE | ||
240 | * when running 4 threads per core | ||
241 | */ | ||
242 | andi v1, v0, 0x3 /* v1 <- thread id */ | ||
243 | bnez v1, 2f | ||
244 | nop | ||
245 | |||
246 | /* thread 0 of each core. */ | ||
247 | li t0, CKSEG1ADDR(RESET_DATA_PHYS) | ||
248 | lw t1, BOOT_THREAD_MODE(t0) /* t1 <- thread mode */ | ||
249 | subu t1, 0x3 /* 4-thread per core mode? */ | ||
250 | bnez t1, 2f | ||
251 | nop | ||
252 | |||
253 | li t0, IFU_BRUB_RESERVE | ||
254 | li t1, 0x55 | ||
255 | mtcr t1, t0 | ||
256 | _ehb | ||
257 | 2: | ||
238 | beqz v0, 4f /* boot cpu (cpuid == 0)? */ | 258 | beqz v0, 4f /* boot cpu (cpuid == 0)? */ |
239 | nop | 259 | nop |
240 | 260 | ||