MIPS: fix blast_icache32 on loongson2

Commit 14bd8c082016 ("MIPS: Loongson: Get rid of Loongson 2 #ifdefery
all over arch/mips") failed to add Loongson2 specific blast_icache32
functions.  Fix that.

The patch fixes the following crash seen with 3.13-rc1:

  Reserved instruction in kernel code[#1]:
  [...]
  Call Trace:
    blast_icache32_page+0x8/0xb0
    r4k_flush_cache_page+0x19c/0x200
    do_wp_page.isra.97+0x47c/0xe08
    handle_mm_fault+0x938/0x1118
    __do_page_fault+0x140/0x540
    resume_userspace_check+0x0/0x10
  Code: 00200825  64834000  00200825 <bc900000> bc900020  bc900040  bc900060  bc900080  bc9000a0

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 73f02da61baf..49e572d879e1 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -237,6 +237,8 @@ static void r4k_blast_icache_page_setup(void)
                 r4k_blast_icache_page = (void *)cache_noop;
         else if (ic_lsize == 16)
                 r4k_blast_icache_page = blast_icache16_page;
+        else if (ic_lsize == 32 && current_cpu_type() == CPU_LOONGSON2)
+                r4k_blast_icache_page = loongson2_blast_icache32_page;
         else if (ic_lsize == 32)
                 r4k_blast_icache_page = blast_icache32_page;
         else if (ic_lsize == 64)
@@ -261,6 +263,9 @@ static void r4k_blast_icache_page_indexed_setup(void)
                 else if (TX49XX_ICACHE_INDEX_INV_WAR)
                         r4k_blast_icache_page_indexed =
                                 tx49_blast_icache32_page_indexed;
+                else if (current_cpu_type() == CPU_LOONGSON2)
+                        r4k_blast_icache_page_indexed =
+                                loongson2_blast_icache32_page_indexed;
                 else
                         r4k_blast_icache_page_indexed =
                                 blast_icache32_page_indexed;
@@ -284,6 +289,8 @@ static void r4k_blast_icache_setup(void)
                         r4k_blast_icache = blast_r4600_v1_icache32;
                 else if (TX49XX_ICACHE_INDEX_INV_WAR)
                         r4k_blast_icache = tx49_blast_icache32;
+                else if (current_cpu_type() == CPU_LOONGSON2)
+                        r4k_blast_icache = loongson2_blast_icache32;
                 else
                         r4k_blast_icache = blast_icache32;
         } else if (ic_lsize == 64)