MIPS: Add support for the M5150 processor

The M5150 core is a 32-bit MIPS RISC which implements the
MIPS Architecture Release-5  in a 5-stage pipeline.
In addition, it includes the MIPS Architecture Virtualization Module
that enables virtualization of operating systems,
which provides a scalable, trusted, and secure execution environment.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6596/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index ccae9a46e222..be407d5ccc4e 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -512,6 +512,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
                 case CPU_1074K:
                 case CPU_PROAPTIV:
                 case CPU_P5600:
+                case CPU_M5150:
                         break;
 
                 default: