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authorDavid Daney <david.daney@cavium.com>2012-10-16 18:48:10 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-12-12 10:48:47 -0500
commitaa1762f49c81a14d0453e4f67f922e4f155510a3 (patch)
treeba9c7318105db788ededd51e57b568793be0d5fa /arch/mips/mm/tlbex.c
parentc17a6554782ad531f4713b33fd6339ba67ef6391 (diff)
MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORT
We need Huge TLBs for HUGETLB_PAGE, or the soon to follow TRANSPARENT_HUGEPAGE. collect this information under a single Kconfig symbol. Signed-off-by: David Daney <david.daney@cavium.com>
Diffstat (limited to 'arch/mips/mm/tlbex.c')
-rw-r--r--arch/mips/mm/tlbex.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index a36b4955d4ed..98b2b732005a 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -158,7 +158,7 @@ enum label_id {
158 label_smp_pgtable_change, 158 label_smp_pgtable_change,
159 label_r3000_write_probe_fail, 159 label_r3000_write_probe_fail,
160 label_large_segbits_fault, 160 label_large_segbits_fault,
161#ifdef CONFIG_HUGETLB_PAGE 161#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
162 label_tlb_huge_update, 162 label_tlb_huge_update,
163#endif 163#endif
164}; 164};
@@ -177,7 +177,7 @@ UASM_L_LA(_nopage_tlbm)
177UASM_L_LA(_smp_pgtable_change) 177UASM_L_LA(_smp_pgtable_change)
178UASM_L_LA(_r3000_write_probe_fail) 178UASM_L_LA(_r3000_write_probe_fail)
179UASM_L_LA(_large_segbits_fault) 179UASM_L_LA(_large_segbits_fault)
180#ifdef CONFIG_HUGETLB_PAGE 180#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
181UASM_L_LA(_tlb_huge_update) 181UASM_L_LA(_tlb_huge_update)
182#endif 182#endif
183 183
@@ -666,7 +666,7 @@ static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
666 } 666 }
667} 667}
668 668
669#ifdef CONFIG_HUGETLB_PAGE 669#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
670 670
671static __cpuinit void build_restore_pagemask(u32 **p, 671static __cpuinit void build_restore_pagemask(u32 **p,
672 struct uasm_reloc **r, 672 struct uasm_reloc **r,
@@ -792,7 +792,7 @@ static __cpuinit void build_huge_handler_tail(u32 **p,
792 build_huge_update_entries(p, pte, ptr); 792 build_huge_update_entries(p, pte, ptr);
793 build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0); 793 build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0);
794} 794}
795#endif /* CONFIG_HUGETLB_PAGE */ 795#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
796 796
797#ifdef CONFIG_64BIT 797#ifdef CONFIG_64BIT
798/* 798/*
@@ -1237,7 +1237,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
1237 /* Adjust the context during the load latency. */ 1237 /* Adjust the context during the load latency. */
1238 build_adjust_context(p, tmp); 1238 build_adjust_context(p, tmp);
1239 1239
1240#ifdef CONFIG_HUGETLB_PAGE 1240#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1241 uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update); 1241 uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update);
1242 /* 1242 /*
1243 * The in the LWX case we don't want to do the load in the 1243 * The in the LWX case we don't want to do the load in the
@@ -1246,7 +1246,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
1246 */ 1246 */
1247 if (use_lwx_insns()) 1247 if (use_lwx_insns())
1248 uasm_i_nop(p); 1248 uasm_i_nop(p);
1249#endif /* CONFIG_HUGETLB_PAGE */ 1249#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
1250 1250
1251 1251
1252 /* build_update_entries */ 1252 /* build_update_entries */
@@ -1349,7 +1349,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1349 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ 1349 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
1350#endif 1350#endif
1351 1351
1352#ifdef CONFIG_HUGETLB_PAGE 1352#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1353 build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update); 1353 build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update);
1354#endif 1354#endif
1355 1355
@@ -1359,7 +1359,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1359 uasm_l_leave(&l, p); 1359 uasm_l_leave(&l, p);
1360 uasm_i_eret(&p); /* return from trap */ 1360 uasm_i_eret(&p); /* return from trap */
1361 } 1361 }
1362#ifdef CONFIG_HUGETLB_PAGE 1362#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1363 uasm_l_tlb_huge_update(&l, p); 1363 uasm_l_tlb_huge_update(&l, p);
1364 build_huge_update_entries(&p, htlb_info.huge_pte, K1); 1364 build_huge_update_entries(&p, htlb_info.huge_pte, K1);
1365 build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random, 1365 build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random,
@@ -1404,7 +1404,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1404 uasm_copy_handler(relocs, labels, tlb_handler, p, f); 1404 uasm_copy_handler(relocs, labels, tlb_handler, p, f);
1405 final_len = p - tlb_handler; 1405 final_len = p - tlb_handler;
1406 } else { 1406 } else {
1407#if defined(CONFIG_HUGETLB_PAGE) 1407#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1408 const enum label_id ls = label_tlb_huge_update; 1408 const enum label_id ls = label_tlb_huge_update;
1409#else 1409#else
1410 const enum label_id ls = label_vmalloc; 1410 const enum label_id ls = label_vmalloc;
@@ -1880,7 +1880,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
1880 build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */ 1880 build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
1881#endif 1881#endif
1882 1882
1883#ifdef CONFIG_HUGETLB_PAGE 1883#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
1884 /* 1884 /*
1885 * For huge tlb entries, pmd doesn't contain an address but 1885 * For huge tlb entries, pmd doesn't contain an address but
1886 * instead contains the tlb pte. Check the PAGE_HUGE bit and 1886 * instead contains the tlb pte. Check the PAGE_HUGE bit and
@@ -1996,7 +1996,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1996 build_make_valid(&p, &r, wr.r1, wr.r2); 1996 build_make_valid(&p, &r, wr.r1, wr.r2);
1997 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2); 1997 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1998 1998
1999#ifdef CONFIG_HUGETLB_PAGE 1999#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
2000 /* 2000 /*
2001 * This is the entry point when build_r4000_tlbchange_handler_head 2001 * This is the entry point when build_r4000_tlbchange_handler_head
2002 * spots a huge page. 2002 * spots a huge page.
@@ -2089,7 +2089,7 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
2089 build_make_write(&p, &r, wr.r1, wr.r2); 2089 build_make_write(&p, &r, wr.r1, wr.r2);
2090 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2); 2090 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
2091 2091
2092#ifdef CONFIG_HUGETLB_PAGE 2092#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
2093 /* 2093 /*
2094 * This is the entry point when 2094 * This is the entry point when
2095 * build_r4000_tlbchange_handler_head spots a huge page. 2095 * build_r4000_tlbchange_handler_head spots a huge page.
@@ -2137,7 +2137,7 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
2137 build_make_write(&p, &r, wr.r1, wr.r2); 2137 build_make_write(&p, &r, wr.r1, wr.r2);
2138 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2); 2138 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
2139 2139
2140#ifdef CONFIG_HUGETLB_PAGE 2140#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
2141 /* 2141 /*
2142 * This is the entry point when 2142 * This is the entry point when
2143 * build_r4000_tlbchange_handler_head spots a huge page. 2143 * build_r4000_tlbchange_handler_head spots a huge page.