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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-03-13 04:23:03 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-03-18 11:59:27 -0500
commitde62893bc0725f8b5f0445250577cd7a10b2d8f8 (patch)
tree3a5d77b8e8aa66113431ebe287c552749c2e8fee /arch/mips/mm/c-tx39.c
parenta3c4946db4fe64cb21b66a09e89890678aac6d65 (diff)
[MIPS] local_r4k_flush_cache_page fix
If dcache_size != icache_size or dcache_size != scache_size, or set-associative cache, icache/scache does not flushed properly. Make blast_?cache_page_indexed() masks its index value correctly. Also, use physical address for physically indexed pcache/scache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/c-tx39.c')
-rw-r--r--arch/mips/mm/c-tx39.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 7c572bea4a98..fe232e3988e3 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -210,7 +210,6 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page
210 * Do indexed flush, too much work to get the (possible) TLB refills 210 * Do indexed flush, too much work to get the (possible) TLB refills
211 * to work correctly. 211 * to work correctly.
212 */ 212 */
213 page = (KSEG0 + (page & (dcache_size - 1)));
214 if (cpu_has_dc_aliases || exec) 213 if (cpu_has_dc_aliases || exec)
215 tx39_blast_dcache_page_indexed(page); 214 tx39_blast_dcache_page_indexed(page);
216 if (exec) 215 if (exec)