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authorKevin Hilman <khilman@linaro.org>2013-10-11 18:01:14 -0400
committerKevin Hilman <khilman@linaro.org>2013-10-11 18:01:36 -0400
commitf797bd4a02056dceb3c0fc9813d991eb4ee62a19 (patch)
treecd6b17d308f2711fd2493f877905054a54fb4285 /arch/mips/mm/c-r4k.c
parent695e6044775daac00bac95901b597540fbf3108e (diff)
parent4385a83d19be799c21af43fbb1ac90364d7a2384 (diff)
Merge tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
From Santosh Shilimkar: SOC updates for Keystone II devices: - Clock tree support - Clock management support using PM core - Keystone config update for EMDA with ack from Vinod - Enable SPI and I2C drivers * tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (510 commits) ARM: keystone: Enable I2C and SPI bus support ARM: keystone: Select TI_EDMA to be able to enable SPI driver dma: Allow TI_EDMA selectable for ARCH_KEYSTONE ARM: dts: keystone: Add the SPI nodes ARM: dts: keystone: Add i2c device nodes ARM: keystone: add PM domain support for clock management ARM: keystone: Enable clock drivers ARM: dts: keystone: Add clock phandle to UART nodes ARM: dts: keystone: Add clock tree data to devicetree +Linux 3.12-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 627883bc6d5f..bc6f96fcb529 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -609,6 +609,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
609 r4k_blast_scache(); 609 r4k_blast_scache();
610 else 610 else
611 blast_scache_range(addr, addr + size); 611 blast_scache_range(addr, addr + size);
612 preempt_enable();
612 __sync(); 613 __sync();
613 return; 614 return;
614 } 615 }
@@ -650,6 +651,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
650 */ 651 */
651 blast_inv_scache_range(addr, addr + size); 652 blast_inv_scache_range(addr, addr + size);
652 } 653 }
654 preempt_enable();
653 __sync(); 655 __sync();
654 return; 656 return;
655 } 657 }